Design of integrated circuit package using parametric solids modeller

This invention relates to modeling and more particularly to lead frame design and the design of integrated circuit packages.

The Pro/Engineer® is a software module that may be implemented on a, for example, a personal computer. The Pro/Engineer® provides, on a computer, mechanical engineering automation tools that are based on a parametric, feature-driven solid modeling technology. The Pro/Engineer® is driven by providing common features, for example hole, slotfillet, chamfer. The Pro/Engineer® is parametric in the sense that parameters may equal the dimensions, number of features in a pattern, loads, boundary conditions, etc. Additionally, the Pro/Engineer® is sufficiently flexible so that the design intent may be captured through relations, for example, relations or relationships between features on a part, between parts in an assembly, between loads/boundary conditions feature parameters, for example surface area. The Pro/Engineer® supports the creation of large, complex assemblies, for example table-driven families of assemblies. The Pro/Engineer® is based on workstation technology in that the results may be displayed on the screen of the workstation. The Pro/Engineer® is a menu-driven modeler to provide three dimensional colored solids or wireframe models. With Pro/Engineer®, the models may be viewed on a screen, plotted on a paper, plotters or output to a color Post Script® printer.

Various electronic products such as stereos, TVs and personal computers use more than fifty percent of the total semiconductors produced around the world. These products generally have a short product lifecycle, for example, averaging between six to eighteen months. And, many of these products require specialized integrated circuits (IC) with application-specific packages. These short product life cycles of these products have created shorter IC packaging development cycle for the IC suppliers in order to produce these specialized ICs and associated packages.

The conventional design and develop methodology for an IC package is based on a series of sequential steps. First, an outline drawing is made using a pencil and paper, or alternatively, a computer aided design (CAD) tool. Second, drawings are made by using this outline drawing. Tooling is fabricated from the tooling drawings to verify that the produced package from these tools matches the outline drawing. If the package does not match the outline due to discrepancies between the tooling design and the package outline, then the tooling is modified to produce the desired package. The third step is assembling a test lot using live or actual integrated circuits to substantiate that the package is in fact manufacturable and functional. Fourth, a series of reliability tests are run on the new package to verify that the new package meets the manufacture's or user's requirements.

The present invention includes a method for producing a model that meets predetermined criteria, such as mechanical outline dimensions. The present invention prevents a modeling tool from attempting to satisfy constraints which cannot be satisfied. Particularly, when modeling a physical device, there are boundary conditions dictated by the physical characteristics of the device, that, when violated, render the model meaningless. These boundary conditions may be expressed as relationships of features of the device to be modeled.

The present invention includes a machine for displaying an object having features for modeling including, input circuitry to input commands from a user to model the object, altering circuitry to accept the commands from the user and to alter the object in accordance with the commands, dimension circuitry to form dimensions between the features, relation circuitry to form relations between the features through the dimensions, wherein the relations circuitry compares the relations to determine an inconsistent relation which prevents the object from being modeled.

FIG. 1 is a top view of a partially designed integrated circuit package;

FIG. 2 is a side view of the partially designed integrated circuit package;

FIG. 3 is a top view of another designed integrated circuit package;

FIG. 4 is a top view of a further designed integrated circuit package;

FIG. 5 is a top view of a fully designed integrated circuit package;

FIG. 6 is a lap view of an integrated circuit package with dimensions;

FIG. 7 is a side view of a fully designed integrated circuit, package with dimensions;

FIG. 8 is a partial top view of a partially designed lead frame for the integrated circuit package with dimensions;

FIG. 9 is a top view of a quarter model of an integrated circuit package;

FIG. 10 is kip view of a full model of an integrated circuit package;

FIG. 11 is a top view of a full array of an integrated circuit package;

FIG. 12 is a top view of a Dual-Inline Plastic (DIP) package:

FIG. 13 is a side view of the DIP integrated circuit package;

FIG. 14 is a top view of a quad flat pack;

FIG. 15 is a side view of the quad flat pack;

FIG. 16 is a side view of the Plastic Leaded Chip Carrier (PLCC) package;

FIG. 17 is a top view of a Tape Automated Bonding (TAB) package;

FIG. 18 is a side view of the TAE; package;

FIG. 19 is a bottom view of a pin grid array package;

FIG. 20 is a side view of the pin grid array package; and

FIG. 21 is a perspective view of the invention.

Before the boundary conditions can be specified for a device, the physical characteristics of the device should be modeled. The physical characteristics are modeled by using the Pro/Engineer®. The user builds a predetermined set of features of the model such as rectangular, slots, etc. and arranges these features to display the object to be modeled. The user subsequently modifies the predetermined features through the keyboard or the mouse in order to achieve the desired physical characteristics.

FIGS. 1–5 illustrate the procedure for creating the design of the integrated circuit package using the Pro/Engineer® modeling software. FIG. 1 illustrates that a body 102 is formed of edges 106 . The body may include chamfered edges 108 to eliminate the corners of the body 102 . Although the body 102 is shown in 2 dimensions, the body may be extended to 3 dimensions to create a 3 dimensional geometry. Additionally, a lead 104 is connected to the body 102 . The lead may be centered on an edge 106 of body 102 as illustrated in FIG. 1 . The lead 104 may include angle section 103 such that the lead 104 supports the body 102 at a position above the printed circuit board (not shown) to which the lead 104 may be connected. As illustrated in FIG. 3 , additional leads 104 may be attached to an edge 106 of the body. These leads are copied from position to position along the edge using the pattern commands with the Pro/Engineer®. Furthermore, as illustrated in FIG. 4 , the additional lead 104 may be connected to the edge substantially perpendicular to the original edge by using a mirroring command in Pro/Engineer®. Thus, the result is that the leads are positioned around all the edges 106 of the body 102 .

FIG. 6 illustrates the various dimensions of the body 102 and leads 104 . By using the Pro/Engineer®, these dimensions may be placed on the object, for example, a lead frame of the package. These dimensions are labeled by the Pro/Engineer® so that further reference may be obtained. FIG. 6 illustrates the horizontal body length f as measured from vertical edge 108 to the other vertical edge 110 . The length e of the lead 104 from the end of lead 104 to the body 102 . The vertical body length d is the dimension from the horizontal edge 112 to the horizontal edge 114 . Additionally, FIG. 6 illustrates the space allowance c from the horizontal edge 114 to the outside edge of the lead closest to the horizontal edge 114 . The pitch a is from the center of a lead 104 to the center of an adjacent lead 104 . The thickness b of the lead is from one longitudinal edge of the lead to another longitudinal edge of the lead. The dimension g 1 is from the center of the package to the center of the outermost lead.

As illustrated in FIG. 7 , the body thickness m of body 102 is measured from the bottom of the body 102 to the top of the body 102 . The overall package thickness n is measured from the top of the body 102 to the surface 116 on which the leads have positioned the body 102 . The plastic allowance q is the distance from the top of the lead 104 to the top of the body 102 . The standoff r is measured from the bottom of the body 102 to the surface 116 .

FIG. 8 illustrates the die pad clearance y, which is the distance from the die pad to the integrated circuit chip 108 . The die to lead clearance x is the distance from the die to the tip of the lead 104 . A plastic body 107 is formed over the leads. The gap z is the distance between two leads. The two leads are still tied together on the lead frame thru the dam bar 109 . Further, p is silicon chip size divided by 2 while y is the silicon chip to die pad clearance, and u is the minimum required amount of plastic overlap on the lead fingers 104 .

A feature of the model developed using Pro/Engineer® is a relation file or database where these characteristics are stored. Control of these dimensions are accessed by the variables so that relationships between the dimensions may be established. Once these physical characteristics are established, the user 158 as illustrated in FIG. 21 may change the shape of the model by imposing constraints or boundary conditions on the modeled object. For example, the user 158 may impose the constraint or boundary conditions that the length be twice the width. In the relation file, this boundary condition would be d=2*f. Once this boundary condition is implemented, the height of the package would be twice the width of package as viewed by the user 158 .

Other conditions may not be able to be satisfied, however, for example, if the boundary condition c=d were imposed, this could not be met because this would leave no room for the leads 104 .

Thus, the present invention evaluates these boundary conditions before they are passed on to generate the graphical representation of model on the screen. One of these equations is that:

g ≤ d 2 - c ,

where g=(NUMBER OF LEADS PER SIDE—1)*a. The user enters the (NUMBER OF LEADS) and a. If this boundary condition is not met, then an appropriate error message can be generated and viewed by the user 158 and the graphical display of the model is terminated. Another such equation is: (n−1)*a≦f−(c*2)−b where n=(NUMBER OF LEADS PER SIDE). If this relationship is not satisfied, an error message is generated and the model will not be generated for display. Another such relationship is b≦m−2*q. Additionally, another such relationship is r+m≦n.

Another such relationship is

p + x ≤ f 2 - u .

Again, if these conditions are not satisfied, then an error message can be generated and the user will be informed of the violation in boundary conditions. Furthermore, the tip gap z must be greater than or equal to the minimum etch or stamping factor which is usually a predetermined value, for example 0.004 inches.

Another relationship is

k = z w ,

the ratio of lead tip width (w), to the gap (z) between two adjacent leads. The lead tip is calculated from a user inputs k and z. Dimension v is the amount of lead frame material required to make these leads v≧[w*(n+k(n−1))]/2.

If any of the above relationship is violated, an error message is generated and written to the user while the program is halted.

FIG. 9 illustrates another integrated circuit package.

As illustrated in FIGS. 9 , 10 and 11 ; aa is the distance between positions from one edge of the package, for example, along the vertical axis. Dimension cc is the distance between the edge of package and center of the feature. A typical representation of a position is 110 , a round pin or lead. Number bb is the number of positions from another edge of the package, for example along the horizontal axis. Number ff is the number of positions in the vertical axis. The pitch jj is the distance between two positions. Number hh is the number of positions in the horizontal axis. The vertical distance gg is the distance from one edge to another. The horizontal distance hh is the distance from one edge to another in order to model these types integrated circuit designs, the models must satisfy the following equations: (ff−1)*jj≦gg−cc*2−feature size, where feature size is the dimension of the lead in this plane. This is a diameter of the pin in this example. Additionally, (hh−1)*jj≦ii−(cc*2)−feature size. At it additional equation is: no. of positions=f′f*hh−(ff−2*aa)*(hh−2*bb).

If any one of these equations is violated, the error message is displayed and the model will not be constructed.

FIGS. 12 through 20 illustrate various different types of package designs. FIGS. 12 and 13 illustrate a top and side and view respectively of a DIP package.

FIGS. 14 and 15 illustrate a top and side view respectively of a quad flat package.

FIG. 16 illustrates a side view of a PLCC pack.

FIG. 17 and FIG. 18 illustrate a top and side view of a TAB integrated circuit package.

FIGS. 19 and 20 illustrate a top and side view respectively of a pin grid array.

FIG. 21 illustrate a perspective view of a hardware embodiment for the Pro/Engineer® application of the present invention. The user 158 inputs and receives information, for example, the relationship or constraints to a workstation 160 having a monochrome or color monitor 162 and input devices such as keyboard 164 and a mouse 166 . The workstation 160 may be able to operate a graphical windowing system such as X-windows. The workstation 160 is connected to a network in order to share the information stored in a memory of database with a plurality of users.

Thus, if any or all the constraints are violated, the constraint is not applied to the model and the model will not be generated with these constrains. Significant amount of time will be wasted by the user and the computer if these boundary conditions are not used to check the design before regenerating the solid model on the display.

Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.