Elastic membrane for semiconductor wafer polishing apparatus

FIG. 1 is a bottom view of an elastic membrane for semiconductor wafer polishing apparatus showing our new design;

FIG. 2 is a top view thereof;

FIG. 3 is a front view thereof;

FIG. 4 is a right side view thereof;

FIG. 5 is a rear view thereof;

FIG. 6 is a left side view thereof;

FIG. 7 is a perspective view, observed from above thereof enlarged for ease of illustrations;

FIG. 8 is a cross-section view taken along the line 8 — 8 of FIG. 2 thereof;

FIG. 9 is a enlarged view of part 9 of FIG. 8 thereof;

FIG. 10 is a bottom view thereof;

FIG. 11 is a top view thereof;

FIG. 12 is a front view thereof;

FIG. 13 is a right side view thereof;

FIG. 14 is a rear view thereof;

FIG. 15 is a left side view thereof;

FIG. 16 is a perspective view, observed from above thereof enlarged for ease of illustrations;

FIG. 17 is a cross-section view taken along the line 17 — 17 of FIG. 11 thereof;

FIG. 18 is a enlarged view of part 18 of FIG. 17 thereof;

FIG. 19 is a bottom view thereof;

FIG. 20 is a top view thereof;

FIG. 21 is a front view thereof; (rear view is omit since it is identical with the front)

FIG. 22 is a right side view thereof; (left side view is omitted since it is identical with the right side view)

FIG. 23 is a perspective view, observed from above thereof enlarged for ease of illustrations;

FIG. 24 is a cross-section view taken along the line 24 — 24 of FIG. 20 thereof; and,

FIG. 25 is a enlarged view of part 25 of FIG. 24 thereof.

The broken lines depict environmental subject matter only and form no part of the claimed design.