Direct current voltage conversion device and clamping circuit

This application claims priority of Chinese application no. 201410293704.2, filed on Jun. 25, 2014.

The present invention relates to a direct current voltage conversion device and a clamping circuit for use therewith.

A voltage peak of a rectifier at a secondary-side of a direct current voltage conversion device is an important factor affecting the conversion efficiency and reliability of the direct current voltage conversion device. Energy of the voltage peak results mainly from energy of a parasitic capacitor(s) of the rectifier during charging, and a reverse recovery energy of the rectifier. Conventional clamp circuits used in a direct current voltage conversion device, such as RC damping (absorbing) circuits, and RCD damping (absorbing) circuit, are not able to clamp the voltage peak of the rectifier at a secondary-side to an ideal voltage value. Furthermore, such conventional clamp circuit is not highly reliable, resulting in the need to select a rectifier of a high voltage grade in order for the rectifier of a direct current voltage conversion device to endure voltages higher than the ideal voltage value. However, a rectifier of a high voltage grade may cost more, and may have a high turn-on resistance, which causes high power loss that decreases an overall conversion efficiency of the direct current voltage conversion device.

The object of the present invention is to provide a direct current voltage conversion device and a clamping circuit adapted for a direct current voltage conversion device that may effectively suppress voltage peaks and improve conversion efficiency.

According to one aspect of the present invention, there is provided a direct current voltage conversion device comprising:

a direct current to alternating current (DC-to-AC) converter disposed to receive a direct current input voltage, the DC-to-AC converter being operable to convert the direct current input voltage to a converted voltage that approximates an alternating current waveform;

a transformer having a first winding, a second winding and a third winding, the first winding being electrically coupled with the DC-to-AC converter for receiving the converted voltage, each of the second winding and the third winding having a first terminal and a second terminal, the second terminal of the second winding being electrically connected with the first terminal of the third winding;

a first converter switch having a first terminal electrically coupled with the second terminal of the third winding, a second terminal, and a third terminal disposed to receive a first control signal that controls the first converter switch to switch between anon state and an off state;

a second converter switch having a first terminal electrically coupled with the first terminal of the second winding, a second terminal electrically coupled with the second terminal of the first converter switch, and a third terminal disposed to receive a second control signal that controls the second converter switch to switch between an on state and an off state; and

a clamping circuit electrically coupled with the first terminal and the second terminal of the second converter switch, the clamping circuit clamping a voltage across the first terminal and the second terminal of the second converter switch to a preset value, and storing energy of a voltage peak across the first terminal and the second terminal of the second converter switch.

According to another aspect of the pre sent invention, a clamping circuit is adapted for a direct current voltage conversion device. The direct current voltage conversion device is operable to convert a direct current input voltage to a direct current output voltage. The direct current voltage conversion device includes a direct current to alternating current (DC-to-AC) converter, a transformer, a first converter switch and a second converter switch. The transformer has a primary side to receive a voltage signal from the DC-to-AC converter, and a secondary side electrically connected with the first converter switch and the second converter switch. The clamping circuit comprises:

a clamp capacitor having a first terminal to be electrically coupled with a first terminal of the second converter switch, and a second terminal;

a first diode having an anode electrically coupled with the second terminal of the clamp capacitor, and a cathode to be electrically coupled with a second terminal of the second converter switch;

a clamp inductor having a first terminal, and a second terminal to be electrically coupled with the second terminal of the second converter switch;

a second diode having an anode electrically coupled with the first terminal of the clamp inductor, and a cathode; and

a clamp switch having a first terminal electrically coupled with the first terminal of the clamp inductor, a second terminal electrically coupled with the second terminal of the clamp capacitor, and a third terminal disposed to receive a clamp control signal that controls the clamp switch to switch between an on state and an off state, such that energy of a voltage peak across the second converter switch of the direct current voltage conversion device is stored in the clamp capacitor before being discharged to a load.

Other features and advantages of the present invention will become apparent in the following detailed description of the embodiment with reference to the accompanying drawings, of which:

FIG. 1 is a schematic circuit diagram of a direct current voltage conversion device according to an embodiment of the present invention; and

FIG. 2 is a timing diagram illustrating a plurality of signals in the direct current voltage conversion device according to the embodiment of the present invention.

Referring to FIG. 1 , a direct current voltage conversion device 1 according to the embodiment of the present invention is adapted to be electrically connected with a direct current voltage source and with a load 5 having a first terminal and a second terminal. The direct current voltage conversion device 1 includes a direct current to alternating current (DC-to-AC) converter 2 , a transformer 3 , a first converter switch SR 1 , a second converter switch SR 2 , a secondary-side inductor L f , a secondary-side capacitor C f , a clamping circuit 4 , and a control unit 6 .

The direct current to alternating current (DC-to-AC) converter 2 is disposed to receive a direct current input voltage. The DC-to-AC converter 2 is operable to convert the direct current input voltage to a converted voltage V sw that approximates an alternating current waveform. The direct current input voltage has a voltage value V i . Referring to FIG. 2 , the converted voltage V sw has an amplitude equal to V i .

The transformer 3 has a center tap, and has a first winding L 1 , a second winding L 2 and a third winding L 3 . The turns ratio of the first winding L 1 , the second winding L 2 and the third winding L 3 is K:1:1. The first winding L 1 is electrically coupled with the DC-to-AC converter 2 for receiving the converted voltage V sw , and has a dotted terminal. Each of the second winding L 2 and the third winding L 3 has a dotted first terminal and a second terminal . The second terminal of the second winding L 2 is electrically connected with the first terminal of the third winding L 3 . In FIG. 1 , an equivalent circuit of the transformer 3 takes into account non-ideal factors, and thus further includes a parasitic leakage inductor L r and an excitation inductor L m .

The first converter switch SR 1 has a first terminal electrically coupled with the second terminal of the third winding L 3 , a second terminal electrically coupled with the second terminal of the load 5 , a control terminal disposed to receive a first control signal S 1 that controls the first converter switch SR 1 to switch between an on state and an off state, and a body diode D 1 electrically connected in parallel with the first terminal and the second terminal of the first converter switch SR 1 .

The second converter switch SR 2 has a first terminal electrically coupled with the first terminal of the second winding L 2 , a second terminal electrically coupled with the second terminal of the first converter switch SR 1 , a control terminal disposed to receive a second control signal S 2 that controls the second converter switch SR 2 to switch between an on state and an off state, and a body diode D 2 electrically connected in parallel with the first terminal and the second terminal of the second converter switch SR 2 . The first converter switch SR 1 and the second converter switch SR 2 are commonly known as the rectifier or secondary-side rectifier.

The secondary-side inductor L f has a first terminal electrically coupled with the second terminal of the second winding L 2 , and a second terminal electrically coupled with the first terminal of the load 5 .

The secondary-side capacitor C f has a first terminal electrically coupled with the second terminal of the secondary-side inductor L f , and a second terminal electrically coupled with the second terminal of the first converter switch SR 1 .

The clamping circuit 4 includes a clamp capacitor C 1 , a first diode D c1 , a clamp inductor L c , a second diode D c2 , and a clamp switch SR 3 .

The clamp capacitor C 1 has a first terminal electrically coupled with the first terminal of the second converter switch SR 2 , and a second terminal.

The first diode D c1 has an anode electrically coupled with the second terminal of the clamp capacitor C 1 , and a cathode electrically coupled with the second terminal of the second converter switch SR 2 .

The clamp inductor L c has a first terminal, and a second terminal electrically coupled with the second terminal of the second converter switch SR 2 .

The second diode D c2 has an anode electrically coupled with the first terminal of the clamp inductor L c , and a cathode electrically coupled with the second terminal of the secondary-side inductor L f .

The clamp switch SR 3 has a first terminal, a second terminal, a control terminal, and a body diode D c electrically connected in parallel with the first terminal and the second terminal of the clamp switch SR 3 . The first terminal is electrically coupled with the first terminal of the clamp inductor L c , the second terminal is electrically coupled with the second terminal of the clamp capacitor C 1 , and the control terminal is disposed to receive a clamp control signal S 3 that controls the clamp switch SR 3 to switch between anon state and an off state, such that energy of a voltage peak across the first terminal and the second terminal of the second converter switch SR 2 is stored in the clamp capacitor C 1 before being discharged to the load 5 . Thus, a voltage across the first terminal and the second terminal of the second converter switch SR 2 is clamped by the clamping circuit 4 to a preset value.

The control unit 6 generates the clamp control signal according to a voltage across the first terminal and the second terminal of the clamp capacitor C 1 for controlling the clamp switch SR 3 to switch between the on state and the off state.

In this embodiment, the DC-to-AC converter 2 is a full-wave rectifier. In other embodiments, the DC-to-AC converter 2 can be a full-bridge rectifier, a half-wave rectifier, or amultiplier rectifier. In this embodiment, the DC-to-AC converter 2 includes a fourth switch SR 4 , a fifth switch SR 5 , a sixth switch SR 6 , and a seventh switch SR 7 , each having a first terminal, a second terminal and a control terminal. The first terminal of the fifth switch SR 5 is electrically connected with the second terminal of the fourth switch SR 4 , the first terminal of the seventh switch SR 7 is electrically connected with the second terminal of the sixth switch SR 6 , the first terminal of the sixth switch SR 6 is electrically connected with the first terminal of the fourth switch SR 4 , and the second terminal of the seventh switch SR 7 is electrically connected with the second terminal of the fifth switch SR 5 .

Each of the control terminals of the fourth switch SR 4 , the fifth switch SR 5 , the sixth switch SR 6 , and the seventh switch SR 7 receives and is controlled by a fourth control signal S 4 , a fifth control signal S 5 , a sixth control signal S 6 , and a seventh control signal S 7 , respectively. In this embodiment, each of the first converter switch SR 1 , the second converter switch SR 2 , the clamp switch SR 3 , the fourth switch SR 4 , the fifth switch SR 5 , the sixth switch SR 6 , and the seventh switch SR 7 is a power transistor. FIG. 2 is a timing diagram, illustrating how the clamp control signal S 3 controls the clamp switch SR 3 to switch between the on state and the off state. The horizontal axis represents time t, and a parasitic leak inductor current i Lr is the current flowing through the parasitic leakage inductor Lr on the primary side of the transformer 3 , with the arrow indicating a direction of positive current flow. The clamp capacitor current i c1 is the current flowing through the clamp capacitor C 1 , and positive current flows from the first terminal to the second terminal of the clamp capacitor C 1 . A clamp capacitor voltage V c1 is the voltage across the first terminal and the second terminal of the clamp capacitor C 1 . A clamp inductor current i Lc is the current flowing through the clamp inductor L c , and positive current flows from the first terminal to the second terminal of the clamp inductor L. A second converter switch voltage V ds _ SR 2 is the voltage across the first terminal and the second terminal of the second converter switch SR 2 .

The first control signal S 1 , the second control signal S 2 , the fourth control signal S 4 , the fifth control signal S 5 , the sixth control signal S 6 , and the seventh control signal S 7 are generated by a pulse width modulation (PWM) circuit (not shown) for controlling the first converter switch SR 1 , the second converter switch SR 2 , the fourth switch SR 4 , the fifth switch SR 5 , the sixth switch SR 6 , and the seventh switch SR 7 , respectively, to switch between the on state and the off state. By this virtue, the direct current input voltage is converted to a direct current output voltage via the DC-to-AC converter 2 , the transformer 3 , the first converter switch SR 1 , the second converter switch SR 2 , the secondary-side inductor L f , and the secondary-side capacitor C f , and a direct current output voltage V out is applied across the load 5 . Since the pulse width modulation (PWM) circuit generating the first control signal S 1 , the second control signal S 2 , the fourth control signal S 4 , the fifth control signal S 5 , the sixth control signal S 6 , and the seventh control signal S 7 is well known in the art, only waveforms of the first control signal S 1 and the second control signal S 2 that vary with time are shown in the FIG. 2 .

During time t 0 -t 1 : At t 0 , the amplitude of the converted voltage V sw converted by the DC-to-AC converter 2 starts to drop below zero. The transformer 3 includes the parasitic leakage inductor Lr. The first control signal S 1 , and the second control signal S 2 are in a high state, and thus the first converter switch SR 1 and the second converter switch SR 2 are in the on-state. At this moment, the second winding L 2 and the third winding L 3 are shorted, and the currents flowing through the first converter switch SR 1 and the second converter switch SR 2 are in a conversion, i.e., the current flowing through the second converter switch SR 2 is decreasing while the current flowing through the first converter switch SR 1 is increasing. At time t 1 , the conversion is completed, i.e., the current flowing through the second converter switch SR 2 is zero. Before the conversion is completed, the second control signal S 2 is switched to a low state, thus switching the second converter switch SR 2 to the off state. During a period that is after the second converter switch SR 2 is switched to the off state and before time t 1 , the current f lowing through the second converter switch SR 2 flows through the body diode D 2 of the second converter switch SR 2 .

During time t 1 -t 2 : At time t 1 , the second converter switch voltage V ds _ SR 2 is equal to a voltage difference across the secondary-side of the transformer 3 , i.e., the voltage difference across the first terminal of the second winding L 2 and the second terminal of the third winding L 3 . At this time, the reverse recovery energy of the body diode D 2 and the energy of the junction capacitance (not shown) of the second converter switch SR 2 are stored in the parasitic leakage inductor Lr at the primary-side through coupling by the transformer 3 . Since the secondary side windings of the transformer 3 treats the parasitic leakage inductor Lr as an equivalent to a secondary side leak inductor, the secondary side leak inductor and the junction capacitance of the second converter switch SR 2 resonates. After T 1 , the first diode D c1 of the clamping circuit 4 conducts current, causing the clamp capacitor C 1 of the clamping circuit 4 to participate in the resonance involving the secondary side leak inductor and the junction capacitance of the second converter switch SR 2 . Furthermore, due to the capacitance of the clamp capacitor C 1 being much greater than the junction capacitance of the second converter switch SR 2 , the clamp capacitor voltage V c1 increases gradually, and the current flowing through the secondary side leak inductor decreases gradually. At time t 2 , the current flowing through the secondary side leak inductor decreases to zero. At the same time, the clamp capacitor current i c1 is equal to zero and the clamp capacitor voltage V c1 reaches a peak value, meaning that the reverse recovery energy of the body diode D 2 of the second converter switch SR 2 and the energy of the junction capacitance of the second converter switch SR 2 have been transferred to the clamp capacitor C 1 .

During time t 2 -t 3 : At time t 2 , the control unit 6 detects the clamp capacitor voltage V c1 across the first and second terminals of the clamp capacitor C 1 . When the magnitude of the clamp capacitor voltage V c1 reaches a peak value, the clamp control signal S 3 is at a high state that enables the clamp switch SR 3 of the clamping circuit 4 to be switched to the on-state, enabling the clamp capacitor C 1 , the clamp inductor L c , and the secondary side leak inductor to resonate. At this time, the first diode D c1 is switched from the on-state to the off-state. Furthermore, since inductance of the clamp inductor L c is much greater than that of the secondary side leak inductor, effect of the secondary side leak inductor can be neglected. The clamp capacitor voltage V c1 gradually decreases, and the clamp inductor current i Lc gradually increases (absolute value of the current increases gradually) . At time t 3 , the clamp inductor current i Lc reaches a peak value, the clamp capacitor voltage V c1 decreases to a value of 2V i /K−V fd , V fd being a threshold voltage of the first diode D c1 .

During time t 3 -t 4 : At time t 3 , the first diode D c1 is forward-biased, causing the resonating involving the clamp capacitor C 1 and the clamp inductor L c to end, and the clamp inductor current i Lc is maintained at the peak value. At time t 4 , when the magnitude of the clamp capacitor voltage V c1 is reduced to a minimum value, the control unit 6 switches the clamp control signal S 3 to be in a low-state, causing the clamp switch SR 3 of the clamping circuit 4 to be switched to the off-state.

During time t 4 -t 5 : At time t 4 , not taking into account the threshold voltage of the second diode D c2 , the voltage across the first terminal and the second terminal of the clamp inductor L c is equal to the voltage of the direct current output voltage, and energy is provided to the load 5 as the clamp inductor current i Lc flows through the second diode D c2 . Thus, the clamp inductor current i Lc gradually decreases (absolute value of the current decreases gradually). At time t 5 , the converted voltage V sw is zero, the first control signal S 1 and the second control signal S 2 are in a high state, and thus current flows through the first converter switch SR 1 and the second converter switch SR 2 .

During time t 5 -t 6 : At time t 5 , the clamp inductor current i Lc continues to decrease (the absolute value of the current decreases gradually). At time t 6 , the clamp inductor current i Lc becomes zero. The energy in the clamp inductor L c is provided to the load 5 , i.e., the reverse recovery energy of the body diode D 2 and the energy of the junction capacitance of the second converter switch SR 2 are provided to the load 5 .

During time t 6 -t 7 : At time t 7 , the converted voltage V sw turns positive, and the next half cycle begins. The next positive half cycle of the converted voltage V sw is symmetrical with the negative half cycle of the converted voltage V sw previously described in time t 0 -t 7 , and thus the direct current voltage conversion device 1 operates in a similar manner and will not be further described.

In this embodiment, energy can be transferred to the load 5 by virtue of the clamping circuit 4 . Referring to FIG. 2 , the ripple voltage of the second converter switch voltage V ds _ SR 2 during time t 1 -t 3 is lowered from 2V i /K*100% (without the clamping circuit 4 ) to 2V i /K*10% i.e., the amplitude of the second converter switch voltage V ds _ SR 2 can be smaller than 2V i /K*110% . Therefore, the voltage peak of the second converter switch SR 2 can be effective conserved to achieve lossless transfer of energy to the load 5 , without considerations for the threshold voltages of the first diode D c1 and the second diode D c2 .

It is worth mentioning that the direct current voltage conversion device 1 can further include an additional clamping circuit 4 identical to the one described hereinabove. The additional clamping circuit 4 may be electrically connected to the first terminal of the first converter switch SR 1 , and to the first terminal and the second terminal of the load 5 . The additional clamping circuit 4 can absorb reverse recovery energy of the body diode D 1 and energy of the junction capacitance of the first converter switch SR 1 , and transfer such energies to the load 5 .

In summary, according to the voltage across the clamp capacitor C 1 , the clamp switch SR 3 is controlled to switch between an on state and an off state, such that energy of the voltage peak of the second converter switch SR 2 can be transferred to the load 5 without loss. By such virtue, components that can only withstand low voltage but have low loss can be used for a first switch and a second switch of a rectifier, such that reliability, low cost and high conversion efficiency can be achieved.

While the present invention has been described in connection with what is considered the most practical embodiment, it is understood that this invention is not limited to the disclosed embodiment but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.