Load impedance estimation and repetitive control method capable of allowing inductance variation for inverter

1. Field of the Invention

The present invention relates to the technology field of inverter controlling methods, and more particularly to a load impedance estimation and repetitive control method capable of allowing inductance variation for inverter.

2. Description of the Prior Art

With high developments of sciences and technologies, the requirements on electric power and power quality made by high-tech equipment grow with passing days. In order to avoid the execution of normal works from influence, it is extremely important to ensure the continuity and stability of the electric power supplied to the semiconductor manufacture processing equipment or the network server computers. For this reason, an uninterruptible power system (UPS) is provided for supplying back-up electricity to the electrical equipment when the electric grid is at an abnormal situation.

For enhancing the efficiency of the UPS, researchers propose a variety of control method for the controller of the UPS, such as dead-beat control, sliding mode control, pole-placement algorithm, and repetitive control. In above-mentioned methods, although the dead-beat control is able to increase the response speed of the inverter, the dead-beat control cannot effectively eliminate the harmonic distortion from the output current of the inverter when a non-linear load is connected to the inverter. Besides, in spite of the sliding mode control can enhance the dynamic response of the inverter by way of feed-forward compensation, it is difficult to determine a suitable sliding surface for the sliding mode control. Moreover, both the pole-placement algorithm and the repetitive control have the same shortcoming of complex mathematical derivation.

In 2002, Fred C. Lee proposed a 3D SVPWM (Three Dimensional Space Vector Pulse Width Modulation) method for controlling the inverter; therefore, a voltage-type three-phase four-wire inverter based on SVPWM was carried out through defining the vector selections for each of time sequence intervals. To further understand the conventional controllers, the state equations are derived based on the constant three-phase inductance, so that some compensation must be used for overcoming the inadequate inductances, in which the inductances decrease with the increase of the output current; eventually, the whole inverter system is put at risk of system divergence. Moreover, the way of Park Transformation doing in SVPWM is to transform the RST coordinates of three-phase three-wire system to DQ coordinates, or transform the RSTN coordinates of three-phase four-wire system to αβγ coordinates.

However, because the Park Transformation is completed by taking the voltage signal and current signal of three phases as fundamental sinusoidal functions, harmonic compensator or predictor must be added in to the system for compensating the inadequate transformations, from which the voltage signal or current signal of three phases include harmonic components; eventually, the design of the controller for the inverter system is getting complicated. Besides, since the feedback compensation in the conventional inverter system is designed corresponding to a specific load, the previously designed feedback compensation would become unsuitable, at which a new load differing from the specific load is connected to the inverter.

Accordingly, in view of the conventional inverter controlling methods including obvious drawbacks and shortcomings, the inventor of the proposed approach has made great efforts to make inventive research thereon and eventually provided a load impedance estimation and repetitive control method capable of allowing inductance variation for inverter.

The primary objective of the present invention is to provide a load impedance estimation and repetitive control method capable of allowing inductance variation for an inverter, wherein the method is applied for predicting corresponding next-period switching duty cycles for four switching member sets of the inverter by way of sampling three phase voltages and calculating next-period voltage compensations based on the previous line-period voltage compensations. Moreover, during the calculation and prediction, the method also involves the inductance variations of the output inductors of the inverter into the load impedance estimation matrix equation. Therefore, the three phases four wires inverter with the presented load impedance estimation and repetitive control method can provide a steady output voltage to the loads even if the originally-connected loads are replaced with other different loads. Thus, this load impedance estimation and repetitive control method can indeed improve the drawbacks of the inverter controller based on conventional DQ transformation method.

Accordingly, to achieve the primary objective of the present invention, the inventor of the present invention provides a load impedance estimation and repetitive control method capable of allowing inductance variation for inverter, comprising steps of:

(1) providing a three-phase four-wire inverter connecting to at least one load, wherein the three-phase four-wire inverter has a R-phase output inductor, an S-phase output inductor, a T-phase output inductor, a N-phase balance inductor, a R-phase output capacitor, an S-phase output capacitor, and a T-phase output capacitor;

(2) deriving a first matrix equation for presenting the voltage variation of the R-phase output inductor, the S-phase output inductor, the T-phase output inductor by using Kirchhoff's current law and voltage law;

(3) measuring a R-phase output voltage, an S-phase output voltage and a T-phase output voltage of the three-phase four-wire inverter for obtaining a signal waveform diagram, and then partitioning the signal waveform diagram into a plurality of phase voltage regions according to the zero voltage crossing points of the R-phase output voltage, the S-phase output voltage and the T-phase output voltage;

(4) modulating a switching periodic signal waveform diagram of a R-phase switching member set, an S-phase switching member set, a T-phase switching member set, and a N-phase switching member set in the three-phase four-wire inverter through a Two Phase Modulation way, so as to make the switching periodic signal waveform diagram show centrally symmetrical;

(5) deriving a plurality of switching duty cycle matrix equations for each of the phase voltage regions through the first matrix equation, and then integrating all the switching duty cycle matrix equations to a second matrix equation;

(6) providing an equivalent RLC load for the at least one load, and then sampling a total current variation of the equivalent RLC load for three periods by using a controller;

(7) deriving a total current variation matrix equation according to the total current variation obtained by the step (6) and Kirchhoff's current law;

(8) using the total current variation matrix equation to estimate a specific resistance, a specific inductance and a specific capacitance for a parallel resistor, a parallel inductor and a parallel capacitor in the equivalent RLC load, respectively;

(9) substituting the specific resistance, the specific inductance and the specific capacitance into the second matrix equation, so as to obtain a next-period switching duty cycle for the R-phase switching member set, the S-phase switching member set, the T-phase switching member set, and the N-phase switching member set; and

(10) the R-phase switching member set, the S-phase switching member set, the T-phase switching member set, and the N-phase switching member set executing switching operations based on the next-period switching duty cycle, such that the three-phase four-wire inverter outputs an output voltage steadily.

The invention as well as a preferred mode of use and advantages thereof will be best understood by referring to the following detailed description of an illustrative embodiment in conjunction with the accompanying drawings, wherein:

FIG. 1 is a basic framework diagram of a three-phase four-wire inverter;

FIGS. 2A, 2B and 2C show a flow chart of a load impedance estimation and repetitive control method for an inverter according to the present invention;

FIG. 3 is signal waveform diagram of three phase voltages of the inverter;

FIGS. 4A, 4B, 4C, 4D, and 4E show schematic operation diagrams of Two Phase Modulation (TPM);

FIG. 5 is a circuit diagram of an equivalent RLC load;

FIG. 6A and FIG. 6B show 5 circuit diagrams for the equivalent RLC load;

FIG. 7 is a waveform diagram of the R-phase output voltage, the S-phase output voltage, the T-phase output voltage, and the load current measured under 5 kW output power;

FIG. 8 is the signal waveform diagram of the R-phase output voltage, the S-phase output voltage, the T-phase output voltage, and the load current measured under 10 kW output power; and

FIG. 9 is a waveform diagram of the R-phase output voltage, the S-phase output voltage, the T-phase output voltage, and the load current.

To more clearly describe a load impedance estimation and repetitive control method capable of allowing inductance variation for inverter according to the present invention, embodiments of the present invention will be described in detail with reference to the attached drawings hereinafter.

Before introducing the load impedance estimation and repetitive control method capable of allowing inductance variation for an inverter, it needs to describe the basic framework of the inverter with three phases and four wires. As the basic framework diagram shown by FIG. 1 , the three-phase four-wire inverter 1 consists of: an energy-storing capacitor capable of providing a DC voltage V DC , four switching member sets, three output inductors, three output capacitors, wherein three output filtering units are formed by the three output inductors and the three output capacitors, and the three output filtering units are coupled to a R-phase load Z R , a S-phase load Z S and a T-phase load Z T , respectively.

As shown in FIG. 1 , the four switching member sets include a R-phase switching member set (S RH , S RL ), an S-phase switching member set (S SH , S SL ), a T-phase switching member set (S TH , S TL ), and a N-phase switching member set (S NH , S NL ). In addition, the three output inductors include a R-phase output inductor L R , a S-phase output inductor L S and a T-phase output inductor L T . Besides, the three output capacitors include a R-phase output capacitor C R , a S-phase output capacitor C S and a T-phase output capacitor C T . Moreover, the three output capacitors (C R , C S , C T ) and the three load (Z R , Z S , Z T ) have one neutral terminal N, and the neutral terminal N is further coupled to a N-phase balance inductor L N . Herein, it needs to further explain that, the R-phase switching member set in the three-phase four-wire inverter consists of a R-phase upper-arm switching member S RH and R-phase lower-arm switching member S RL ; similarly, the S-phase switching member set consists of a S-phase upper-arm switching member S SH and S-phase lower-arm switching member S SL , the T-phase switching member set consists of a T-phase upper-arm switching member S TH and T-phase lower-arm switching member S TL , and the N-phase switching member set consists of a N-phase upper-arm switching member S NH and N-phase lower-arm switching member S NL .

Continuously, please refer to FIGS. 2A, 2B and 2C , which illustrate a flow chart of a load impedance estimation and repetitive control method according to the present invention. As the FIGS. 2A, 2B and 2C show, the load impedance estimation and repetitive control method consists of 10 steps.

First of all, the method proceeds to step (S 01 ) for providing a three-phase four-wire inverter liking the inverter shown by FIG. 1 , wherein the three-phase four-wire inverter is connected to at least one load and has a R-phase output inductor L R , an S-phase output inductor L S , a T-phase output inductor L T , a N-phase balance inductor L N , a R-phase output capacitor C R , an S-phase output capacitor C S , and a T-phase output capacitor C T . Next, the method proceeds to step (S 02 ) for deriving a first matrix equation for presenting the voltage variation of the R-phase output inductor L R , the S-phase output inductor L S , the T-phase output inductor L T by using Kirchhoff's current law (KCL) and Kirchhoff's voltage law (KVL). The first matrix equation is presented as follows:

In the first matrix equation, u RN , u SN and u TN denote a R-phase switching voltage, a S-phase switching voltage and a T-phase switching voltage for the three-phase four-wire inverter 1 , respectively. In addition, L R , L S , L T , and L N are respectively the inductances of the R-phase output inductor L R , the S-phase output inductor L S , the T-phase output inductor L T , and the N-phase balance inductor L N . Besides, i R , i S , i T are respectively the inductor currents of the R-phase output inductor L R , the S-phase output inductor L S and the T-phase output inductor L T . Furthermore, V RN , V SN and V TN denote the voltage values of a R-phase output voltage, an S-phase output voltage and a T-phase output voltage of the three-phase four-phase inverter 1 .

After obtaining the first matrix equation, the method continuously proceeds to step (S 03 ) for measuring a R-phase output voltage (V RN ), an S-phase output voltage (V SN ) and a T-phase output voltage (V TN ) of the three-phase four-wire inverter 1 for obtaining a signal waveform diagram, and then partitioning the signal waveform diagram into 6 phase voltage regions (I, II, III, IV, V, VI) according to the zero voltage crossing points of the R-phase output voltage (V RN ), the S-phase output voltage (V SN ) and the T-phase output voltage (V TN ).

Subsequently, the method proceeds to step (S 04 ) for modulating a switching periodic signal waveform diagram of the R-phase switching member set (S RH , S RL ), the S-phase switching member set (S SH , S SL ), the T-phase switching member set (S TH , S TL ), and the N-phase switching member set (S NH , S NL ) in the three-phase four-wire inverter 1 through a Two Phase Modulation (TPM) way, so as to make the switching periodic signal waveform diagram show centrally symmetrical. In the load impedance estimation and repetitive control method, the step (S 04 ) includes a plurality of detailed steps, and these detailed steps will be clearly introduced in following paragraphs.

Please refer to FIGS. 4A, 4B, 4C, 4D, and 4E , which show schematic TPM operation diagrams. As shown in FIG. 4A , a plurality of switching timing intervals can be obtained after analyzing a switching timing diagram of the R-phase switching member set (S RH , S RL ), the S-phase switching member set (S SH , S SL ), the T-phase switching member set (S TH , S TL ), and the N-phase switching member set (S NH , S NL ) and treating a partition process to the switching timing diagram. Next, as shown in FIG. 4B , the switching timing intervals are set to be a plurality of light-coloured excitation regions and a plurality of dark-coloured demagnetization regions, wherein the excitation regions consist of the (HHHH) region and the (LLLL) region. Moreover, the demagnetization regions consist of the (HLLL) region, the (HLHL) region and the (HLHH) region in the first switching timing interval T 1 , the second switching timing interval T 2 and the third switching timing interval T 3 ; wherein T 0 =T−T 1 −T 2 −T 3 , and T is the switching period of the R-phase switching member set (S RH , S RL ), S-phase switching member set (S SH , S SL ), T-phase switching member set (S TH , S TL ), and N-phase switching member set (S NH , S NL ).

As shown in FIG. 4C , the light-coloured excitation regions are subsequently integrated and moved the to the center of the switching timing diagram; after that, as shown in FIG. 4D , all the high-level signals in the dark-coloured demagnetization regions are switched to low-level signals; i.e., transforming the (HHHH) in a demagnetization region to (LLLL). Because both the (HHHH) region and the (LLLL) region belong to demagnetization region, the (HHHH)-to-(LLLL) transformation would not affect the normal operation of the three-phase four-wire inverter 1 .

After completing the step (S 04 ), the method proceeds to step (S 05 ) for deriving a plurality of switching duty cycle matrix equations for each of the phase voltage regions (I, II, III, IV, V, VI) through the first matrix equation, and then integrating all the switching duty cycle matrix equations to a second matrix equation. The switching duty cycle matrix equation is presented as follows:

In the switching duty cycle matrix equation, D RH =(T 1 +T 2 +T 3 )/T, D TH =(T 2 +T 3 )/T and D NH =(T 3 )/T. Moreover, Δi R , Δi S and Δi T are respectively the inductor current variation of the R-phase output inductor L R , S-phase output inductor L S and T-phase output inductor L C , and V DC is the DC input voltage of the three-phase four-wire inverter 1 . In addition, V RS means the voltage difference between the R-phase output voltage and S-phase output voltage, V ST means the voltage difference between the S-phase output voltage and T-phase output voltage, and V SN means the voltage difference between the S-phase output voltage and N-phase output voltage. In the present invention, T 1 , T 2 and T 3 can be calculated by using following formula:

Moreover, the second matrix equation is presented as follows:

In the second matrix equation, D A (n+1) and D B (n+1) means two next-period switching duty cycles for any two switching member sets in the R-phase switching member set (S RH , S RL ), S-phase switching member set (S SH , S SL ), and T-phase switching member set (S TH , S TL ). Moreover, D N (n+1) means the next-period switching duty cycle for the N-phase switching member set (S NH , S NL ). Besides, r denotes to any one phase voltage region (I, II, III, IV, V, VI) and is an integer ranged between 1-6. In addition, Δi A (n+1) and Δi B (n+1) are two next-period inductor current variations for any two output inductors in the R-phase output inductor L R , S-phase output inductor L S and T-phase output inductor L T , and Δi N (n+1) is the next-period inductor current variation for the N-phase balance inductor L N . Furthermore, D AF (n+1) and D BF (n+1) are respectively two modulated duty cycles for ant two phases in the R-phase, the S-phase and the T-phase of the three-phase four-wire inverter 1 , and D NF (n+1) is the modulated duty cycle for the N-phase of the three-phase four-wire inverter 1 .

After the second matrix equation is obtained, the method is continuously proceeds to step (S 06 ) for providing an equivalent RLC load for the at least one load, and then sampling a total current variation of the equivalent RLC load for three periods by using a controller. Therefore, in step (S 07 ), a total current variation matrix equation can be derived according to the total current variation obtained by the step (S 06 ) and Kirchhoff's current law. Through the equivalent RLC load shown by FIG. 5 , a current formula of Δi (•) (n+1)=Δi R(•) +Δi L(•) +Δi C(•) , wherein “.” in the current formula means “R”, “S” or “T”, and (n+1) means next period. Moreover, Δi R(•) , Δi L(•) , and Δi C(•) respectively denote to a resistor current variation of a parallel resistor, a inductor current variation of a parallel inductor, and a capacitor current variation of a parallel capacitor in the equivalent RLC load. Thus, the summation of Δi R(•) , Δi L(•) and Δi C(•) is the total current variation of the equivalent RLC load. Then, the total current variation matrix equation can be derived after recording the total current variation for three periods. The total current variation matrix equation is presented as follows:

In the current variation matrix equation, Δi V(•) (n−1), Δi V(•) (n−2) and Δi V(•) (n−3) are respectively the total current variation of the equivalent RLC load in three periods. Moreover, Δv R (n−1), Δv R (n−2) and Δv R (n−3) are respectively the voltage variations on the parallel resistor of the equivalent RLC load in three periods, and k pR being the reciprocal of the specific resistance of the parallel resistor. In addition, Δv C (n−1), Δv C (n−2) and Δv C (n−3) are respectively the voltage variations on the parallel capacitor of the equivalent RLC load in three periods, and k pc can be calculated by way of dividing the specific capacitance of the parallel capacitor by 2 T. Besides, Δv L (n−1), Δv L (n−2) and Δv L (n−3) are respectively the voltage variations on the parallel inductor of the equivalent RLC load in three periods, and k pL is equal to T/2 L, wherein L is the specific inductance of the parallel inductor.

Completing the derivation of the total current variation matrix equation and the record of three-period total current variation, it is able to subsequently execute step (S 08 ) for using the total current variation matrix equation to respectively estimate a specific resistance, a specific inductance and a specific capacitance for the parallel resistor, the parallel inductor and the parallel capacitor in the equivalent RLC load. Furthermore, in step (S 09 ), a next-period switching duty cycle for the R-phase switching member set (S RH , S RL ), the S-phase switching member set (S SH , S SL ), the T-phase switching member set (S, S TL ), and the N-phase switching member set (S NH , S NL ) can be therefore obtained by substituting the specific resistance, the specific inductance and the specific capacitance into the second matrix equation.

The aforesaid step (S 09 ) includes two detailed steps. First of all, it calculates a resistor current variation of the parallel resistor, an inductor current variation of the parallel inductor, a capacitor current variation of the parallel capacitor according to the specific resistance, the specific inductance and the specific capacitance obtained by the step (S 08 ), respectively. Therefore, the calculated resistor current variation, the inductor current variation and the capacitor current variation is substituted into the second matrix equation, and then the next-period switching duty cycle for the R-phase switching member set (S RH , S RL ), the S-phase switching member set (S SH , S SL ), the T-phase switching member set (S TH , S TL ), and the N-phase switching member set (S NH , S NL ) can be calculated. Herein, it needs to further explain that, the first detailed step of the step (S 09 ) is accomplished by using following 3 current formulas:

current formula (1):

current formula (2):

current formula (3):

In aforesaid current formulas, V ref(•) and V fb(•) mean a sinusoidal reference voltage and a feedback voltage, respectively. Thus, after substituting the calculated resistor current variation, the inductor current variation and the capacitor current variation into the second matrix equation, the next-period switching duty cycle for the R-phase switching member set (S RH , S RL ), the S-phase switching member set (S SH , S SL ), the T-phase switching member set (S TH , S TL ), and the N-phase switching member set (S NH , S NL ) is then obtained.

For accelerating the calculation speed of above-mentioned next-period switching duty cycle, a look-up table integrating with all D AF (n+1), D BF (n+1) and D NF (n+1) corresponding to 6 phase voltage region (I, II, III, IV, V, VI) is presented as follows.

Look-Up Table

In the above-presented look-up table, C denotes any one phase of the R phase, the S phase or the T phase which is at a fully turn-on situation or a fully turn-off situation. For instance, as the region-I row of the look-up table shows, the upper-arm switching member S SH of the S-phase switching member set is at the fully turn-on situation, moreover, the lower-arm switching member S SL of the S-phase switching member set is at the fully turn-off situation base on complementary switching principle. So that, it can find that: each of the phase voltage regions (I, II, III, IV, V, VI) have at least one phase (R phase, S phase or T phase) being operated at the fully turn-on situation or the fully turn-off situation.

Eventually, in step (S 10 ), the R-phase switching member set (S RH , S RL ), the S-phase switching member set (S SH , S SL ), the T-phase switching member set (S TH , S TL ), and the N-phase switching member set (S NH , S NL ) execute their switching operations based on the corresponding next-period switching duty cycles, such that the three-phase four-wire inverter 1 outputs an output voltage steadily.

In order to prove that the load impedance estimation and repetitive control method proposed by the present invention can indeed make the three-phase four-wire inverter output an output voltage steadily, a variety of experiment data are presented as follows. Please refer to FIG. 6A and FIG. 6B , which illustrate 5 circuit diagrams for the equivalent RLC load; moreover, please simultaneously refer to FIG. 7 , which show the waveform diagram of the R-phase output voltage (ν RN ), the S-phase output voltage (ν SN ), the T-phase output voltage (ν TN ), and the load current measured under 5 kW output power. As shown in FIG. 7 , even if the originally-connected loads are replaced by other different loads, the three-phase four-wire inverter 1 still can provide a steady output voltage to the connected loads. Furthermore, please refer to FIG. 8 , which show the waveform diagram of the R-phase output voltage (ν RN ), the S-phase output voltage (ν SN ), the T-phase output voltage (ν TN ), and the load current measured under 10 kW output power. As shown in FIG. 8 , similarly, the three-phase four-wire inverter 1 still can provide a steady output voltage to the connected loads even if the originally-connected loads are replaced by other different loads.

Besides, please refer to FIG. 9 , which show the waveform diagram of the R-phase output voltage (ν RN ), the S-phase output voltage (ν SN ), the T-phase output voltage (ν TN ), and the load current. As shown in FIG. 9 , when the inverter 1 connects with a non-linear load, the total harmonic distortion (V THD ) of the R-phase output voltage (ν RN ), the S-phase output voltage (ν SN ), the T-phase output voltage (ν TN ) is smaller than 1.4%; moreover, all the waveforms of the R-phase output voltage (ν RN ), the S-phase output voltage (ν SN ), the T-phase output voltage (ν TN ) are still a sinusoidal wave.

Therefore, through above descriptions, the load impedance estimation and repetitive control method capable of allowing inductance variation for inverter proposed by the present invention has been introduced completely and clearly; in summary, the present invention includes the primary advantages of: the present invention's method is applied for predicting corresponding next-period switching duty cycles for four switching member sets of the inverter by way of sampling three phase voltages and calculating next-period voltage compensations based on the previous line-period voltage compensations. Moreover, during the calculation and prediction, the method also involves the inductance variations of the output inductors of the inverter into the load impedance estimation matrix equation. Therefore, the three phases four wires inverter with the presented load impedance estimation and repetitive control method can provide a steady output voltage to the loads even if the originally-connected loads are replaced with other different loads. Thus, this load impedance estimation and repetitive control method can indeed improve the drawbacks of the inverter controller based on conventional DQ transformation method.

The above description is made on embodiments of the present invention. However, the embodiments are not intended to limit scope of the present invention, and all equivalent implementations or alterations within the spirit of the present invention still fall within the scope of the present invention.