Method for preparing semiconductor devices applied in flip chip technology

The invention relates to a preparation method of semiconductor devices, in particular, the invention relates to a method for preparing semiconductor devices applied in flip chip technology at a wafer level.

Flip chip technology is widely applied in the semiconductor packaging process in which a semiconductor chip with metal bumps is flipped and mounted on a substrate such as a die paddle or a circuit board, and the like. The semiconductor chip is flipped and mounted by a special equipment in two steps: first, a semiconductor chip (or a complete packaged device) is picked up from the wafer and flipped with a handler, then the flipped chip is transferred to another handler and attached on the substrate with electrical and mechanical connections. An obvious problem of the existing method is that the process is complicated to operate and the production efficiency, or Unit Per Hour (UPH), is extremely low.

In conventional wafer level packaging technology, the front surface of the semiconductor wafer needs to be encapsulated by a plastic package material to improve the physical strength of the semiconductor wafer, thus, the scribe lines at the front of the semiconductor wafer are also covered by the plastic package material, therefore the traditional cutting steps to separate individual semiconductor devices would be inapplicable.

U.S. Pat. No. 6,107,164 proposes a method for dicing an encapsulated semiconductor wafer. In this method, grooves are formed along the scribe lines between semiconductor chips at the front of the wafer and a plastic package layer is applied to cover the front surface of the wafer and to fill the grooves. The back of the wafer is then grounded to expose grooves from the back. Finally, the wafer is divided into pieces at the exposed groove portions. However, in this method, the groove must be deep enough or the wafer must be ground thin enough to expose the groove, which is obviously not very practical to apply in the actual production. On the other hand, during the process of making the semiconductor chips from the wafer, the back side of the wafer is ground, etched, and then ion injection and metallization are carried out. The etching step is essential to eliminate lattice damage at the back side of the wafer due to grinding. As a result, the back side of the wafer is easy to corrode during the etching step.

FIG. 1A is a process flow for making a semiconductor device of the prior art. In steps S 1 -S 2 , after the semiconductor wafer passed the inspection, the wafer is attached to an adhesive film with the front side of the wafer facing upward, then the wafer is cut, as shown in step S 3 , to separate individual chips from the wafer. On the other hand, a bonding material (such as a solder) is deposited to coat on a substrate (such as lead-frame/substrate and the like) as shown in step S 4 . Thus, the individual chips are picked up from the adhesive film and flipped by a special flip chip device and then attached on the substrate through the bonding material as shown in step S 5 , as such the electrode/contact terminal at the front surface of the chip faces downward and is electrically and mechanically connected to the contact area (such as, the metal area or pad) on the substrate. A reflow soldering is carried out as shown in step S 6 . A plastic package material is deposited to encapsulate each semiconductor chip as shown in step S 7 following by the post curing the plastic package layer under high temperature as shown in step S 8 . The plastic package layer is then marked with, for example product lot, part name, manufacturer logos, etc, as shown in Step S 9 . As shown in step S 10 , the substrate and the plastic package layer are cut through to separate the individual package device containing the semiconductor chip. As shown in steps S 11 -S 12 , the package device is inspected, packed and finally shipped out to customer.

As mentioned above, the method of FIG. 1 is complicated to operate and the production efficiency or Unit Per Hour (UPH) is extremely low.

It is within this context that embodiments of the present invention arise.

As shown in attached drawing, the embodiment of the invention is more sufficiently described. However, the attached drawing is only used for explaining and illustrating rather than limiting the scope of the invention.

FIG. 1A is a flow diagram of a flip chip process in the prior art.

FIG. 1B is a flow diagram of a flip chip process of the present invention.

FIGS. 2A-2L are cross-sectional schematic diagrams of a process of making a semiconductor device including forming a support ring at the back surface for a mechanical support for the thinned wafer.

FIG. 2M is a top view of the wafer shown in FIG. 2D including a first ring area at the edge of the front surface of the wafer not being covered by a first plastic package layer.

FIGS. 3A-3C are cross-sectional schematic diagrams of some steps of a process of making a semiconductor device without forming a support ring at the back surface of the wafer.

FIGS. 4A-4J are schematic diagrams of a process of making a semiconductor device including forming a recessed ring area at the edge of the back surface of the thinned wafer.

FIGS. 5A-5D are schematic diagrams of some steps in a process of making a semiconductor device including cutting along a scribe line to form a deep groove.

FIGS. 6A-6F are cross-sectional schematic diagrams of a process of making a semiconductor device including grinding the outermost portion of a metal layer to form a second ring area.

FIGS. 7A-7E are cross-sectional schematic diagrams of a process of making a semiconductor device with the metal bumps not completely encapsulated by the plastic package layer.

FIGS. 8A-8C are cross-sectional schematic diagrams of some steps of a process of making a semiconductor device including forming another plastic package layer at the back surface of the wafer.

FIGS. 9A-9D are cross-sectional schematic diagrams of different semiconductor devices formed with different processes of the present invention.

Referring to FIG. 2A , a semiconductor wafer 100 includes, at its front surface, a plurality of semiconductor chips and a plurality of scribe lines 105 each of which locates between two adjacent chips. The scribe line can be used as the reference for cutting to separate individual chips from the wafer, which is well known in the art. A plurality of metal pads 110 are formed at the front surface of the semiconductor chip for connecting to a power supply, to the ground, or to an external circuit. Commonly, an under-bump metal (UBM) layer, such as Ni/Au, (not shown) is firstly plated on metal pads 110 . A metal ball or bump 111 is formed on each metal pad 110 , for example, a tin soldering ball, or copper bump in spherical, cylindrical or wedge shape, and the like. A first plastic package layer 120 is formed to cover the front surface of the wafer 100 . The first plastic package layer 120 may include epoxy plastic material. In a preferred embodiment, the first plastic package layer 120 only covers the center area of the front surface of the wafer 100 , and not covers the outermost ring area of the front surface of the wafer 100 . As shown in the cross-sectional schematic diagram of FIG. 2C or the top view of FIG. 2M , similar to the wafer, the surface area of the first plastic package layer 120 is also a circle with the radius of the first plastic package layer 120 smaller than that of the wafer, as such a first ring area 103 without being covered by the first plastic package layer 120 is formed at the edge of the front surface of the wafer 100 with both ends of each scribe line 105 exposing in the first ring area 103 .

As shown in FIGS. 2C-2D , the metal bumps 111 are completely covered by the first plastic packaging layer 120 , thus the first plastic package layer 120 is ground to expose the metal bumps 111 from the first plastic package layer 120 . Then, the first plastic package layer 120 is cut along a straight line formed by two ends of each scribe line 105 exposing in the first ring area 103 , as shown in FIG. 2E , forming a plurality of shallow grooves as reference lines 121 , with each reference line 121 being superimposed with a corresponding scribe line 105 . The mechanical strength of the wafer 100 is increased due to the physical support of the first plastic package layer 120 , therefore the wafer 100 can be thinned without breaking. In FIG. 2F , the wafer 100 is flipped, then the center area of the back surface of the wafer 100 is ground to thin the wafer by a grinding wheel (not shown) to form a recessed area 150 , while the outermost area of the wafer 100 is not ground, thus a support ring 100 a is formed at of the edge of the back surface of the wafer 100 . The radius of the recessed area 150 is preferably smaller than that of the first plastic package layer 120 , therefore the support ring 100 a is partially overlapped with the first plastic package layer 120 , as such the mechanical strength of the wafer is improved.

As shown in FIGS. 2G-2H , a metal layer 130 is deposited at the back surface of the thinned wafer, then, the support ring 100 a is cut off. In an optional embodiment, after the wafer is thinned, the back surface of the thinned wafer is further etched and then injected with dopant to improve the Ohmic contact. As shown in FIG. 21 , the thinned wafer 100 is flipped back and mounted with the metal layer 130 attached on an adhesive film 140 . The first plastic package layer 120 , the wafer 100 and the metal layer 130 are thus singulated along the reference line 121 , forming kerfs 115 , by a cutter blade 240 as shown in FIG. 2J forming a plurality of individual semiconductor devices 200 A, each of which includes a semiconductor chip 101 and is still attached on the adhesive film 140 . The singulation of the first plastic package layer 120 forms a plurality of top plastic package layers 120 ′ each of which covers a front surface of each chip 101 . The singulation of the metal layer 120 forms a plurality of the bottom metal layers 130 ′ each of which located at the back surface of each chip 101 . As a result, each device 200 A comprises a semiconductor chip 101 , a top plastic package layer 120 ′, a bottom metal layer 130 ′ and metal bumps 111 formed on the pads 110 at the front surface of the chip 101 , where the top plastic package layer 120 ′ surrounds the metal bumps 111 with the top surface of the metal bumps 111 exposed from the top plastic package layer 120 ′. Furthermore, as shown in FIG. 2K , the whole structure including the devices 200 A attached on the adhesive film 140 is flipped one more time and attached on another adhesive film 160 . Both of the adhesive films 140 and 160 can be ultraviolet (UV) films. As shown in FIG. 2L , the adhesive film 140 is removed. At this stage, the metal bumps 111 of the semiconductor device 200 A face downward, so that the semiconductor device 200 A can be directly picked up by a common equipment from the adhesive film 160 and attached onto a substrate (such as metal substrate or PCB), without a need of an additional special flip-chip equipment to flip each device before attaching it into the substrate as described above in the FIG. 1A of the conventional process.

In a preferred embodiment, the semiconductor chip 101 is a vertical power device with the current flowing from the front to the back or vice versa, for example, a MOSFET and the like, in which the plurality of pads 110 include the source and gate pads and the bottom metal layer 130 ′ include the drain.

In another embodiment, the wafer 100 is not required to be ultra-thin; therefore the wafer is only ground to a predetermined thickness for reducing the substrate resistance without forming the support ring 100 a . For example, after completing the steps of FIG. 2E , as shown in FIG. 3A-3C , the wafer is flipped and then is uniformly ground from its whole back surface. A metal layer 130 is deposited on the back surface of the thinned wafer 100 . The wafer 100 is then flipped back and the metal layer 130 at the back surface of the thinned wafer 100 is attached on an adhesive film 140 . This process is completed with the steps of FIG. 2J-2L .

In another embodiment, the first ring area 103 at the front of the wafer 100 is not necessary, for example, as shown in FIG. 4A-4B , after the metal bumps 111 is deposited on each pad 110 , the wafer 100 is cut from its front surface along the scribe lines 105 forming deep grooves 105 ′, then, a first plastic package material 1200 is deposited forming the first plastic package layer 120 completely covering the whole front surface of the wafer 100 and also filling in the deep grooves 105 ′. If the scribe line 105 has a first depth and the deep groove 105 ′ has a second depth, the second depth is larger than the first depth, where the second depth is about ½ to ⅔ of the thickness of the thinned wafer 100 and the first depth is negligible comparing to the second depth or the depth of the thinned wafer. As shown in FIG. 4B , the first plastic package layer 120 completely encapsulates the metal bumps 111 . As shown in FIG. 4C , the first plastic package layer 120 is ground to expose the metal bumps 111 . The wafer 100 is flipped and then ground from it back surface, as shown in FIG. 4D , similar to the step shown in FIG. 2F with a support ring 100 a formed at the edge of the back surface of the wafer, and then the metal layer 130 is deposited at the back surface of the thinned wafer 100 .

As shown in FIGS. 4E-4F , the outermost portion of the metal layer 130 and the outermost portion at the back surface of the wafer 100 including the support ring 100 a are ground by a grinding wheel 250 in a circular motion around the center of the wafer 100 forming a recessed ring area 106 around the edge at the back surface of the thinned wafer 100 and recessed from the metal layer 130 with the end portions of the deep grooves 105 ′ filled with the plastic package material 1200 exposed in the recessed ring are 106 as shown in the top view of FIG. 4G . As shown in FIG. 4H , the first plastic package layer 120 is attached on the adhesive film 160 . The metal layer 130 , the thinned wafer 100 , the first plastic package layer 120 and the plastic package material 1200 filled in the deep grooves 105 ′ are singulated along a straight line formed by two end of the deep grooves 105 ′ exposed in the recessed ring area 106 forming kerfs 115 , as such a plurality of semiconductor devices 200 B are formed as shown in the top view of FIG. 4I and the cross-sectional view of FIG. 4J . In an alternative embodiment, the first plastic package layer 120 is attached to the adhesive film 160 in the step of FIG. 4E before the grinding step to form the recessed ring area 106 .

The semiconductor device 200 B is only different from the semiconductor device 200 A as follows: if a cutter blade 240 is narrower than the deep groove 105 ′, the plastic package material 1200 in the deep groove 105 ′ is not cut off completely, as such a first side plastic package layer 1200 ′ is formed on the side wall at the top portion of the semiconductor chip 101 of the device 200 B.

In an embodiment shown in FIGS. 5A-5D , the only difference between the steps of FIGS. 5A-5D and the steps of FIGS. 2A-2E is as follows: in the steps of FIGS. 5A-5D , after the metal bumps 111 is deposited on each pad 110 , the wafer 100 is cut from its front surface along the scribe line 105 to form deep grooves 105 ′ with a second depth and filled with the plastic package material 1200 similar to FIG. 4A as described above. As such, after the first plastic package layer 120 is formed and ground, it is then cut along a straight line formed by both ends of the deep groove 105 ′ exposed in the first ring area 103 forming a plurality of reference lines 121 (similar as that of FIG. 2E ), thus the remaining steps are the similar as that of FIGS. 2F-2L .

In another embodiment, for example, as shown in FIGS. 6A-6C , after the metal bumps 111 is deposited on each pad 110 , the first plastic package layer 120 is formed to completely cover the whole front surface of the wafer 100 . After the first plastic package layer 120 is ground to expose the metal bumps 111 , the wafer 100 is flipped and the center area of the back surface of the wafer 100 is ground to thin the wafer, which forms a support ring 100 a with the original thickness at the edge of back surface of the wafer 100 . A metal layer 130 is then deposited at the back surface of the thinned wafer 100 , then the whole wafer is attached on an adhesive film 160 with the first plastic package layer 120 directly attached on the adhesive film 160 . The outermost portion of the metal layer 130 and the support ring 100 a at the back surface of the wafer 100 are ground by a grinding wheel 250 in a circular motion around the center of the wafer 100 as shown in FIG. 6D , thus the radius of the metal layer 130 is reduced and a second ring area 107 not covered by the metal layer 130 is formed at the edge of the back surface of the thinned wafer 100 . Two ends of each scribe line 105 located in the second ring area 107 is detected through the thinned wafer 100 by an infrared ray. As such, the metal layer 130 , the wafer 100 and the first plastic package layer 120 are cut through a straight line formed by the two detected ends of the scribe line 105 forming a plurality of semiconductor devices 200 C that is similar to the semiconductor devices 200 A in FIG. 2L .

In another embodiment, as shown in FIG. 7A-7B , the first plastic package layer 120 is deposited to cover the whole front surface of the wafer 100 after the deep grooves 105 ′ is formed, but the first plastic package layer 120 is not completely encapsulated the metal bumps 111 , for example, the thickness of the first plastic package layer 120 is smaller than the height of the metal bumps 111 , as such the metal bumps 111 is exposed from the first plastic package layer 120 . The wafer 100 is then flipped, as shown in FIG. 7C , and the wafer 100 is ground to thin form its back surface followed by the deposition of a metal layer 130 at the back surface of the thinned wafer 100 . As shown in FIG. 7D , the outermost portion of the metal layer 130 and that at the back surface of the wafer 100 are ground by the grinding wheel 250 around the edge at the back surface of the wafer 100 forming a recessed ring area 106 recessed from the metal layer 130 such that both ends of the deep groove 105 ′ filled with the plastic package material 1200 exposed at the ring area 106 ( FIG. 7D ). The first plastic package layer 120 is attached on an adhesive film (not shown) similarly as described above, then the metal layer 130 , the wafer 100 , the first plastic package layer 120 and the plastic package material 1200 filled into the deep groove 105 ′ is cut along the straight line formed by both ends of the deep groove 105 ′ exposed in the ring area 106 forming a plurality of semiconductor devices 200 D as shown in FIG. 7E , which similar to the semiconductor devices 200 A as shown in FIG. 2L excepting that the metal bumps 111 of the device 200 D are exposed from the top plastic package body 120 ′ formed by cutting from the first plastic package layer 200 . Furthermore, different from the semiconductor devices 200 B in FIG. 4J , the sidewall of the top portion of the chip 101 in the semiconductor devices 200 D is not covered with the plastic package material. In particular, if the cutter blade 240 is wider than the deep groove 105 ′, the structure similar to the semiconductor devices 200 D is formed. Otherwise, if the cutter blade 240 is narrower than the deep groove 105 ′, the structure similar to the semiconductor devices 200 B is formed.

In another embodiment, after FIG. 7A-7D are completed, as shown in FIG. 8A , the metal layer 130 and a bottom portion of the wafer 100 are cut from the back surface of the wafer 100 along the straight line formed by both ends of the deep groove 105 ′ filled with the plastic package material 1200 in the ring area 106 forming a plurality of cutting grooves 170 , where each cutting groove 170 are superimposed with each deep groove 105 ′, thus the metal layer 130 is cut to form a plurality of bottom metal layers 130 ′. In an embodiment, the bottom of cutting groove 170 is in contact with the bottom of the deep groove 105 ′. As shown in FIG. 8B , a second plastic package material 1800 is deposited to fill the cutting grooves 107 and to form a second plastic package layer 180 covering the bottom metal layers 130 ′. Then, the first plastic package layer 120 , the second plastic package layer 180 , the plastic package material 1200 filled into the deep groove 105 ′ and the plastic package material 1800 filled into the cutting groove 170 are cut along the straight line formed by both ends of the deep groove 105 ′ filled with the plastic package material 1200 exposed in the ring area 106 to form a plurality of semiconductor devices 200 E, where the second plastic package layer 180 is cut to form a plurality of the bottom plastic package layers 180 ′ covering the bottom metal layers 130 ; the first plastic package layer 120 is cut to form a plurality of the top plastic package layer 120 ″ covering the front of semiconductor chips 101 with the metal bumps 111 exposed from the top plastic package layer 120 ″.

The width of the kerfs 115 is varied depending on the width of the cutter blade 240 , thus the semiconductor device with or without plastic package layer covering the side wall of the semiconductor chip 101 is formed. For example, the side wall of the chip 101 in FIG. 7E is not covered with any plastic package layer formed by completely cutting the plastic package material 1200 filled in the deep groove 105 ′. In FIG. 8C , the cutter blade 240 is narrower than the deep groove 105 ′ and the cutting groove 170 , so that the plastic package material 1200 filled into the deep groove 105 ′ is cut to form the first side plastic package layer 1200 ′, and the plastic package material 1800 filled into the cutting groove 107 is cut to form the second side plastic package layer 1800 ′. The first side plastic package layer 1200 ′ covers on the side wall of the top portion of the chip 101 and the second side plastic package layer 1800 ′ covers on the side wall of the bottom portion of the chip 101 . In the semiconductor device 200 E, the semiconductor chip 101 is completely encapsulated by the first side plastic package layer 1200 ′, the top plastic package layer 120 ′, the second side plastic package layer 1800 ′ and the bottom plastic package layer 180 ′. In an alternative embodiment, in the semiconductor device 200 E′ as shown in FIG. 9D , the bottom of the cutting groove 170 is not in contact with the bottom of the deep groove 105 ′, therefore the first side plastic package layer 1200 ′ covers on the side wall of the top portion chip 101 and the second side plastic package layer 1800 ′ covers on the side wall of the bottom portion of the chip 101 , but the side wall of the middle portion 1010 of the chip 101 is not covered with any plastic package layer. The structures of the semiconductor devices 200 A, 200 B, 200 E and 200 E′ are shown in FIG. 9A to FIG. 9D .

Furthermore, compared to the convention method as shown flow diagram of FIG. 1A , in the current method as shown in the flow diagram shown in FIG. 1B , the steps S 1 , S 4 and S 6 -S 12 of the current method are same with steps S 6 -S 12 of the prior art method, but the steps S 2 , S 3 and S 5 of FIG. 1A of the prior art method are replace with steps S 2 ′, S 3 ′ and S 5 ′ of FIG. 1B of the current method. In step S 2 ′ the wafer is flipped and then attached on an adhesive film with the back surface of the wafer facing upward or the chip facing downward. In step S 3 , the wafer is cut from its backside to separate individual chips from the wafer along a straight line formed by two ends of a scribe line that can be exposed in a grounded ring area, for example ring area 103 or ring area 106 , or can be detected by an infrared ray through a ground ring area, for example ring area 107 , as described above. As such, the semiconductor devices 200 A- 200 E formed by the current method include a semiconductor chip with the metal bumps 111 formed at it front surface facing downward. As a result, a regular die pick up equipment (not a flip chip die pick up equipment) can be used to pick up the semiconductor devices 200 A- 200 E from the adhesive film 160 and attach the devices on a substrate without flipping the devices. If the metal bumps 111 are made of a tin soldering material, it can be directly attached on a metal pad on the substrate. If the metal bumps 111 are not made of an adhesive material, an additional bonding material is needed for the electrical and mechanical connection between the metal bumps and the substrate.

The above detailed descriptions are provided to illustrate specific embodiments of the present invention and are not intended to be limiting. Numerous modifications and variations within the scope of the present invention are possible. The present invention is defined by the appended claims.