Bulk-driven current-sense amplifier and operating method thereof

The present invention relates to a sense amplifier applicable to non-volatile memory, and more particularly to a bulk-driven current-sense amplifier applicable to non-volatile memory and an operating method thereof, which enable increased rate of successful operation of the memory.

Thanks to the progress in the scientific and technological fields, various kinds of electronic products have been developed, bringing more conveniences and comfortableness to people's daily life. Memory integrated circuits play a very important role in these electronic products. The currently available memory integrated circuits may be generally divided into two types, namely, volatile memory and non-volatile memory, according to their data storage characteristics.

The non-volatile memory can retain the stored data even when no power is supplied thereto. Among others, a resistive memory is one type of memory device that, after having written in data, would generate a voltage difference for storing the data as 0 or 1. Please refer to FIG. 1 that is a diagram of a resistive memory device. As shown, the R CELL is a main component in the resistive memory device and will switch to a low resistance state or a high resistance state after data is written thereinto. The low resistance is about 20K ohm, and the high resistance is usually higher than 2M ohm. In other words, in the high resistance state, the resistive memory device is almost in the open-circuit (OFF) state. To read the data, a bias voltage can be applied to a terminal of the R CELL , and the current flowing through the R CELL is sensed by a sense amplifier to thereby read out the data. When operating under a normal voltage, the produced cell current is about 4 μA.

Please refer to FIG. 2 that is a diagram of a conventional current-sense amplifier. As shown, in the conventional current-sense amplifier, a P-type metal-oxide-semiconductor field-effect transistor (PMOSFET or PMOS) is connected to form a diode. That is, the drain and the gate of the PMOS are connected to each other. The transistor would have a stabilized gate voltage according to the current flowing therethrough. In this manner, a comparison current can be generated for comparing with the cell current. For example, in the resistive memory, when the current flowing through the transistor in the low resistance state is 4 μA and the current flowing through the transistor in the high resistance state is 0.2 μA, a current of 2 μA can be selected for use as the comparison current (I REF ). Since different currents have different stabilized voltages, a simple comparator can be used to compare the cell current with the comparison current and find out the value of data stored in the memory cell.

However, when the conventional current-sense amplifier operates, the required voltages V MAT and V REF must at least be V DD −V TH −V OV . Under general manufacturing process, the PMOS has a VTH about 300 mV. In the case the operating voltage is 0.5V, then the voltages V MAT and V REF are only about 150 mV (i.e. V DD −V TR −V OV =500 mV−300 mV−50 mV=150 mV). Therefore, the conventional current-sense amplifier tends to cause failed memory operation.

It is therefore tried by the inventor to develop a bulk-driven current-sense amplifier and an amplifier operating method capable of increasing the rate of successful operation of memory to meet the current market demands.

A primary object of the present invention is to provide a bulk-driven current-sense amplifier and an amplifier operating method, so as to improve the conventional current-sense amplifiers that, when operating normally, tend to cause memory operation failure.

To achieve the above and other objects, the bulk-driven current-sense amplifier according to an embodiment of the present invention includes a differential amplifier, a first driver, and a second driver. The differential amplifier includes a first voltage input terminal, a second voltage input terminal, and a voltage output terminal. The first driver includes a first transistor, a first switch, and a first memory unit. The first transistor has a drain coupled to a body of the first transistor and the first voltage input terminal of the differential amplifier to form a first node. The second driver includes a second transistor, a second switch, and a second memory unit. The second transistor has a drain coupled to a body of the second transistor and the second voltage input terminal of the differential amplifier to form a second node. When the first switch and the second switch are turned on, the differential amplifier charges the first and the second node. When the charging is completed, the first and second nodes have stabilized first and second potentials, respectively, according to the current flowing through the first and the second memory unit, and the differential amplifier generates a voltage output to the voltage output terminal.

In the above embodiment, the first and the second transistor are respectively a P-type metal-oxide-semiconductor field-effect transistor (PMOSFET or PMOS).

To achieve the above and other objects, the bulk-driven current-sense amplifier according to another embodiment of the present invention includes a differential amplifier, a first driver, and a second driver. The differential amplifier includes a first voltage input terminal and a second voltage input terminal. The first driver includes a first transistor, a first switch, and a first memory unit. Further, the first driver is coupled to the first voltage input terminal of the differential amplifier, so that a first node is formed at a connectivity segment of the first driver coupled to the first voltage input terminal. The second driver includes a second transistor, a second switch, and a second memory unit. Further, the second driver is coupled to the second voltage input terminal of the differential amplifier, so that a second node is formed at a connectivity segment of the second driver coupled to the second voltage input terminal. When the first and the second switch are turned on, the differential amplifier charges the first and the second node. When the charging is completed, the first and second nodes have different stabilized potentials according to the currents respectively flowing through the first and second memory units, and the differential amplifier generates a voltage.

To achieve the above and other objects, the amplifier operating method according to the present invention is applicable to a bulk-driven current-sense amplifier that includes a differential amplifier, a first driver, and a second driver. The first driver is coupled to the differential amplifier and a first node is formed at a connectivity segment of the first driver coupled to the differential amplifier; and the second driver is coupled to the differential amplifier and a second node is formed at a connectivity segment of the second driver coupled to the differential amplifier. The amplifier operating method according to the present invention includes the following steps: (1) When a first switch of the first driver and a second switch of the second driver are turned on, the differential amplifier charges the first and the second node; (2) when the charging is completed, the first and the second node have a first and a second potential, respectively, according to the currents flowing through a first memory unit of the first driver and a second memory unit of the second driver; and (3) the differential amplifier generates a voltage.

With the above arrangements, the bulk-driven current-sense amplifier and the amplifier operating method according to the present invention provide one or more of the following advantages:

(1) The differential amplifier has two voltage input terminals separately connected to the body and the drain of the two PMOS transistors. Due to the voltage VDS in the linear region and the Body Effect, the first and the second node, according to the currents flowing through the first and the second memory unit, can respectively have a stabilized voltage, which is higher than the conventional current-sense amplifier input stage; and

(2) In the resistive memory cell as shown in FIG. 1 , the higher the voltage at the BL is, the larger the cell current generated by the resistive memory cell will be, and the bulk-driven current-sense amplifier and the amplifier operating method according to the present invention can have a relatively wide range of read currents when operating at low voltage.

The structure and the technical means adopted by the present invention to achieve the above and other objects can be best understood by referring to the following detailed description of the preferred embodiments and the accompanying drawings, wherein

FIG. 1 is a diagram of a resistive memory device;

FIG. 2 is a diagram of a conventional current sense amplifier;

FIG. 3 is a circuit diagram of a bulk-driven current-sense amplifier according to an embodiment of the present invention;

FIG. 4 is a circuit diagram of a bulk-driven current-sense amplifier according to an embodiment of the present invention showing a dynamically controlled charging thereof;

FIG. 5 is a waveform diagram according to an embodiment of the bulk-driven current-sense amplifier of the present invention; and

FIG. 6 is a flowchart showing the steps included in an amplifier operating method according to the present invention.

The present invention will now be described with some preferred embodiments thereof and with reference to the accompanying drawings. For the purpose of easy to understand, elements that are the same in the preferred embodiments are denoted by the same reference numerals.

Please refer to FIG. 3 that is a circuit diagram of a bulk-driven current-sense amplifier according to an embodiment of the present invention. As shown, the bulk-driven current-sense amplifier in the embodiment is generally denoted by reference numeral 3 and includes a differential amplifier 30 , a first driver 31 , and a second driver 32 . The differential amplifier 30 has a first voltage input terminal 301 , a second voltage input terminal 302 , and a voltage output terminal 303 . The first driver 31 includes a first transistor T 1 , a first switch S 1 , and a first memory unit 311 . The first transistor T 1 has a drain coupled to a body of the first transistor T 1 and the first voltage input terminal 301 of the differential amplifier 30 to form a first node 312 . The second driver 32 includes a second transistor T 2 , a second switch S 2 , and a second memory unit 321 . The second transistor T 2 has a drain coupled to a body of the second transistor T 2 and the second voltage input terminal 302 of the differential amplifier 30 to form a second node 322 . Further, the first and the second transistor T 1 , T 2 are respectively a P-type Metal-Oxide-Semiconductor Field-Effect transistor (PMOSFET or PMOS).

The first memory unit 311 includes a first capacitor C BL and a first load R CELL . The first load R CELL has an input terminal coupled to a terminal of the first capacitor C BL and a terminal of the first switch S 1 . The second memory unit 321 includes a second capacitor C REF and a second load R REF . The second load R REF has an input terminal coupled to a terminal of the second capacitor C REF and a terminal of the second switch S 2 .

When the first switch S 1 and the second switch S 2 are turned on, the differential amplifier 30 charges the first node 312 and the second node 322 . When the charging is completed, the first node 312 and the second node 322 have a stabilized first potential and a stabilized second potential, respectively, according to the current I CELL flowing through the first load R CELL and the current I REF flowing through the second load R REF . When a voltage difference between the first potential and the second potential is larger than a preset value, the differential amplifier 30 generates a voltage D OUT output to the voltage output terminal 303 .

FIG. 4 is a circuit diagram of a bulk-driven current-sense amplifier according to an embodiment of the present invention showing a dynamically controlled charging thereof. As shown, the bulk-driven current-sense amplifier in the embodiment is denoted by reference numeral 4 , and includes a differential amplifier 40 , a first driver 41 , and a second driver 42 .

The first driver 41 includes a first transistor T 1 , a first switch S 1 , a first capacitor C BL , and a first load R CELL . In the embodiment, the first transistor T 1 can be a PMOSFET or PMOS. The first transistor T 1 has a drain coupled to a body of the first transistor T 1 and a terminal of the first switch S 1 to form a first node 43 ; a source coupled to a power source V DD , which serves as a common terminal; and a gate coupled to a ground, which serves as a common terminal. The first load R CELL has an input terminal coupled to a terminal of the first capacitor C BL and another terminal of the first switch S 1 . The first capacitor C BL has another terminal coupled to the ground that serves as a common terminal.

The second driver 42 includes a second transistor T 2 , a second switch S 2 , a second capacitor C REF , and a second load R REF . In the embodiment, the second transistor T 2 can be a PMOSFET or PMOS. The second transistor T 2 has a drain coupled to a body of the second transistor T 2 and a terminal of the second switch S 2 to form a second node 44 ; a source coupled to the power source V DD , which serves as a common terminal; and a gate coupled to the ground, which serves as a common terminal. The second load R REF has an input terminal coupled to a terminal of the second capacitor C REF and another terminal of the second switch S 2 . The second capacitor C REF has another terminal coupled to the ground that serves as a common terminal.

The differential amplifier 40 includes a third transistor T 3 , a fourth transistor T 4 , a fifth transistor T 5 , a sixth transistor T 6 , a seventh transistor T 7 , an eighth transistor T 8 , a third switch S 3 , and an inverter I. In the embodiment, the third, fourth, fifth and sixth transistors T 3 ˜T 6 can respectively be a PMOSFET or PMOS, while the seventh and eighth transistors T 7 , T 8 can respectively be an N-type Metal-Oxide-Semiconductor Field-Effect transistor (NMOSFET or NMOS). The third to the sixth transistor T 3 ˜T 6 respectively have a source coupled to the power source V DD that serves as a common terminal; and the seventh and the eighth transistor T 7 , T 8 respectively have a source coupled to the ground that serves as a common terminal.

The third transistor T 3 has a drain and the seventh transistor T 7 has a gate, which are coupled to the first node 43 . The fourth transistor T 4 has a drain and the eighth transistor T 8 has a gate, which are coupled to the second node 44 . The third and the fourth transistor T 3 , T 4 respectively have a gate coupled to a current output terminal of the inverter I. The fifth transistor T 5 has a drain coupled to a terminal of the third switch S 3 and a drain of the seventh transistor T 7 . The sixth transistor T 6 has a drain coupled to a drain of the eighth transistor T 8 . A gate of the fifth transistor T 5 , a gate of the sixth transistor T 6 , another terminal of the third switch S 3 , and a current input terminal of the inverter I are coupled to one another to form a third node 401 .

Please refer to FIG. 5 that is a waveform diagram according to an embodiment of the bulk-driven current-sense amplifier of the present invention. As shown, in the illustrated embodiment, the bulk-driven current-sense amplifier has operating steps divided into two stages 51 and 52 .

The first stage 51 is a dynamically controlled charging stage.

In the first stage 51 , when the first switch S 1 , the second switch S 2 and the third switch S 3 are turned on, an initial potential at BL is zero, which causes drop of voltages V MAT and V REF . By extending the time during which the third and the fourth transistors (PMOS) T 3 , T 4 are kept to ON, the V MAT and V REF can be charged. Moreover, the ending of the charge time is controlled by the differential amplifier. When the differential amplifier operates, V DIFFP will drop, and the inverter I is connected to the gate voltage of the third and the fourth transistor T 3 , T 4 again to thereby turn off the third and the fourth transistor T 3 , T 4 . Thus, the third and the fourth transistor (PMOS) T 3 , T 4 will stop charging.

The second stage 52 is a reading stage.

When the dynamically controlled charging stage 51 is ended, V MAT and V REF respectively have a potential close to that of V DD , but then respectively have a stabilized voltage according to the current I CELL flowing through the first load R CELL and the current I REF flowing through the second load R REF . When a voltage difference between the V MAT and the V REF is large enough for the differential amplifier to generate a voltage D OUT output to the output terminal thereof, the reading stage is ended. For example, when the D ODT is changed from zero to V DD , it represents the data being read is 1.

Although the active components illustrated in the circuits of the embodiments of the present invention are P-type or N-type transistors, one of ordinary skill in the art understands that the active components in the circuits of the present invention can be otherwise bipolar transistors or different combinations of bipolar transistors and field-effect transistors. It is noted the above embodiments are only illustrative and not intended to limit the present invention in any way.

While the above description of the bulk-driven current-sense amplifier of the present invention has also introduced a concept about the operating method of the bulk-driven current-sense amplifier, a flowchart showing more detailed steps of an amplifier operating method according to the present invention is nevertheless provided herein for the purpose of clarity.

Please refer to FIG. 6 that is a flowchart showing the steps included in the amplifier operating method according to the present invention. As shown, the operating method is applicable to a bulk-driven current-sense amplifier that includes a differential amplifier, a first driver, and a second driver. The first driver is coupled to the differential amplifier, and a first node is formed at a connectivity segment of the first driver coupled to the differential amplifier. Similarly, the second driver is coupled to the differential amplifier, and a second node is formed at a connectivity segment of the second driver coupled to the differential amplifier. The amplifier operating method includes the following steps S 61 , S 62 and S 63 .

In the step S 61 , when a first switch included in the first driver and a second switch included in the second driver are turned on, the differential amplifier charges the first node and the second node.

In the step S 62 , when the charging is completed, the first node and the second node have a stabilized first potential and a stabilized second potential, respectively, according to the current flowing through a first memory unit included in the first driver and the current flowing through a second memory unit included in the second driver.

In the step S 63 , the differential amplifier generates a voltage.

Since the details and the implementation of the amplifier operating method of the present invention have already been recited in the above description of the bulk-driven current-sense amplifier of the present invention, they are not repeatedly discussed herein.

In conclusion, with the bulk-driven current-sense amplifier and the amplifier operating method according to the present invention, the differential amplifier has two voltage input terminals separately connected to the body and the drain of two PMOS transistors. Due to the voltage VDS in the linear region and the Body Effect, V MAT and V REF can have stabilized voltages according to the currents flowing through the first and the second memory unit. Under this condition, only one voltage V DS is needed. Therefore, the required voltages for V MAT and V REF are V DD -V ov . In the case the V DD is 0.5V, the voltages V MAT and V REF are respectively about 350 mV, which is higher than the conventional current-sense amplifier input stage.

In addition, in the resistive memory cell, since the voltage at the BL is the same as the voltage V MAT during data reading, and the higher the voltage at the BL is, the larger the cell current generated by the resistive memory cell will be, the bulk-driven current-sense amplifier and the amplifier operating method according to the present invention can have a relatively large range of read currents when operating at low voltage.

The present invention has been described with some preferred embodiments thereof and it is understood that many changes and modifications in the described embodiments can be carried out without departing from the scope and the spirit of the invention that is intended to be limited only by the appended claims.