Inventor

Meng-Fan Chang

Inventor

Taichung, TW

Overview

2001–2020

Patent span

Physics

Primary field (CPC G)

Patents· 65 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores72%

G06FElectric digital data processing8%

H03KPulse technique6%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%

G06NComputing arrangements based on specific computational models3%

H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%

G01RMeasuring electric variables1%

G05FSystems for regulating electric or magnetic variables1%

H03FAmplifiers1%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h101%

PatentTitleYear

10,770,142Memory device2020 10,748,612Sensing circuit with adaptive local reference generation of resistive memory and sensing method thereof2020 10,734,039Voltage-enhanced-feedback sense amplifier of resistive memory and operating method thereof2020 10,636,481Memory cell for computing-in-memory applications, memory unit for computing-in-memory applications and computing method thereof2020 10,607,698Control circuit configured to terminate a set operation and a reset operation of a resistive memory cell of memory array based on the voltage variation on the data line of the resistive memory cell2020 10,510,406Soft-verify write assist circuit of resistive memory and operating method thereof2019 10,510,386Dynamic bit-line clamping circuit for computing-in-memory applications and clamping method thereof2019 10,481,965Method and apparatus for determining status element total with sequentially coupled counting status circuits2019 10,410,690Reference-free multi-level sensing circuit for computing-in-memory applications, reference-free memory unit for computing-in-memory applications and sensing method thereof2019 10,381,071Multi-bit computing circuit for computing-in-memory applications and computing method thereof2019 10,340,003Input-pattern aware reference generation system and computing-in-memory system including the same2019 10,262,725Selective bit-line sensing method and storage device utilizing the same2019 10,262,726Transpose accessing memory device and method2019 10,249,360Method and circuit for generating a reference voltage in neuromorphic system2019 10,204,681Control circuit configured to terminate a set operation and a reset operation of a resistive memory cell of memory array based on the voltage variation on the data line of the resistive memory cell2019 10,192,611Sensing circuit, set of pre-amplifiers, and operating method thereof2019 10,186,318Sense amplifier of resistive memory and operating method thereof2019 10,008,275Control method for solid state storage device2018 9,990,302Tag memory and cache system with automating tag comparison mechanism and cache method thereof2018 9,779,802'Memory apparatus and write failure responsive negative bitline voltage write assist circuit thereof'2017 9,728,258'Ternary content addressable memory'2017 9,722,584'Non-volatile latch'2017 9,627,040'6T static random access memory cell, array and memory thereof'2017 9,564,209'Non-volatile static random access memory using a 7T1R cell with initialization and pulse overwrite'2017 9,558,823'Resistance drift recovery method for MLC PCM'2017 9,548,135'Method and apparatus for determining status element total with sequentially coupled counting status circuits'2017 9,502,114'Non-volatile ternary content-addressable memory with bi-directional voltage divider control and multi-step search'2016 9,484,096'Ternary content-addressable memory'2016 9,443,588'Resistive memory system, driver circuit thereof and method for setting resistance thereof'2016 9,431,070'Memory apparatus'2016 9,406,355'Sense amplifier'2016 9,378,780'Sense amplifier'2016 9,312,856'Scheme for 3D voltage type TSV signal transmission'2016 9,312,006'Non-volatile ternary content-addressable memory with resistive memory device'2016 9,299,422'6T static random access memory cell, array and memory thereof'2016 9,230,649'Non-volatile ternary content-addressable memory 4T2R cell with RC-delay search'2016 9,171,590'Sensing marging expanding scheme for memory'2015 9,013,908'Control scheme for 3D memory IC'2015 9,001,571'6T static random access memory cell, array and memory thereof'2015 8,942,027'Memory storage circuit and method of driving memory storage circuit'2015 8,854,083'Sensing amplifier using capacitive coupling to realize dynamic reference voltage'2014 8,848,419'Sensing memory element logic states from bit line discharge rate that varies with resistance'2014 8,829,887'Pulse type layer-ID detector for 3D-IC and method of the same'2014 8,680,909'Layer-ID detector for multilayer 3D-IC and method of the same'2014 8,653,877'Current mirror modified level shifter'2014 8,564,305'Discontinuous type layer-ID detector for 3D-IC and method of the same'2013 8,462,540'Static random access memory cell'2013 8,392,132'Process variation detection apparatus and process variation detection method'2013 8,390,365'Charge pump system for low-supply voltage'2013 8,378,716'Bulk-driven current-sense amplifier and operating method thereof'2013 8,331,134'Non-volatile static random access memory and operation method thereof'2012 8,320,211'Current-sense amplifier with low-offset adjustment and method of low-offset adjustment thereof'2012 8,274,322'Charge pump with low noise and high output current and voltage'2012 8,213,213'Reference current generator for resistance type memory and method thereof'2012 8,169,255'Offset cancellation current mirror and operating method thereof'2012 8,072,244'Current sensing amplifier and method thereof'2011 8,009,498'Memory refresh system and operating method thereof'2011 7,969,193'Differential sensing and TSV timing control scheme for 3D-IC'2011 7,839,706'Dual mode accessing signal control apparatus and dual mode timing signal generating apparatus'2010 7,768,321'Single-ended sense amplifier using dynamic reference voltage and operation method thereof'2010 7,710,815'Access unit for a static random access memory'2010 7,356,656'Skew free control of a multi-block SRAM'2008 7,289,376'Method for eliminating crosstalk in a metal programmable read only memory'2007 6,424,583'System and measuring access time of embedded memories'2002 6,285,604'Dummy memory cells for high accuracy self-timing circuits in dual-port SRAM'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2018Based in Taipei, TW· patent location history

2010–2017Patents assigned to NAT UNIV TSING HUA (33)· patent assignee history

2010–2016Patents assigned to IND TECH RES INST (5)· patent assignee history

2010–2020Based in Taichung, TW· patent location history

2011–2015Patents assigned to CHANG MENG-FAN (15)· patent assignee history

2011–2013Patents assigned to SHEN SHIN-JANG (5)· patent assignee history

2012–2020Based in Hsinchu, TW· patent location history

2019–2020Patents assigned to UNIV NAT TSING HUA (16)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
NAT UNIV TSING HUA	33	2010–2017
UNIV NAT TSING HUA	16	2019–2020
CHANG MENG-FANself	15	2011–2015
IND TECH RES INST	5	2010–2016
SHEN SHIN-JANG	5	2011–2013

Locations

Location	Patents	Span
Taichung, TW	48	2010–2020
Hsinchu, TW	10	2012–2020
Taipei, TW	7	2001–2018