LED chip package structure with multifunctional integrated chips and a method for making the same

1. Field of the Invention

The present invention relates to a LED chip package structure and a method for making the same, and particularly relates to a LED chip package structure with multifunctional integrated chips and a method for making the same.

2. Description of the Related Art

FIG. 1 shows a flowchart of a method for making LED chip package structure of the prior art. The known method includes: providing a plurality of packaged LEDs that have been packaged (S 100 ); providing a strip substrate body that has a positive electrode trace and a negative electrode trace (S 102 ); and then arranging each packaged LED on the strip substrate body in sequence and electrically connecting a positive electrode and a negative electrode of each packaged LED with the positive electrode trace and the negative electrode trace of the substrate body (S 104 ).

However, with regard to the known first method, each packaged LED needs to be firstly cut from an entire LED package structure, and then each packaged LED is arranged on the strip substrate body via a surface mount technology (SMT) process. Hence, the known first packaging process is time-consuming. Moreover, there are no protection devices set in the LED chip package structure of the prior art, so that the LED chip package structure can enter some unstable state when the LED chip package structure is working.

The present invention provides a LED chip package structure with multifunctional integrated chips and a method for making the same. The present invention provides a chip unit for protecting LED chips integratedly set in a chip package structure to form the LED chip package structure with multifunctional integrated chips. Hence, the LED chips not only can be protected by the chip unit, but also can generate light source with high efficiency and increase usage life of the LED chip package structure.

Moreover, because the LED chips are arranged on a substrate body via an adhesive or a hot pressing method, the process for the LED chip package structure is simple and less time is needed for the manufacturing process. Furthermore, the LED chip package structure can be applied to any type of light source such as a back light module, a decorative lamp, a lighting lamp, or a scanner.

A first aspect of the present invention is a chip package structure with multifunctional integrated chips, including: a substrate unit, a light-emitting unit, a chip unit, and a package colloid unit.

Furthermore, the light-emitting unit has a plurality of LED chips electrically arranged on the substrate unit. The chip unit is electrically arranged on the substrate unit, and the chip unit is arranged between the light-emitting unit and a power source. The package colloid unit covers the LED chips.

Moreover, the LED chip package structure of the present invention further includes seven embodiments, as follows:

First embodiment: The package colloid unit is a strip fluorescent colloid corresponding to the LED chips.

Second embodiment: The package colloid unit is a strip fluorescent colloid corresponding to the LED chips, and the strip fluorescent colloid has a colloid cambered surface formed on its top surface and a colloid light-exiting surface formed on its front surface. In addition, a frame unit covers the strip fluorescent colloid for exposing the lateral side of the strip fluorescent colloid only.

Third embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips.

Fourth embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips. A frame unit has a plurality of frame layers, and each frame layer is formed around the lateral side of each fluorescent colloid for exposing the top surface of each fluorescent colloid only.

Fifth embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips. A frame unit is formed around the lateral sides of the fluorescent colloids for exposing the top surface of each fluorescent colloid only.

Sixth embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips, and each fluorescent colloid has a colloid cambered surface formed on its top surface and a colloid light-exiting surface formed on its front surface. A frame unit has a plurality of frame layers respectively covering the fluorescent colloids for exposing the lateral sides of the fluorescent colloids only.

Seventh embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips, and each fluorescent colloid has a colloid cambered surface formed on its top surface and a colloid light-exiting surface formed on its front surface. A frame unit covers the fluorescent colloids for exposing the lateral sides of the fluorescent colloids only.

A second aspect of the present invention is a method for making a chip package structure with multifunctional integrated chips, including: providing a substrate unit; electrically arranging a light-emitting unit on the substrate unit, and the light-emitting unit having a plurality of LED chips; electrically arranging a chip unit on the substrate unit, and the chip unit being arranged between the light-emitting unit and a power source; and covering the LED chips with a package colloid unit.

Moreover, the method of the present invention further includes seven embodiments, as follows:

First embodiment: The package colloid unit is a strip fluorescent colloid corresponding to the LED chips.

Second embodiment: The package colloid unit is a strip fluorescent colloid corresponding to the LED chips, and the strip fluorescent colloid has a colloid cambered surface formed on its top surface and a colloid light-exiting surface formed on its front surface. In addition, the method further includes: providing a frame unit that covers the strip fluorescent colloid for exposing the lateral side of the strip fluorescent colloid only.

Third embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips.

Fourth embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips. In addition, the method further includes: providing a frame unit that has a plurality of frame layers, and each frame layer is formed around the lateral side of each fluorescent colloid for exposing the top surface of each fluorescent colloid only.

Fifth embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips. In addition, the method further includes: providing a frame unit that is formed around the lateral sides of the fluorescent colloids for exposing the top surface of each fluorescent colloid only.

Sixth embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips, and each fluorescent colloid has a colloid cambered surface formed on its top surface and a colloid light-exiting surface formed on its front surface. In addition, the method further includes: providing a frame unit that has a plurality of frame layers respectively covering the fluorescent colloids for exposing the lateral sides of the fluorescent colloids only.

Seventh embodiment: The package colloid unit has a plurality of fluorescent colloids corresponding to the LED chips, and each fluorescent colloid has a colloid cambered surface formed on its top surface and a colloid light-exiting surface formed on its front surface. In addition, the method further includes: providing a frame unit that covers the fluorescent colloids for exposing the lateral sides of the fluorescent colloids only.

Therefore, the LED chips not only can be protected by the chip unit, but also can generate light source with high efficiency and increase usage life of the LED chip package structure. Furthermore, because the LED chips are arranged on a substrate body via an adhesive or a hot pressing method, the process for the LED chip package structure is simple and less time is needed for the manufacturing process.

It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed. Other advantages and features of the invention will be apparent from the following description, drawings and claims.

The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawings, in which:

FIG. 1 is a flowchart of a method for making a chip package structure of the prior art;

FIG. 2 is a flowchart of a method of making a chip package structure with multifunctional integrated chips according to the first embodiment of present invention;

FIGS. 2A to 2C are schematic diagrams of a chip package structure with multifunctional integrated chips according to the first embodiment of the present invention, at different stages of the packaging processes, respectively;

FIG. 2D is a cross-sectional view along line 2 D- 2 D in FIG. 2C ;

FIG. 3A is a schematic view of a first arrangement of a chip unit according to present invention;

FIG. 3B is a schematic view of a second arrangement of a chip unit according to present invention;

FIG. 4 is a flowchart of a method of making a chip package structure with multifunctional integrated chips according to the second embodiment of present invention;

FIGS. 4A to 4B are schematic diagrams of a chip package structure with multifunctional integrated chips according to the second embodiment of the present invention, at different partial stages of the packaging processes, respectively;

FIG. 4C is a cross-sectional view along line 4 C- 4 C in FIG. 4B ;

FIG. 5 is a flowchart of a method of making a chip package structure with multifunctional integrated chips according to the third embodiment of present invention;

FIG. 5A is a schematic diagram of a chip package structure with multifunctional integrated chips according to the third embodiment of the present invention;

FIG. 5B is a cross-sectional view along line 5 B- 5 B in FIG. 5A ;

FIG. 6 is a flowchart of a method of making a chip package structure with multifunctional integrated chips according to the fourth embodiment of present invention;

FIGS. 6A to 6B are schematic diagrams of a chip package structure with multifunctional integrated chips according to the fourth embodiment of the present invention, at different partial stages of the packaging processes, respectively;

FIG. 6C is a cross-sectional view along line 6 C- 6 C in FIG. 6B ;

FIG. 7 is a flowchart of a method of making a chip package structure with multifunctional integrated chips according to the fifth embodiment of present invention;

FIGS. 7A to 7B are schematic diagrams of a chip package structure with multifunctional integrated chips according to the fifth embodiment of the present invention, at different partial stages of the packaging processes, respectively;

FIG. 7C is a cross-sectional view along line 7 C- 7 C in FIG. 7B ;

FIG. 8 is a flowchart of a method of making a chip package structure with multifunctional integrated chips according to the sixth embodiment of present invention;

FIGS. 8A to 8B are schematic diagrams of a chip package structure with multifunctional integrated chips according to the sixth embodiment of the present invention, at different partial stages of the packaging processes, respectively;

FIG. 8C is a cross-sectional view along line 8 C- 8 C in FIG. 8B ;

FIG. 9 is a flowchart of a method of making a chip package structure with multifunctional integrated chips according to the seventh embodiment of present invention;

FIGS. 9A to 9B are schematic diagrams of a chip package structure with multifunctional integrated chips according to the seventh embodiment of the present invention, at different partial stages of the packaging processes, respectively; and

FIG. 9C is a cross-sectional view along line 9 C- 9 C in FIG. 9B .

Referring to FIGS. 2 , 2 A to 2 C and 2 D, the first embodiment provides a method for making a chip package structure with multifunctional integrated chips, including as follows:

Step S 200 is: referring to FIGS. 2 and 2A , providing a substrate unit 1 that has a substrate body 10 , and a positive electrode trace 11 and a negative electrode trace 12 respectively formed on the substrate body 10 .

Moreover, the substrate unit 1 can be a PCB (Printed Circuit Board), a flexible substrate, an aluminum substrate, a ceramic substrate, or a copper substrate according to user's requirement. In addition, the substrate body 10 has a metal layer 10 A and a bakelite layer 10 B formed on the metal layer 10 A. Both the positive electrode trace 11 and the negative electrode trace 12 can be aluminum circuits or silver circuits.

Step S 202 is: referring to FIGS. 2 and 2B , electrically arranging a light-emitting unit 2 on the substrate body 10 , and the light-emitting unit 2 having a plurality of LED chips 20 . In addition, step S 204 is: electrically arranging a chip unit 3 on the substrate body 10 , and the chip unit 3 being arranged between the light-emitting unit 2 and a power source P. The power source P has a positive electrode P 1 and a negative electrode P 2 electrically connected with the positive electrode trace 11 and the negative electrode trace 12 , respectively.

Furthermore, each LED chip 20 has a positive electrode 201 and a negative electrode 202 respectively and electrically connected with the positive electrode trace 11 and the negative electrode trace 12 of the substrate unit 1 . In addition, the chip unit 3 can be a constant-current chip, a PWM (Pulse Width Modulation) control chip, a zone control chip, an OTP (Over-Temperature Protection) chip, an OCP (Over-Current Protection) chip, an OVP (Over-Voltage Protection) chip, an Anti-EMI (Anti-Electromagnetic Interference) chip, or an Anti-ESD (Anti-Electrostatic Discharge) chip; alternatively, the chip unit 3 can be selected from the group consisting of a constant-current chip, a PWM control chip, a zone control chip, an OTP chip, an OCP chip, an OVP chip, an Anti-EMI chip, and an Anti-ESD chip, according to different design requirements.

Referring to FIGS. 3A and 3B , the chip unit 3 is composed of a constant-current chip 31 , a PWM control chip 32 , a zone control chip 33 , an OTP chip 34 , an OCP chip 35 , an OVP chip 36 , an Anti-EMI chip 37 , and an Anti-ESD chip 38 . In addition, the constant-current chip 31 , the PWM control chip 32 , the zone control chip 33 , the OTP chip 34 , the OCP chip 35 , the OVP chip 36 , the Anti-EMI chip 37 , and the Anti-ESD chip 38 are electrically and parallelly connected to each other (as shown in FIG. 3A ); alternatively, the constant-current chip 31 , the PWM control chip 32 , the zone control chip 33 , the OTP chip 34 , the OCP chip 35 , the OVP chip 36 , the Anti-EMI chip 37 , and the Anti-ESD chip 38 are electrically and seriesly connected to each other (as shown in FIG. 3B ).

Step S 206 is: referring to FIGS. 2 , 2 C and 2 D, covering the LED chips 20 with a package colloid unit 4 a . In addition, the package colloid unit 4 a is a strip fluorescent colloid corresponding to the LED chips 20 . The strip fluorescent colloid is formed by mixing silicon and fluorescent powders or mixing epoxy and fluorescent powders.

Referring to FIGS. 4 , 4 A to 4 B and 4 C, the steps from S 300 to S 304 of the second embodiment are same as the steps from S 200 to S 204 of the first embodiment. In other words, the illustration of S 300 is the same as FIG. 2A of the first embodiment, and the illustrations of S 302 , S 304 are the same as FIG. 2B of the first embodiment.

Step S 306 is: referring to FIGS. 4 and 4A , after the step of S 304 , the method of the second embodiment further includes: covering the LED chips 20 with a package colloid unit 4 b , and package colloid 4 b having a colloid cambered surface 40 b formed on its top surface and a colloid light-exiting surface 41 b formed on its front surface. In addition, the package colloid unit 4 b is a strip fluorescent colloid corresponding to the LED chips 20 . Therefore, the strip fluorescent colloid has the colloid cambered surface 40 b formed on its top surface and the colloid light-exiting surface 41 b formed on its front surface.

Step S 308 is: referring to FIGS. 4 , 4 B and 4 C, covering the package colloid unit 4 b (the strip fluorescent colloid) with a frame unit 5 b for exposing the lateral side (the colloid light-exiting surface 41 b ) of the package colloid unit 4 b (the strip fluorescent colloid) only. In addition, the frame unit 5 b can be an opaque frame layer.

Referring to FIGS. 5 and 5A to 5 B, the steps from S 400 to S 404 of the third embodiment are same as the steps from S 200 to S 204 of the first embodiment. In other words, the illustration of S 400 is the same as FIG. 2A of the first embodiment, and the illustrations of S 402 , S 404 are the same as FIG. 2B of the first embodiment. In addition, referring to FIGS. 5A and 5B , after the step of S 404 , the method of the third embodiment further includes: covering the LED chips 20 with a plurality of fluorescent colloids 40 c (S 406 ). The fluorescent colloids 40 c are combined to form a package colloid unit 4 c , and each fluorescent colloid 40 c is formed by mixing silicon and fluorescent powders or mixing epoxy and fluorescent powders.

Referring to FIGS. 6 , 6 A to 6 B and 6 C, the steps from S 500 to S 504 of the fourth embodiment are same as the steps from S 200 to S 204 of the first embodiment. In other words, the illustration of S 500 is the same as FIG. 2A of the first embodiment, and the illustrations of S 502 , S 504 are the same as FIG. 2B of the first embodiment.

Moreover, referring to FIGS. 6 , 6 A and 6 B, after the step of S 504 , the method of the fourth embodiment further includes: covering the LED chips 20 with a plurality of fluorescent colloids 40 d (S 506 ), and then providing a frame unit 5 d that has a plurality of frame layers 50 d , and each frame layer 50 d being formed around the lateral side of each fluorescent colloid 40 d for exposing the top surface of each fluorescent colloid 40 d only (S 508 ). In addition, the fluorescent colloids 40 d are combined to form a package colloid unit 4 d , and the frame layers 50 d are a plurality of opaque frame layers.

Referring to FIGS. 7 , 7 A to 7 B and 7 C, the steps from S 600 to S 604 of the fifth embodiment are same as the steps from S 200 to S 204 of the first embodiment. In other words, the illustration of S 600 is the same as FIG. 2A of the first embodiment, and the illustrations of S 602 , S 604 are the same as FIG. 2B of the first embodiment.

Moreover, referring to FIGS. 7 , 7 A and 7 B, after the step of S 604 , the method of the fifth embodiment further includes: covering the LED chips 20 with a plurality of fluorescent colloids 40 e (S 606 ), and then forming a frame unit 5 e around the lateral sides of the fluorescent colloids 40 e for exposing the top surface of each fluorescent colloid 40 e only. In addition, the fluorescent colloids 40 e are combined to form a package colloid unit 4 e , and the frame unit 5 e is an opaque frame layer.

Referring to FIGS. 8 , 8 A to 8 B and 8 C, the steps from S 700 to S 704 of the sixth embodiment are same as the steps from S 200 to S 204 of the first embodiment. In other words, the illustration of S 700 is the same as FIG. 2A of the first embodiment, and the illustrations of S 702 , S 704 are the same as FIG. 2B of the first embodiment.

Moreover, referring to FIGS. 8 and 8A , after the step of S 704 , the method of the sixth embodiment further includes: covering the LED chips 20 with a plurality of fluorescent colloids 40 f , each fluorescent colloid 40 f having a colloid cambered surface 400 f formed on its top surface and a colloid light-exiting surface 401 f formed on its front surface (S 706 ). In addition, the fluorescent colloids 40 f are combined to form a package colloid unit 4 f.

Referring to FIGS. 8 , 8 B and 8 C, after the step of S 706 , the method of the sixth embodiment further includes: providing a frame unit 5 f that has a plurality of frame layers 50 f respectively covering the fluorescent colloids 40 f for exposing the lateral sides of the fluorescent colloids 40 f only (S 708 ). In addition, the frame layers 50 f are a plurality of opaque frame layers.

Referring to FIGS. 9 , 9 A to 9 B and 9 C, the steps from S 800 to S 804 of the seventh embodiment are same as the steps from S 200 to S 204 of the first embodiment. In other words, the illustration of S 800 is the same as FIG. 2A of the first embodiment, and the illustrations of S 802 , S 804 are the same as FIG. 2B of the first embodiment.

Moreover, referring to FIGS. 9 and 9A , after the step of S 804 , the method of the seventh embodiment further includes: covering the LED chips 20 with a plurality of fluorescent colloids 40 g , each fluorescent colloid 40 g having a colloid cambered surface 400 g formed on its top surface and a colloid light-exiting surface 401 g formed on its front surface (S 806 ). In addition, the fluorescent colloids 40 g are combined to form a package colloid unit 4 g.

Referring to FIGS. 9 , 9 B and 9 C, after the step of S 806 , the method of the seventh embodiment further includes: covering the fluorescent colloids 40 g with a frame unit 5 g for exposing the lateral sides of the fluorescent colloids 40 g only (S 808 ). In addition, the frame unit 5 g is an opaque frame layer.

In conclusion, the present invention provides a chip unit for protecting LED chips integratedly set in a chip package structure to form the LED chip package structure with multifunctional integrated chips. Hence, the LED chips not only can be protected by the chip unit, but also can generate light source with high efficiency and increase usage life of the LED chip package structure.

Moreover, because the LED chips are arranged on a substrate body via an adhesive or a hot pressing method, the process for the LED chip package structure is simple and less time is needed for the manufacturing process. Furthermore, the LED chip package structure can be applied to any type of light source such as a back light module, a decorative lamp, a lighting lamp, or a scanner.

Therefore, the LED chips not only can be protected by the chip unit, but also can generate light source with high efficiency and increase usage life of the LED chip package structure. Furthermore, because the LED chips are arranged on a substrate body via an adhesive or a hot pressing method, the process for the LED chip package structure is simple and less time is needed for the manufacturing process.

Although the present invention has been described with reference to the preferred best modes thereof, it will be understood that the invention is not limited to the details thereof. Various substitutions and modifications have been suggested in the foregoing description, and others will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.