Power meter having complex quadrature output current and voltage filters

1. Field of the Invention

The present invention relates generally to power measurement circuits and systems, and more particularly to a power measurement system that provides for measurement of complex power, including reactive and real power delivered to a load.

2. Background of the Invention

Power measurements performed by integrated circuits (ICs), such as those used in motor control and power supply systems typically measure voltage and current delivered to a load using analog-to-digital converters (ADCs) and then compute a measured power level by multiplying the voltage and current measurements to obtain a power measurement. Systems such as those disclosed in U.S. Pat. No. 5,521,482 typically assume that the measured power is a real power value, or for A/C power measurements, use a power factor to adjust the power calculated from the voltage and current measurements to obtain the real power. Such power computations are accurate for a fixed-frequency stable sine wave. For DC power measurements, the power factor correction is not needed.

However, making accurate A/C power measurements when the frequency and/or amplitude varies rapidly, such as in some A/C motor control applications, and when jitter is present is very difficult and requires extensive computations in order to preserve accuracy of the measurements. Further, measurement of complex power including both real and reactive power metrics is desirable for total modeling of the load conditions which is useful in monitoring and controlling power delivery in applications such as motor control.

Therefore, it would be desirable to provide a less computation-intensive system and method for performing A/C power measurements. It would further be desirable to provide such a system and method that provides a complex power measurement output.

The above stated objective of providing complex power measurements with low computational overhead, is provided in a method and system that can be embodied in an integrated circuit or an isolated pair of integrated circuits.

The system includes at least one ADC for measuring voltage and current delivered to a load. A pair of band-pass filters each having a response determined by complex non-conjugate poles, so that only the positive or negative half of the complex frequency plane is passed, is used to filter both the current and voltage measurements to complex outputs. The filter is implemented as an algorithm by a digital signal processor. Alternatively, the filters may be implemented in the analog domain and the voltage and current inputs to the ADC(s) may be filtered prior to conversion. The processor computes at least one indication of power delivered to the load from the complex voltage and current, and can compute the real and/or reactive power.

The system may be embodied in a single integrated circuit, or a pair of integrated circuits isolated by a signal transformer may be implemented, generally with the ADC(s) integrated on a load “side” of the signal transformer and the DSP integrated on an isolated measurement/control side of the signal transformer. Clock and power for the ADC(s) may be supplied through the transformer from the measurement/control side.

The foregoing and other objectives, features, and advantages of the invention will be apparent from the following, more particular, description of the preferred embodiment of the invention, as illustrated in the accompanying drawings.

FIG. 1 is a block diagram depicting a power measurement system in accordance with an embodiment of the present invention.

FIG. 2 is a pictorial unit circle diagram showing the locations of the poles of bandpass filters 12 A and 12 B of FIG. 1 .

FIG. 3 is a block diagram depicting details of bandpass filter 12 A and tuning control block 16 of FIG. 1 .

FIG. 4 is a block diagram depicting details of coefficient control block 20 of FIG. 2 .

FIG. 5 is a detailed block diagram showing a power measurement system in accordance with another embodiment of the present invention.

The present invention encompasses circuits, systems and methods for measuring power in electrical and electronic systems. The present invention is suited for integration in motor control systems and other systems in which measurement of real and imaginary power, e.g., determination of a complex power representation is desirable for providing input to control systems, measuring efficiency and displaying information about the operation of the system. The voltage and current supplied to a load are measured and are filtered using a filter that has complex non-conjugate poles forming a bandpass filter. The filter is tuned such that at the bandpass filter center, the complex output of the filter is maintained in quadrature, providing a true measure of real and imaginary voltage and current components. The imaginary power can then be determined from the imaginary component of the product of the complex voltage and the conjugate of the complex current and the real power can be determined from the real component of the product of the complex voltage and the conjugate of the complex current.

Referring now to FIG. 1 , a power measurement system in accordance with an embodiment of the present invention is shown. Two voltages are provided as inputs to the system. The first V LOAD , provided to analog-to-digital converter (ADC) 10 A, is representative of the voltage supplied to a load, and may be provided directly or by a voltage divider or another suitable scaling circuit. The second voltage V=kI LOAD , is representative of the current supplied to the load and may be obtained by series sense resistor, current mirror, current transformer or another suitable current-sensing circuit. If the output of the current-sensing circuit generates a current, then ADC 10 B may have a current input rather than having a voltage input as depicted in the Figure. The output of ADC 10 A is provided to the input of a bandpass filter 12 A, which has a characteristic response such that only one of the negative or positive half-planes of the complex frequency spectrum are passed and the other half-plane is attenuated. The resulting response is generated by complex coefficients a i +jb i that yield complex poles and transform the input into a complex output voltage number α+jβ representative of a real and an imaginary part of load voltage V LOAD .

Similarly, input voltage V is filtered by another bandpass filter 12 B having a response substantially identical to that of bandpass filter 12 A, and therefore generates a complex output current number γ+jδ representative of a real and imaginary part of load current I LOAD . The response of bandpass filters 12 A and 12 B is controlled by coefficients a i +jb i , which are adjusted by a tuning control block 16 , which adjusts coefficients a i +jb i so that the imaginary part of the output of bandpass filter 12 A is in perfect quadrature with the input to bandpass filter 12 A. Alternatively, the tuning control could be applied around bandpass filter 12 B. Either arrangement can be used to determine real and imaginary power. However, it is desirable to tune bandpass filters 12 A and 12 B based on the voltage sensing input of the system, rather than the current sensing input of the system. A harmonic load could otherwise generate an error in the tuning, and in particular for 3-phase systems, certain conditions will lead to zero load current on one phase. In any of the systems in accordance with the present invention, once the tuning criteria is determined, it is applied identically to all of the filters in the system, so that the proper complex phase relationship between the current and voltage measurements is maintained.

For power and voltage measurements, a Root-Mean-Square (RMS) computation block 14 A is provided at the output of bandpass filter 12 A to obtain the RMS value of the load voltage V RMS and another RMS computation block 14 B is provided to obtain the RMS value of the load current I RMS . RMS computation blocks 14 A and 14 B multiply the input value by its conjugate and then perform a square root operation to obtain the RMS value. A conjugate operator block 18 computes the conjugate of the complex load current value by changing the sign of the imaginary component I LOAD *=γ−jδ. A multiplier M 1 multiplies the output of conjugate operator block 18 with the output of bandpass filter 12 A to obtain the complex power VI*, which is used to obtain the power measurements. The real component of the complex power Re(VI*) is filtered by a low-pass filter LPF 1 A to provide a measure of the real power P REAL , and the imaginary component of complex power Im(VI*) is filtered by a low-pass filter LPF 1 B to obtain a measure of the the reactive power P REACTIVE .

The system depicted in FIG. 1 , is generally implemented in the digital domain with the exception of mixed-signal ADC circuits 10 A and 10 B. However, filters 12 A and 12 B could alternatively be implemented as analog filters and ADCs 10 A and 10 B relocated to the outputs of filters 12 A and 12 B. Multiplier M 1 could then be implemented in the analog or digital domain, depending on whether the inputs to multiplier M 1 are provided from the outputs of ADCs 10 A, 10 B or from the outputs of filters 12 A and 12 B, which would have separate imaginary and real output signals provided by each filter.

Referring now to FIG. 2 , a unit circle diagram depicting the locations of poles p 0 , p 1 , and p 2 of the response of bandpass filters 12 A and 12 B is shown. As depicted in the illustration, poles p 0 , p 1 , and p 2 are not complex conjugate, but are rotated from the real axis. Poles p 0 , p 1 , and p 2 of the illustrative bandpass filters 12 A and 12 B are the real poles of a 3 rd order Butterworth low-pass response, which are rotated about the origin, yielding a bandpass filter having a complex output. When poles p 0 , p 1 , and p 2 are adjusted such that the complex output of bandpass filters 12 A and 12 B are in perfect quadrature, the outputs of bandpass filters 12 A and 12 B yield the desired imaginary and real components of the input values provided to bandpass filters 12 A and 12 B.

Referring now to FIG. 3 , details of tuning control block 16 and bandpass filter 12 A are shown. Internal details of bandpass filter 12 B are identical to those of bandpass filter 12 A and are therefore not shown in the diagram. Bandpass filter 12 A is implemented as an infinite impulse response (IIR) filter of order three, by summers S 1 , S 2 and S 3 , scalers 22 A, 22 B and 22 C, unit delays D 1 , D 2 and D 3 and scalers K 1 , K 2 , and K 3 . The coefficients a i +jb i of scalers K 1 , K 2 , and K 3 , respectively a 0 +jb 0 , a i +jb 1 and a 2 +jb 2 , are complex, and therefore transform scalar input V LOAD into complex output vector α+jβ. Tuning control block 16 controls coefficients a i +jb i by a coefficient control block 20 , to minimize (zero) the output of a low-pass filter LPF 2 that filters the output of a multiplier M 2 , which multiplies input voltage V in by the imaginary component β of the output of bandpass filter 12 A. When the imaginary component β of the output of bandpass filter 12 A is in perfect quadrature with the input voltage V in , the product of β and V in is ideally only a second harmonic, due to the phase relationship of 90 degrees in the fundamental, which is enforced by the loop formed between tuning control 16 and bandpass filter 12 A. Any phase error results in a DC value at the output of low-pass filter LPF 2 , which will cause coefficient control 20 to adjust the coefficients to correct the phase at the output of bandpass filter 12 B. Since bandpass filter 12 B of FIG. 1 is controlled by the same coefficients a i +jb i which are independent of the phase of the input signal provided to bandpass filter 12 A, a true complex representation of the relationship between the load current and the load voltage is provided by the system of FIG. 1 .

Referring now to FIG. 4 , details of coefficient control 20 of FIG. 3 are shown. A set of multipliers M 3 , M 4 and M 5 control rotation of poles p 0 , p 1 , and p 2 by multiplying poles p 0 , p 1 , and p 2 by a phase number e jw2πf/fc generated by block 32 to obtain coefficients a 0 +jb 0 , a 1 +jb 1 and a 2 +jb 2 , where f is a frequency value input provided to block 32 and f c is the nominal center frequency of filters 12 A and 12 B. The input to block 32 is generated by a proportional-integral (PI) controller 30 that receives the output of LPF 2 of FIG. 3 . As the frequency/phase of the current supplied to the load shifts, the output of multiplier M 2 of FIG. 3 rises in value, causing the position of poles p 0 , p 1 , and p 2 to be rotated to maintain the quadrature relationship between δ and V in as described above with reference to FIG. 3 .

Referring now to FIG. 5 , a power measurement system in accordance with another embodiment of the present invention is shown. A power measurement integrated circuit 47 contains a digital signal processor (DSP) core 47 , which implements bandpass filters 12 A and 12 B, tuning control 16 , and power/voltage/current measurement blocks such as multiplier M 1 , low-pass filter LPF 1 and RMS computation blocks 14 A and 14 B of FIG. 1 . DSP core 47 includes a non-volatile memory containing program instructions for implementing the above-listed algorithmic blocks in accordance with an embodiment of the present invention. Once DSP core 47 has an indication of current and voltage delivered to a load Z LOAD and has processed the current and voltage indications in accordance with the above-described bandpass filter algorithms, the computation of imaginary and/or real power values may be carried out in any manner in order to provide the information to systems that control and/or monitor the power delivered to the load. An ADC 45 provides the indication of voltage to DSP 47 , which is obtained from a voltage divider formed by resistors R drop and R 1 . Power supply voltage for power measurement IC 40 may be obtained from the voltage across resistor R 1 , which may be replaced with a constant current sink for stability. A modulator/receiver 41 receives data from transformer T 1 and may impose a signal on transformer T 1 that provides power to a remote ADC integrated circuit 42 . The data provided through transformer T 1 is illustrated as the output of a delta-sigma modulator (DSM) 46 that converts a voltage detected across a sense resistor R SENSE that represents the current flowing through load Z LOAD as supplied by voltage source V 0 . A quantizer 43 is included in power measurement IC 40 to quantize the output of delta-sigma modulator 46 in ADC IC 42 to provide the indication of load current to DSP core 47 .

Techniques for sending power to and receiving data from an isolated ADC IC such as ADC IC 42 are described in co-pending U.S. patent application Ser. No. 12/037,932, entitled “TRANSFORMER-ISOLATED ANALOG-TO-DIGITAL CONVERTER (ADC) FEEDBACK APPARATUS AND METHOD” and filed on Feb. 26, 2008 by the same inventor. The specification and drawings of the above-referenced U.S. patent application are incorporated herein by reference. The system of FIG. 5 provides an input interface I/O from which measurements of real and imaginary power can be obtained. However, if the circuitry depicted within power measurement IC forms part of an integrated circuit having for example, a motor control circuit for controlling source V o , an output interface may not necessarily be required as the power measurements of the present invention may also be used internal to an integrated circuit controller in order to provide control of power factor, efficiency and in general to further provide input to motor control algorithms. Similarly, other control applications may benefit from the techniques and devices of the present invention, including audio power output systems driving inductive and/or capacitive loads.

While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form, and details may be made therein without departing from the spirit and scope of the invention.