Automatic-gain control circuit

1. Field of the Invention

The present invention relates to an automatic-gain control circuit, and more particularly, to an automatic-gain control circuit capable of controlling the gain using a variable current source.

2. Description of the Prior Art

In a modernized society, various paper, data, information and video/audio signals can be processed and transmitted as electronic signals. Therefore, signal-processing circuits capable of processing electronic signals have become very important. In order to efficiently process electronic signals in a data system, many gain-amplifying circuits are required for maintaining the amplitude of the electronic signals adequately. A gain-amplifying circuit is an amplifier capable of enlarging an input signal, outputting the enlarged input signal and adjusting the amount of gain based on a control signal. Among various gain-amplifying circuits, a variable gain-amplifying circuit capable of adjusting the amplitude of the electronic signals adequately is often designed as an automatic-gain control (AGC) circuit in order to adjust the amplitude of the electronic signals automatically.

Since the gain of a variable gain-amplifying circuit can be controlled by a control signal, the variable gain characteristics of the variable gain-amplifying circuit can be represented by how the gain varies with the control signal. Generally speaking, it is preferable to design a variable gain-amplifying circuit having a wider amplifying range, better control characteristics (such as high linearity), and higher resistance against characteristic shifts due to process or temperature variations. A variable gain-amplifying circuit having a wider amplifying range can adjust its gain to a larger degree, provide electronic signals with more distinct amplitudes, and thus can be used in more applications. A variable gain-amplifying circuit having better control characteristics can be controlled more accurately. In a variable gain-amplifying circuit having higher resistance against characteristic shifts due to process or temperature variations, external influences on the variable gain characteristics can be reduced, and the overall performance of the system can be improved.

Reference is made to FIG. 1 for a diagram of a prior art AGC circuit 10 . The AGC circuit 10 includes a variable-gain amplifier (VGA) 12 , a peak-detecting circuit 14 , a constant charge/discharge circuit 16 , and a digital-to-analog converter (DAC) 1 8 . The VGA 12 receives an input signal V IN at an input end and adjusts the input signal V IN based on a gain-factor control signal V CTL , thereby generating a corresponding output signal V OUT at an output end. In the prior art AGC circuit 10 , the gain-factor control signal V CTL is generated by the peak-detecting circuit 14 and the constant charge/discharge circuit 16 based on the output signal V OUT . Therefore, automatic-gain control can be performed in a feedback mechanism.

In the prior art AGC circuit 10 , the gain-factor control signal V CTL can be varied when the DAC 18 outputs different threshold signals V T ′, and the gain of the VGA 12 can be adjusted accordingly. The peak-detecting circuit 14 includes a positive-phase differential comparator 21 , negative-phase differential comparator 22 , and an OR gate 23 . The positive-phase differential comparator 21 includes a positive input end coupled to the VGA 12 for receiving the output signal V OUT and an negative input end coupled to the DAC 18 for receiving the threshold signal V T ′. The positive-phase differential comparator 21 can differentially compare the output signal V OUT with the threshold signal V T ′, thereby generate a corresponding positive-phase comparing signal V + at its output end. The negative-phase differential comparator 22 includes a positive input end coupled to the DAC 18 for receiving the threshold signal V T ′ and a negative input end coupled to the VGA 12 for receiving the output signal V OUT . The negative-phase differential comparator 22 can differentially compare the output signal V OUT with the threshold signal V T ′, thereby generate a corresponding negative-phase comparing signal V − at its output end. The OR gate 23 , coupled between the output ends of the positive-phase differential comparator 21 and the negative-phase differential comparator 22 , can generate a corresponding comparing signal V GATE based on the positive-phase comparing signal V + and the negative-phase comparing signal V − .

The constant charge/discharge circuit 16 includes a capacitor C, a constant charge current source I P , a constant discharge current source I N , a charge switch SW P , and a discharge switch SW N . The charge switch SW P can include a P-type metal oxide semiconductor (PMOS) transistor, and the discharge switch SW N can include an N-type metal oxide semiconductor (NMOS) transistor. The gates of the charge switch SW P and the discharge switch SW N are coupled to the OR gate 23 . When the comparing signal V GATE has a high voltage level, the charge switch SW P is turned off (open-circuited) and the discharge switch SW N is turned on (short-circuited). Therefore, the constant charge/discharge circuit 16 can discharge the capacitor C using the constant discharge current source I N and the discharge switch SW N . When the comparing signal V GATE has a low voltage level, the charge switch SW P is turned on and the discharge switch SW N is turned off. Therefore, the constant charge/discharge circuit 16 can charge the capacitor C using the constant charge current source I P and the charge switch SW P . In the prior art AGC circuit 10 , the constant charge current source I P and the constant discharge current source I N provide constant charging and discharge currents, respectively.

Reference is made to FIG. 2 for a signal diagram illustrating the operation of the prior art AGC circuit 10 . In FIG. 2 , the waveform of the output signal V OUT is represented by a sine wave having an amplitude V M and a central level V REF . The transverse axle represents time, and a period (0˜2π) is depicted in FIG. 2 . When the absolute value of the output signal V OUT is smaller than that of the threshold signal V T ′, the constant charge/discharge circuit 16 performs charging operation, such as during the time periods 0˜θ, (π−θ)˜(π+θ) and (2π−θ)˜2π (as illustrated by diagonal regions of the sine wave in FIG. 2 ). When the absolute value of the output signal V OUT is larger than that of the threshold signal V T ′, the constant charge/discharge circuit 16 performs discharging operation, such as during the time periods θ˜(π−θ) and (π+θ)˜(2π−θ) (as illustrated by blank regions of the sine wave in FIG. 2 ). The value of θ depends on the level of the threshold voltage V T ′. As the absolute value of the threshold voltage V T ′ increases, the charging time T P (T P =4θ) of the constant charge/discharge circuit 16 becomes longer. As the absolute value of the threshold voltage V T ′ decreases, the discharging time T N (T N =2π−4θ) of the constant charge/discharge circuit 16 becomes longer.

When the AGC circuit 10 performs charging and discharging operations, corresponding charging electronic charges Q P and discharging electronic charges Q N can be represented by the following formulae:

Q P =I P T P =I P (4θ)

Q N =I N T N =I N (2π−4θ)

When the AGC circuit 10 is stabilized, the charging electronic charges Q P and the discharging electronic charges Q N reach an equilibrium state. Therefore, the following relationships can be obtained:

I N /I P =2θ/(π−2 74 )

If N is used for representing the value of I N /I P , the value of θ can be represented by the following formula:

θ

=

Also, the relationship between the amplitude V M of the output signal V OUT and the threshold signal V T ′ can be represented by the following formula:

V M sin θ=V T ′

As a result, the following relationships can be obtained:

V

M

=

In order for the AGC circuit 10 to have better control characteristics, the value of the threshold signal V T ′ has to be close to the target amplitude V M of the output signal V OUT , so that the amplitude V M of the output signal V OUT can be varied by adjusting the threshold signal V T ′. Therefore, in order to reduce the difference between the absolute values of V T ′ and V M , it is preferable when the value of θ approaches π/2 and the value of N approaches infinity. In the prior art AGC circuit 10 , N is normally set to a constant value (such as N=10). The AGC circuit 10 can have better control characteristics as the target amplitude V M of the output signal V OUT is varied by adjusting the threshold signal V T ′.

Since the threshold signal V T ′ is close to the target amplitude V M of the output signal V OUT in the prior art AGC circuit 10 , a high-speed positive-phase differential comparator 21 and a high-speed negative-phase differential comparator 22 are required for determining the difference between the threshold signal V T ′ and the output signal V OUT accurately, so that the AGC circuit 10 can switch between charging/discharging operations correctly. Also, the DAC 18 for providing the threshold signal V T ′ occupies large circuit space in the prior art AGC circuit 10 and consumes more power.

The present invention provides an automatic-gain control circuit comprising a variable-gain amplifier for receiving an input signal and adjusting the input signal based on a gain-factor control signal, thereby generating a corresponding output signal; a peak-detecting circuit coupled to the variable-gain amplifier for generating a comparing signal based on a reference signal and the output signal; and an adjustable charge/discharge circuit having an input end coupled to the peak-detecting circuit and an output end coupled to the variable-gain amplifier for outputting a charge current or a discharge current based on the comparing signal, thereby generating the gain-factor control signal, wherein a ratio between the charge current and the discharge current is adjustable.

These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.

FIG. 1 is a diagram of a prior art AGC circuit.

FIG. 2 is a signal diagram illustrating the operation of the prior art AGC circuit in FIG. 1 .

FIG. 3 is a diagram of an AGC circuit according to a first embodiment of the present invention.

FIG. 4 is a signal diagram illustrating the operation of the AGC circuit in FIG. 3 .

FIG. 5 is a diagram of an AGC circuit according to a second embodiment of the present invention.

FIG. 6 is a diagram of an AGC circuit according to a third embodiment of the present invention.

Reference is made to FIG. 3 for a diagram of an AGC circuit 30 according to a first embodiment of the present invention. The AGC circuit 30 includes a VGA 32 , a peak-detecting circuit 34 , an adjustable charge/discharge circuit 36 , and a filter 38 . The VGA 32 receives an input signal V IN at an input end and adjusts the input signal V IN based on a gain-factor control signal V CTL , thereby generating a corresponding output signal V OUT at an output end. The filter 38 , coupled between the VGA 32 and the peak-detecting circuit 34 , adjusts the operating voltage point of the output signal V OUT by removing bias voltages of the VGA 32 . In the AGC circuit 30 , the gain-factor control signal V CTL is generated by the peak-detecting circuit 34 and the adjustable charge/discharge circuit 36 based on the output signal V OUT . Therefore, automatic-gain control can be performed in a feedback mechanism.

In the AGC circuit 30 of the present invention, the gain of the VGA 32 can be adjusted by varying the gain-factor control signal V CTL using the adjustable charge/discharge circuit 36 . The peak-detecting circuit 34 includes a positive-phase differential comparator 41 , negative-phase differential comparator 42 , and an operational logic unit 43 . The positive-phase differential comparator 41 includes a positive input end coupled to the VGA 32 for receiving the output signal V OUT and a negative input end for receiving a constant first reference signal V T1 . The positive-phase differential comparator 41 can differentially compare the output signal V OUT with the first reference signal V T1 , thereby generate a corresponding positive-phase comparing signal V + at its output end. The negative-phase differential comparator 42 includes a positive input end for receiving a constant second reference signal V T2 and a negative end coupled to the VGA 32 for receiving the output signal V OUT . The negative-phase differential comparator 42 can differentially compare the output signal V OUT with the second reference signal V T2 , thereby generate a corresponding negative-phase comparing signal V − at its output end. The operational logic unit 43 can include an OR gate coupled to the output ends of the positive-phase differential comparator 41 and the negative-phase differential comparator 42 and are capable of generating a corresponding comparing signal V GATE based on the positive-phase comparing signal V + and the negative-phase comparing signal V − .

The adjustable charge/discharge circuit 36 includes a capacitor C, a constant charge current source I P , a variable discharge current source I N ′, a charge switch SW P , and a discharge switch SW N . The charge switch SW P can include a PMOS transistor, and the discharge switch SW N can include an NMOS transistor. The gates of the charge switch SW P and the discharge switch SW N are coupled to the operational logic unit 43 . When the comparing signal V GATE has a high voltage level, the charge switch SW P is turned off (open-circuited) and the discharge switch SW N is turned on (short-circuited). Therefore, the adjustable charge/discharge circuit 36 can discharge the capacitor C using the variable discharge current source I N ′ and the discharge switch SW N . When the comparing signal V GATE has a low voltage level, the charge switch SW P is turned on and the discharge switch SW N is turned off. Therefore, the adjustable charge/discharge circuit 36 can charge the capacitor C using the constant charge current source I P and the charge switch SW P . In the AGC circuit 30 of the present invention, the constant charge current source I P and the variable discharge current source I N ′ respectively provide a constant charge current and a variable discharge current, and the ratio between the charge current and the discharge current is adjustable based on a ratio control signal I CTL . In such a situation, the AGC circuit 30 of the present invention implicitly includes a current ratio control module (not shown in FIG. 3 ) coupled to the adjustable charge/discharge circuit 36 for generating the ratio control signal I CTL . It is noted that implementation of the current ratio control module has no concern with the spirit of the present invention, and that those skilled in the art can utilize any controller regardless of hardware or software to implement the current ratio control module as long as the ratio between the charge current I P and the discharge current I N ′ can be adjusted.

Reference is made to FIG. 4 for a signal diagram illustrating the operation of the AGC circuit 30 according to the present invention. In FIG. 4 , the waveform of the output signal V OUT is represented by a sine wave having an amplitude V M and a central level V REF . The transverse axle represents time, and a period (0˜2π) is depicted in FIG. 4 . In the embodiment shown in FIG. 4 , the first reference signal V T1 and the second reference signal V T2 are both set to a constant threshold signal V T . When the absolute value of the output signal V OUT is smaller than that of the threshold signal V T , the adjustable charge/discharge circuit 36 performs charging operation, such as during the time periods 0˜θ, (π−θ)˜(π+θ) and (2−θ)˜2π (as illustrated by diagonal regions of the sine wave in FIG. 4 ). When the absolute value of the output signal V OUT is larger than that of the threshold signal V T , the adjustable charge/discharge circuit 36 performs discharging operation, such as during the time periods θ˜(π−θ) and (π+θ)˜(2π−θ) (as illustrated by blank regions of the sine wave in FIG. 4 ). The value of 0 depends on the level of the threshold voltage V T . As the absolute value of the threshold voltage V T increases, the charging time T P (T P =4θ) of the adjustable charge/discharge circuit 36 becomes longer. As the absolute value of the threshold voltage V T decreases, the discharging time T N (T N =2π−4θ) of the adjustable charge/discharge circuit 36 becomes longer.

When the AGC circuit 30 performs charging and discharging operations, corresponding charging electronic charges Q P and discharging electronic charges Q N can be represented by the following formulae:

Q P =I P T P =I P (4θ)

Q N =I N T N =I N (2π−4θ)

When the AGC circuit 30 is stabilized, the charging electronic charges Q P and the discharging electronic charges Q N reach an equilibrium state. Therefore, the following relationships can be obtained:

I N /I P =2θ/(π−2θ)

If N′ is used for representing the value of I N ′/I P , the value of θ can be represented by the following formula:

θ

=

Also, the relationship between the amplitude V M of the output signal V OUT and the threshold signal V T can be represented by the following formula:

V M sin θ=V T

Therefore, the following relationship can be obtained:

V

M

=

In the AGC circuit 30 of the first embodiment of the present invention, the value of the threshold signal V T is constant and does not have to be close to the target amplitude V M of the output signal V OUT . The gain of the VGA 32 can be varied by adjusting the value of N′. Therefore, the AGC circuit 30 only requires a mid/low-speed positive-phase differential comparator 21 and a mid/low-speed negative-phase differential comparator 22 for accurately determining the difference between the threshold signal V T and the output signal V OUT , so that the AGC circuit 30 can switch between charging/discharging operations correctly. The costs for the differential comparators can thus be reduced. Also, instead of providing the threshold signals V T ′ of distinct amplitudes in the prior art, the first embodiment of the present invention occupies less circuit space and consumes less power by providing the constant first and second threshold signals V T1 and V T2 (the first and second threshold signals V T1 and V T2 can be set to a constant threshold signal V T simultaneously).

Reference is made to FIG. 5 for a diagram of an AGC circuit 50 according to a second embodiment of the present invention. The AGC circuit 50 includes a VGA 32 , a peak-detecting circuit 34 , an adjustable charge/discharge circuit 56 , and a filter 38 . In the second embodiment of the present invention, the adjustable charge/discharge circuit 56 includes a capacitor C, a variable charge current source I P ′, a constant discharge current source I N , a charge switch SW P , and a discharge switch SW N . Similarly, the ratio between the charge current I P ′ and the discharge current I N is adjustable based on a ratio control signal I CTL , generated by a current ratio control module. If N′ is used for representing the value of I N /I P ′ and the first reference signal V T1 and the second reference signal V T2 are both set to a constant threshold signal V T , the relationship between the amplitude V M of the output signal V OUT and the threshold signal V T can be represented by the following formula:

V

M

=

Therefore, in the AGC circuit 50 of the second embodiment of the present invention, the gain of the VGA 32 can be varied by adjusting the value of N′. A mid/low-speed positive-phase differential comparator 41 and a mid/low-speed negative-phase differential comparator 42 are required for determining the difference between the threshold signal V T and the output signal V OUT accurately, so that the AGC circuit 50 can switch between charging/discharging operations correctly. The costs for the differential comparators can thus be reduced. Also, instead of providing the threshold signals V T ′ of distinct amplitudes as in the prior art, the second embodiment of the present invention occupies less circuit space and consumes less power by providing the constant first and second threshold signals V T1 and V T2 (the first and second threshold signals V T1 and V T2 can be set to a constant threshold signal V T simultaneously).

Reference is made to FIG. 6 for a diagram of an AGC circuit 60 according to a third embodiment of the present invention. The AGC circuit 60 includes a VGA 32 , a peak-detecting circuit 34 , an adjustable charge/discharge circuit 66 , and a filter 38 . In the third embodiment of the present invention, the adjustable charge/discharge circuit 66 includes a capacitor C, a variable charge current source I P ′, a variable discharge current source I N ′, a charge switch SW P , and a discharge switch SW N . Similarly, the ratio between the charge current I P ′ and the discharge current I N is adjustable based on ratio control signals I CTL1 and I CTL2 , generated by a current ratio control module. If N′ is used for representing the value of I N ′/I P ′ and the first reference signal V T1 and the second reference signal V T2 are both set to a constant threshold signal V T , the relationship between the amplitude V M of the output signal V OUT and the threshold signal V T can be represented by the following formula:

V

M

=

Therefore, in the AGC circuit 60 of the third embodiment of the present invention, the gain of the VGA 32 can be varied by adjusting the value of N′. A mid/low-speed positive-phase differential comparator 41 and a mid/low-speed negative-phase differential comparator 42 are required for determining the difference between the threshold signal V T and the output signal V OUT accurately, so that the AGC circuit 50 can switch between charging/discharging operations correctly. The costs for the differential comparators can thus be reduced. Also, instead of providing the threshold signals V T ′ of distinct amplitudes as in the prior art, the third embodiment of the present invention occupies less circuit space and consumes less power by providing the constant first and second threshold signals V T1 and V T2 (the first and second threshold signals V T1 and V T2 can be set to a constant threshold signal V T simultaneously).

In the present invention, the gain of the VGA can be changed by adjusting the charge/discharge currents using a variable current source. Since only a low/mid-speed differential comparator is required, the manufacturing costs can thus be reduced. Also, by providing a constant threshold signal instead of providing various threshold signals using a DAC, the present invention occupies less circuit space and consumes less power.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.