USPatent applicationPatented

Method for sensor edge control and track width definition for narrow track width devices

Granted 10 Jul 2007 · 2 office actions

Current assignee: WESTERN DIGITAL TECHNOLOGIES · originally Western Digital

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Inventors: Mustafa Michael Pinarbasi · Examiner: Michelle Estrada · AU 2823 · TC 2800

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Abstract

A process for defining and controlling the track width for sensor devices is disclosed. An RIE-resistant, image layer, such as Cu or NiFe, is deposited after the DLC layer. A combination of RIE and ion milling processes or reactive ion beam etching processes are used to form the mask structure. Having an RIE-resistant layer precisely defines the DLC edge and minimizes the line edge roughness that result from fast removal of duramide during RIE. This solution controls the formation of the edges of the sensors and provides good definition for DLC mask edges. The image layer may be chemical mechanical polished to eliminate ion milling before the final RIE step.

Description

4 parts
›BACKGROUND OF THE INVENTION

1. Technical Field

The present invention relates in general to the masking of devices during processing and, in particular, to an improved system and method for improved masking of sensors during processing for better sensor edge control and track width definition for sensors having a narrow track width.

2. Description of the Related Art

Current mask processes can be prone to track width (TW) control and junction definition issues between the various layers of the product that define the sensor width. Some of these problems are illustrated in FIG. 1 , which is a tunneling electron microscope (TEM) image of a sectioned masked wafer site 17 . For example, the freelayer has a TW length 11 that is wider than the width 13 of the mask. In addition, the side 15 of the mask (e.g., into and out of the page) is relatively rough rather than straight, and the edges of the diamond-like carbon (DLC) mask layer are sloped rather than relatively sharp.

The reasons for these variations are the different reactive ion etching (RIE) etch rates for the different mask layers. For example, duramide etches significantly faster (e.g., about 45 Å/sec compared to about 16.7 Å/sec) than either DLC or photoresist (e.g., TIS). Since duramide is the masking layer for DLC, there is no static mask for DLC. This makes it nearly impossible to obtain well-defined DLC edges, which can induce large junction variations.

FIG. 2 depicts one prior art example that illustrates the results of these differences in etch rates. The left side of FIG. 2 depicts an initial spin step 21 wherein layers of photoresist (e.g., TIS) 23 , hydronhilic polymers of acrylamide (e.g., DURAMIDE) 25 , and DLC 27 are formed on a sensor 35 . In step 29 (center of FIG. 2 ), the layers are exposed and developed such that photoresist 23 is reduced, while DURAMIDE 25 and DLC 27 are essentially unchanged. In RIE/ion mill step 31 (right side of FIG. 2 ), the various layers are reduced, but it is virtually impossible to predict or control the resultant width 33 of the layers. Although these conventional processing techniques can produce desirable results, the inability to consistently manipulate the end results is less than satisfactory. In particular, it would be helpful to obtain a well-defined carbon mask that does not depend upon the fast-etched DURAMIDE layer for TW definition.

›SUMMARY OF THE INVENTION

One embodiment of a system and method for obtaining well-defined DLC mask edges includes a static mask for the DLC layer. In the solution of the present invention, an RIE-resistant layer is deposited after the DLC layer. This new layer can be relatively thin since the RIE process is short. A combination of RIE and reactive ion beam etching (RIBE) processes, and ion milling processes are used to form the mask structure. The RIE-resistant layer precisely defines the DLC edge and minimizes the line edge roughness that results from fast removal of duramide during RIE.

This solution for controlling the formation of the edges of the sensors (i.e., width) has many advantages. It provides the best definition for DLC mask edges. It is also desirable for the new image layer to be chemically-mechanically polished (CMP) to eliminate ion milling before the final RIE step. The high mill rate of the RIE-resistant or image layer is desirable as it reduces ion mill consumption of resist. The RIE-resistant layer may be formed from different types of material, such as Rh, Cu, NiFe, and the like. The DLC layer defines the TW and yields sharp sensor edge definition.

The foregoing and other objects and advantages of the present invention will be apparent to those skilled in the art, in view of the following detailed description of the present invention, taken in conjunction with the appended claims and the accompanying drawings.

›BRIEF DESCRIPTION OF THE DRAWINGS

So that the manner in which the features and advantages of the invention, as well as others which will become apparent are attained and can be understood in more detail, more particular description of the invention briefly summarized above may be had by reference to the embodiment thereof which is illustrated in the appended drawings, which drawings form a part of this specification. It is to be noted, however, that the drawings illustrate only an embodiment of the invention and therefore are not to be considered limiting of its scope as the invention may admit to other equally effective embodiments.

FIG. 1 is a sectional side view of a tunneling electron microscope image of a conventionally masked sensor;

FIG. 2 is a schematic diagram of a conventional masking process; and

FIG. 3 is a schematic diagram of one embodiment of a masking process constructed in accordance with the present invention.

›DETAILED DESCRIPTION OF THE INVENTION

Referring to FIG. 3 , one embodiment of the present invention is shown. At its most basic level, the present invention comprises a system and method of forming masks for structures having relatively narrow track widths. In this disclosure, “narrow” TWs are defined as those less than approximately 100 nm, but this depends upon the application and the processes used.

As shown in FIG. 3 , one embodiment of the present invention comprises defining a structure 401 having a DLC layer 403 , a layer of hydrophilic polymers of acrylamide (e.g., DURAMIDE) 405 , and a photoresist (e.g., TIS) layer 407 . At least one mask or image layer 409 of an RIE-resistant material is also provided. The image layer(s) 409 may be formed with ion milling, but other types of processes including, for example, RIE, ion milling, and reactive ion beam etching may be used as well. In addition, the image layer 409 may be formed from a variety of materials including, for example, Rh, Cu, NiFe, and the like, at a thickness of approximately 20 to 100 Å in one embodiment.

The image layer 409 is located between the DLC layer 403 and the photoresist layer 407 . In the embodiment shown, the image layer 409 is located directly between the DLC and hydrophilic polymers of acrylamide layers 403 , 405 . The sensor device 401 may be processed as illustrated in FIG. 3 . In one embodiment, the method comprises forming a structure 401 having a sensor 413 and a mask including a DLC layer 403 , a DURAMIDE layer 405 , and a photoresist layer 407 . The image layer 409 is positioned in the mask between the DLC layer 403 and the photoresist layer 407 to ultimately control a track width 415 (far right side of FIG. 3 ) of the sensor 413 extending in a direction that is co-planar with a plane defined by the sensor 413 . The mask is spin processed 417 , exposed and developed 419 , and the DURAMIDE layer 405 is processed, as indicated at step 421 . The image layer 409 is ion milled 423 . The DLC layer 403 is again processed 425 . Finally, ion milling 427 is performed on the structure to define the track width 415 of the mask and the sensor 413 .

Reactive ion etching 421 may be directed to the DURAMIDE layer 405 , and reactive ion etching 425 may be directed to the DLC layer 403 . The image layer 409 may be provided as a RIE-resistant layer that precisely defines an edge of the DLC layer 403 to reduce a line edge roughness thereof. The method may further comprise chemical-mechanical polishing (CMP) the image layer 409 to eliminate ion milling before the second RIE removal step 425 . When the image layer 409 is located directly between the DLC and DURAMIDE layers 403 , 405 , the image layer 409 is a static mask for the DLC layer 403 . The formation of the image layer 409 may be performed as described above for the previous embodiment. The image layer 409 may be removed with physical sputtering.

While the invention has been shown or described in only some of its forms, it should be apparent to those skilled in the art that it is not so limited, but is susceptible to various changes without departing from the scope of the invention.

Claims as granted

16 claims

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Classifications

6 codes
IPC · International Patent Classification
Section H — Electricity
  • H10P95/00
USPC · US Patent Classification
438/738257/755257/E21.53257/E21.232438/105

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File wrapper

⤢ drag to zoomJul 2005Oct 2005Jan 2006Apr 2006Jul 2006Oct 2006Jan 2007Apr 2007Jul 2007USPTOApplicantResponse after non-finalResponse after non-finalFinal rejectionRequest for continued examination
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Pendency
2.0 y
733 days filing → grant
Office actions
2
non-final + final
Responses
2
1 RCE
Interviews
1
examiner interview summaries
Examiner
Michelle Estrada
art unit 2823 · TC 2800
Citations: 14 back · 1 forward

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