USPatent applicationPatented

Semiconductor device including vanadium oxide sensor element with restricted current density

Granted 9 Jun 2009 · 4 office actions

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Description

6 parts
›BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device including a sensor element made of vanadium oxide serving as a temperature sensor or an infrared sensor.

2. Description of the Related Art

Recently, temperature sensors have been introduced into a large scale integrated circuit (LSI) device to monitor the ambient temperature thereof (see: JP-1-302849-A). As a result, when the ambient temperature exceeds a normal temperature, a bias voltage applied to the LSI device is stopped to surely prevent the LSI device from being destroyed thermally due to the rise of the ambient temperature.

A first prior art temperature sensor is constructed by a temperature sensor element formed by a diode and a resistor having different temperature coefficients (also see: JP-1-302849-A).

In the above-described first prior art temperature sensor, however, since the temperature coefficient of the diode is so small that the difference in temperature coefficient between the diode and the resistor is small, a large signal-to-noise ratio (SNR) cannot be expected.

A second prior art temperature sensor is constructed by a temperature sensor element formed by a parasitic bipolar transistor or a parasitic pn diode (see: JP-9-229778-A). Since the parasitic bipolar transistor or the parasitic diode can be formed by a conventional MOS manufacturing process, the manufacturing cost can be decreased.

In the above-described second prior art temperature sensor, however, since the temperature coefficient of the parasitic bipolar transistor or the parasitic diode is still small, for example, about 0.2 (%/K), a large SNR cannot be expected.

A third prior art temperature sensor is constructed by a temperature sensor element made of vanadium oxide (see: JP-11-330051-A). Since the temperature coefficient of vanadium oxide is very large, a large SNR can be expected.

Note that stable vanadium oxide is represented by a chemical formula VO 2 or V 2 O 5 , generally, VO X where X is about 2.

In the above-described third prior art temperature sensor, however, since a current is supplied to the vanadium oxide temperature sensor element, when an excessive current is supplied thereto, the vanadium oxide temperature sensor element would be broken down.

Also, JP-11-118567-A and JP-2003-121268—A disclose a bridge circuit including temperature sensor elements to enhance the sensitivity and a temperature detecting circuit connected to the two output terminals of the bridge circuit.

On the other hand, a prior art infrared sensor is constructed by an infrared sensor element made of vanadium oxide (see: JP-2001-0997-05-A). Since the temperature coefficient of vanadium oxide is very large, a large SNR can be expected.

Even in the above-described prior art infrared sensor, however, since a current is supplied to the vanadium oxide infrared sensor element, when an excessive current is supplied thereto, the vanadium oxide infrared sensor element would be broken down. Note that the above-mentioned infrared sensor is applied to an infrared camera formed by a plurality of infrared sensors to which pulse-shaped currents are supplied, In this case, if the number of pixels is so small that the vanadium oxide infrared sensor elements are large in size, such pulse-shaped currents supplied thereto hardly break down the vanadium oxide infrared sensor elements. On the other hand, if the number of pixels is so large that the vanadium oxide infrared sensor elements are small in size, such pulse-shaped currents supplied thereto would break down the vanadium oxide infrared sensor elements.

›SUMMARY OF THE INVENTION

It is an object of the present invention to provide a semiconductor device including at least one sensor element made of vanadium oxide capable of avoiding the breakdown thereof.

According to the present invention, in a semiconductor device including a semiconductor substrate and at least one sensor element made of vanadium oxide formed over the semiconductor substrate, the sensor element is designed so that a density of a current flowing through the sensor element is between 0 and 100 μA/μm 2 .

›BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be more clearly understood from the description set forth below, with reference to the accompanying drawings, wherein:

FIG. 1A is a perspective view illustrating a sensor element made of vanadium oxide according to the present invention;

FIG. 1B is a graph showing the length L-to-current I/W characteristics of the sensor element of FIG. 1A ;

FIG. 2 is a circuit diagram illustrating a first embodiment of the semiconductor device including a temperature sensor element made of vanadium oxide according to the present invention;

FIG. 3 is a cross-sectional view of the semiconductor device of FIG. 2 ;

FIG. 4 is a circuit diagram illustrating a second embodiment of the semiconductor device including an infrared sensor element made of vanadium oxide according to the present invention; and

FIG. 5 is a cross-sectional view of the resistor of FIG. 4 .

›DESCRIPTION OF THE PREFERRED EMBODIMENTS · 1 of 3

A sensor element made of vanadium oxide according to the present invention will be explained with reference to FIGS. 1A and 1B .

In FIG. 1A , a sensor element made of vanadium oxide has a length L, a width W and a thickness T (=0.1 μm).

According to the inventors' experiments, when a voltage of 1V was applied between the terminals of the sensor element of FIG. 1A , a current I flowing therethrough was as shown in FIG. 1B . In FIG. 1B , the larger the length L, the smaller the current I/the width W. In this case, when I(μA)/W(μm) was larger than 10, the sensor element, broke down. On the other hand, when I(μA)/W(μm) was smaller than 10, the sensor element of FIG. 1A did not break down. In other words, when a current density J(μA/μm 2 )=(I/W)/T(>0) was smaller than 100, the sensor element of FIG. 1A did not break down. Thus, according to the present invention, the sensor element of FIG. 1A is designed so that a current density J flowing therethrough is smaller than 100 μA/μm 2 .

In FIG. 2 , which illustrates a first embodiment of the semiconductor device according to the present invention, this semiconductor device forms a temperature sensor which is constructed by a temperature sensing circuit 1 and a differential amplifier 2 .

The temperature sensing circuit 1 is constructed by sensor elements (temperature monitor resistors) R 1 and R 2 connected in series between a power supply terminal V cc and a ground terminal GND and temperature monitor resistors R 3 and R 4 connected in series between the power supply terminal V cc and the ground terminal GND. Also, the temperature monitor resistors R 2 and R 3 are made of vanadium oxide whose temperature coefficient is −1.5(%/K), and the temperature monitor resistors R 1 and R 4 are made of amorphous silicon whose temperature coefficient is 0.3(%/K). Further, assume that the resistance values of the temperature monitor resistors R 1 , R 2 , R 3 and R 4 are equal to 25 kΩ at a room temperature of 25° C. In this case, when the temperature is −50° C., the resistance values of the temperature monitor resistors R 2 and R 3 are 77 kΩ, and the resistance values of the temperature monitor resistors R 1 and 14 are 20 kΩ, and when the temperature is 100° C., the resistance values of the temperature monitor resistors R 2 and R 3 are 8 kΩ and the resistance values of the temperature monitor resistors R 1 and R 4 are 30 kΩ. Therefore, when the temperature is changed from −50° C. to 100° C., the total resistance value of the temperature monitor resistors R 1 and R 2 and the total resistance value of the temperature monitor resistors R 3 and R 4 are changed from 97 kΩ to 38 kΩ.

Also, assume that the power supply terminal V cc is at 3.3V and the ground terminal GND is at 0V, then, a current I 1 flowing through the temperature monitor resistors R 1 and R 2 and a current I 2 flowing through the temperature monitor resistors R 3 and R 4 are changed from about 34 to 87 μΛ.

If the width W and thickness T of the temperature monitor resistors R 2 and R 3 is 20 μm and 0.2 μm, respectively, the cross-section of the temperature monitor resistors R 2 and R 3 is 4 μm 2 . Therefore, the current density J flowing through the temperature monitor resistors R 2 and R 3 is 8.5 to 21.8 μA/μm 2 which satisfies the above-mentioned condition that the current density J is between 0 and 100 μA/μm 2 ,

Also, the differential amplifier 2 amplifies the difference ΔV between a sense voltage V 1 at a connection between the temperature monitor resistors R 1 and R 2 and a sense voltage V 2 at a connection between the temperature resistors R 3 and R 4 to generate an output voltage V out corresponding to the ambient temperature or the heat generated by an internal logic circuit (not shown). In more detail, a p-channel load MOS transistor Q p1 and an N-channel MOS transistor Q n1 for receiving the sense voltage V 1 of the temperature sensing circuit 1 are connected in series between the power supply terminal V cc and the ground terminal GND, and a p-channel load MOS transistor Q p2 and an N-channel MOS transistor Q n2 for receiving the sense voltage V 2 of the temperature sensing circuit 1 are connected in series between the power supply terminal V cc and the ground terminal GND. In this case, the transistors Q p1 and Q p2 form a current mirror circuit.

In FIG. 3 , which is a cross-sectional view of the semiconductor device of FIG. 2 , this semiconductor device is constructed by a p-type monocrystalline silicon substrate 31 , a multi-layer interconnection layer 32 formed on the silicon substrate 31 , an insulating layer 33 formed on the multi-layer interconnection layer 32 and a sheet layer 34 formed on the insulating layer 33 .

The multi-layer interconnection layer 32 is a stacked layer formed of a plurality of conductive layers and a plurality of insulating layers.

The sheet layer 34 is used only for covering the vanadium oxide, not for the conventional conductive layers.

The semiconductor device of FIG. 3 is divided into a logic circuit area A 1 for a logic circuit, the differential amplifier 2 of FIG. 2 and the like and a temperature sensing area A 2 for the temperature sensing circuit 1 of FIG. 2 .

In the logic circuit area A 1 , one typical complementary metal oxide silicon (CMOS) transistor, i.e., one p-channel MOS transistor and one n-channel MOS transistor are formed. That is, an n type well region 311 with p + -type impurity diffusion regions 311 S and 311 D and a p − -type well region 312 with n 1 -type impurity diffusion regions 312 S and 312 D are formed in the silicon substrate 31 . Also, gate electrodes G 1 and G 2 , to which voltages V G1 and V G2 are applied, are formed over the n − -type well region 311 and the p − -type well region 312 , respectively. Further, the p + -type impurity diffusion region 311 S is connected through a via structure V 11 to a wiring layer W 11 which is also connected through a via structure V 12 to a wiring layer W 12 to which the power supply voltage V cc is applied. The p + -type impurity diffusion region 311 D is connected through a via structure V 13 to a wiring layer W 13 , and the n 30 -type impurity diffusion region 312 D is connected through a via structure V 14 to the wiring layer W 13 . The n + -type impurity diffusion region 312 S is connected through a via structure V 15 to a wiring layer W 15 which is also connected through a via structure V 16 to a wiring layer W 16 to which the ground voltage GND is applied.

›DESCRIPTION OF THE PREFERRED EMBODIMENTS · 2 of 3

The temperature sensing area A 2 is explained next.

The temperature monitor resistors R 2 and R 3 made of vanadium oxide (VO x ) are formed on the insulating layer 33 and are covered by the sheet layer 34 . The temperature monitor resistors R 2 and R 3 have the same rectangular shape of (10 to 100 μm)×(10 to 100 μm) with a thickness of 0.1 to 0.2 μm. The temperature monitor resistors R 2 and R 3 have a volume resistivity of 0.01 to 10 Ω·cm and a temperature coefficient of −1.5(%/K).

The temperature monitor resistors R 1 and R 4 made of n-type impurities duped amorphous silicon are formed over the silicon substrate 31 within the multi-layer interconnection layer 32 . The temperature monitor resistors R 2 and R 3 have the same rectangular shape of (1 to 100 μm)×(1 to 100 μm) with a thickness of 0.1 to 0.3 μm. The temperature monitor resistors R 2 and R 3 have a temperature coefficient of 0.3(%/K). That is, the absolute value of the temperature coefficient of the temperature monitor resistors R 1 and R 4 is smaller than that of the temperature monitor resistors R 2 and R 3 .

Note that the resistance values of the temperature monitor resistors R 1 , R 2 , R 3 and R 4 are approximately the same, for example, 25 kΩ at a room temperature of 25° C.

A series of the temperature monitor resistors R 1 and R 2 is explained next.

An end of the temperature monitor resistor R 1 is connected through a via structure V 21 to a wiring layer W 21 which is also connected through a via structure V 22 to a wiring layer W 22 to which the power supply voltage V cc is applied.

The other end of the temperature monitor resistor R 1 is connected through a via structure V 23 to a wiring layer W 23 which is also connected through a via structure V 24 to a wiring layer W 24 which is further connected through a via structure V 25 to an end of the temperature monitor resistor R 2 .

A p + -type impurity diffusion region 313 in the silicon substrate 31 is connected through a via structure V 26 to a wiring layer W 26 which is also connected through a via structure V 27 to a wiring layer WZ 7 which is further connected through a via structure V 28 to the other end of the temperature monitor resistor R 2 .

A p + -type impurity diffusion region 314 is connected through a via structure V 29 to a wiring layer W 29 which is also connected through a via structure V 30 to a wiring structure W 30 to which the ground voltage GND is applied.

Thus, the p + -type impurity diffusion region 313 is the p-type silicon substrate 31 .

The wiring layer W 23 generates the sense voltage V 1 of FIG. 2 .

Thus, the series of the temperature monitor resistors R 1 and R 2 are connected between the power supply terminal V cc and the ground terminal GND.

A series of the temperature monitor resistors R 3 and R 4 is explained next.

An end of the temperature monitor resistor R 3 is connected through a via structure 31 to the wiring layer 22 to which the power supply voltage V cc is applied.

An end of the temperature monitor resistor R 4 is connected through a via structure V 32 to a wiring layer W 32 which is also connected through a via structure V 33 to a wiring layer W 33 which is further connected to the other end of the temperature monitor resistor R 3 .

Another end of the temperature monitor resistor R 4 is connected through a via structure V 35 to a wiring layer W 35 which is also connected through a via structure V 36 to a p + -type impurity diffusion region 315 which is grounded by the p + -type impurity diffusion region 314 in the silicon substrate 31 .

The wiring layer W 32 generates the sense voltage V 2 of FIG. 2 .

Thus, the series of the temperature monitor resistors R 3 and R 4 are connected between the power supply terminal V cc and the ground terminal GND.

In FIG. 3 , the gate electrodes G 1 and G 2 are formed by the same layer. The temperature monitor resistors R 3 and R 4 are formed by the same layer. The via structures V 11 , V 13 , V 14 , V 15 , V 21 , V 23 , V 26 , V 32 , V 35 and V 36 are formed by the same material. The wiring layers W 11 , W 13 , W 15 , W 21 , W 23 , W 26 , W 32 and W 35 are formed by the same layer. The via structures V 12 , V 16 , V 22 , V 24 , V 27 , V 30 and V 33 are formed by the same layer. The wiring layers W 12 , W 16 , W 22 , W 24 , W 27 , W 30 and W 33 are formed by the same layer. The via structures V 25 , V 28 , V 31 and V 33 are formed by the same layer. The temperature monitor resistors R 2 and R 3 are formed by the same layer.

The operation of the semiconductor device of FIG. 2 is explained next.

As explained above, when V cc =3.3V and GND=0V, the current I 1 flowing through the temperature monitor resistors R 1 and R 2 and the current I 2 flowing trough the temperature monitor resistors R 3 and R 4 are from 34 to 87 μA, and the current density J of the temperature monitor resistors R 2 and R 3 is from 8.5 to 21.8 μA/μm 2 . As a result, the sense voltage V 1 at the connection between the temperature monitor resistors R 1 and R 2 is determined by V cc ×R 2 /(R 1 +R 2 ), and the sense voltage V 2 at the connection between the temperature monitor resistors R 3 and R 4 is determined by V cc ×R 4 /(R 3 +R 4 ).

When the ambient temperature is increased or the logic circuit area A 1 generates heat therein, the temperature monitor resistors R 1 , R 2 , R 3 and R 4 are also heated. Therefore, the decrease in the resistance values of the temperature monitor resistors R 2 and R 3 is relatively large, while the increase in the resistance values of the temperature monitor resistors R 1 and R 4 is relatively small. As a result, the sense voltage V 1 is decreased and the sense voltage V 2 is increased, so that the difference between the sense voltage V 1 and V 2 is enhanced. Thus, the enhanced difference between the sense voltages V 1 and V 2 is amplified by the differential amplifier 2 to generate its output voltage V out . For example, if the output voltage V out its larger than a predetermined value, the bias voltage applied to the logic circuit area A 1 of FIG. 3 is stopped.

›DESCRIPTION OF THE PREFERRED EMBODIMENTS · 3 of 3

In FIGS. 2 and 3 , since the current density J of the temperature monitor resistors R 2 and R 3 is smaller than 100 μA/μm 2 , the temperature monitor resistors R 2 and R 3 can be prevented from being destroyed.

Also, since the temperature monitor resistors R 2 and R 3 are made of vanadium oxide having a large temperature coefficient, i.e., about 1.5 %/K, a higher SNR can be obtained.

Further, the temperature sensing circuit 1 , i.e., the bridge circuit formed by the temperature monitor resistors R 1 , R 2 , R 3 and R 4 can increase the accuracy of measurement of temperature, and the differential amplifier 2 amplifies the difference in output between the bridge circuit can further increase the accuracy of measurement of temperature.

For example, at a room temperature of 25° C., if each of the temperature monitor resistors R 1 , R 2 , R 3 and R 4 is 1 kΩ, the sense voltages V 1 and V 2 under V cc =3.3V and GND=0V are

Then, the temperature is increased by 10° C. to 35° C.,

Note that the difference ΔV is twice the corresponding difference without the bridge circuit. This difference is further increased by the differential amplifier 2 .

In FIG. 3 , the temperature monitor resistors (vanadium oxide) R 2 and R 3 are formed on the insulating layer 33 under the sheet layer 34 and the logic circuit of the logic circuit area A 1 within the silicon substrate 31 and the multi-layer interconnection layer 32 . Therefore, the logic circuit and the manufacturing equipment therefor is hardly contaminated by vanadium oxide. Note that the temperature monitor resistors (amorphous silicon) R 1 and R 4 are manufactured by a conventional manufacturing prooooo.

Further, the temperature monitor resistors R 1 and R 4 can be made of polycrystalline silicon.

Additionally, in FIG. 3 , a part of the temperature monitor resistors R 2 and R 3 can be formed on the logic circuit area A 1 , which would enhance the integration.

The temperature sensing circuit 1 and the differential amplifier 2 of FIG. 2 can be at a single place or a plurality of places of one chip. In this latter case, a mean value of temperature measurements can be used.

In FIG. 4 , which illustrates a second embodiment of the semiconductor device according to the present invention, this semiconductor device forms an infrared detecting sensor mounted on an infrared receiving unit of an infrared camera.

In FIG. 4 , one pixel P ij (i=1, 2, . . . , m, j=1, 2, . . . , n) formed by a MOS transistor Q and an infrared monitor resistor R is provided at each intersection between gate lines X 1 , X 2 , . . . X m and data lines Y 1 , Y 2 , . . . , Y n . The gate lines X 1 , X 2 , . . . , X m are sequentially selected by a vertical shift register 41 which receives a vertical synchronization signal VSYNC and shifts it in accordance with a horizontal synchronization signal HSYNC. On the other hand, the data lines Y 1 , Y 2 , . . . , Y n are sequentially selected by a horizontal shift register 42 which receives the horizontal synchronization signal HSYNC and shifts it in accordance with a clock signal CLK. Thus, in a selected pixel P ij , a signal voltage V out is dependent upon its bias current I B which is dependent upon the resistance of the infrared monitor resistor R of a selected pixel.

In FIG. 5 , which is a cross-sectional view of the infrared monitor resistor R of FIG. 4 , reference numeral 51 designates a p-type monocrystalline silicon substrate on which a reflection plate 52 made of Cr/Pt is formed. Also, an insulating layer 53 made of SiN, a pair of conductive beams 54 and 55 made of NiCr and an insulating layer 56 made of SiN are formed, and an infrared sensor element 67 (made of vanadium oxide connected between the conductive beams 54 and 55 are provided. In this case, the infrared sensor element 57 is also supported by the conductive beams 54 and 55 , so that an air gap AG is formed. Thus, the infrared sensor element 57 is isolated thermally from the silicon substrate 51 .

The infrared sensor element 57 has a length L of 20 μm, a width W of 2 μm and a thickness T of 0.2 μm with a cross section of 0.4 μm 2 .

The cross section of the infrared sensor element 57 is determined so that the current density J is between 0 and 100 μA/μm 2 . For example, when no infrared is incident to the infrared sensor element 57 , the resistance value of the infrared sensor element 57 is 120 kΩ, and when infrared is incident to the infrared sensor element 57 , the resistance value of the infrared sensor element 57 is 95 kΩ. Since the power supply voltage V cc is 3.3V and the ground voltage GND is 0V, the current flowing through the infrared sensor element 57 is 27 to 35 μA at most, which corresponds to a current density of 67 to 88 μA/m 2 . Thus, the current density can be smaller than 100 μA/μm 2 , so that the infrared sensor element 57 made of vanadium oxide would hardly breakdown.

When infrared is incident to the device as indicated by arrows in FIG. 5 , a part of the infrared is absorbed directly by the infrared sensor element 57 , so that the temperature thereof would be increased. Simultaneously, if the infrared passes through the infrared sensor element 57 and the air gap AG to reach the reflection plate 52 , this part of the infrared is reflected by the reflection plate 52 and reaches the infrared sensor element 57 . Thus, the temperature of the infrared sensor element 57 would be further increased.

The above-mentioned infrared sensor element 57 is supplied with a pulse-shaped bias current I B by the vertical shift register 41 and the horizontal shift register 42 of FIG. 4 . Measurements of the bias current I B are carried out by a control circuit (not shown) to form an infrared image.

As explained hereinabove, according to the present invention, the current density of an infrared sensor element made of vanadium oxide is between 0 and 100 μA/μm 2 , the breakdown of a sensor element such as a temperature monitor resistor and an infrared sensor element can be avoided.

›Tables in the description — 1
R⁢
⁢2
=
R⁢
⁢3
=
(1-0.015×10)·1
⁢
⁢k⁢
⁢Ω
=
0.85⁢
⁢k⁢
⁢Ω
R⁢
⁢1
=
R⁢
⁢4
=
(1+0.003×10)·1
⁢
⁢k⁢
⁢Ω
=
1.03⁢
⁢k⁢
⁢Ω
∴
V1
=
3.3×
0.85/(0.85+1.03)
=
1.49⁢
⁢V
V2
=
3.3×
1.03/(0.85+1.03)
=
1.81⁢
⁢V
Δ⁢
⁢V
=
V1
-
V2
=
-0.32
⁢
⁢V

Claims as granted

9 claims

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Classifications

12 codes
IPC · International Patent Classification
Section G — Physics
  • G01J5/12
  • G01J5/24
  • G01J5/00
Section H — Electricity
  • H10P95/00
  • H01L21/822
  • H01L27/06
  • H01L27/04
  • H01L21/8234
  • H01L31/058
  • H01L27/02
USPC · US Patent Classification
250/338.1257/467

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David P Porta
art unit 2884 · TC 2800
Citations: 23 back · 2 forward

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