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Inventor

Hiroaki Ohkubo

Inventor
Kanagawa, JP

Overview

54→
Patents
1996–2017
Patent span
Electricity
Primary field (CPC H)

Patents· 54 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices25%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1023%
H10BElectronic memory devices10%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation8%
G11CStatic stores7%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
G01KMeasuring temperature4%
G06KGraphical data reading3%
G06VImage or video recognition or understanding3%
H03KPulse technique3%
PatentTitleYear
9,846,831Interface IC and memory card including the same20179,305,253'Interface IC and memory card including the same'20168,810,699'Solid state imaging device including a light receiving portion with a silicided surface'20148,534,563'Interface IC and memory card including the same'20138,461,907'Semiconductor device'20138,416,330'Solid state imaging device for imaging an object placed thereon'20138,357,990'Semiconductor device'20138,339,182'Semiconductor device'20128,330,254'Semiconductor device'20128,233,063'Solid state image pick-up device for imaging an object placed thereon'20128,217,709'Semiconductor device'20128,188,566'Semiconductor integrated circuit device'20128,130,297'Solid state imaging device including a light receiving portion with a silicided surface'20127,973,383'Semiconductor integrated circuit device having a decoupling capacitor'20117,800,668'Solid state imaging device including a light receiving portion with a silicided surface'20107,777,298'Semiconductor device and method of manufacturing the same'20107,777,288'Integrated circuit device and fabrication method therefor'20107,741,692'Integrated circuit device with temperature monitor members'20107,579,673'Semiconductor device having electrical fuse'20097,544,940'Semiconductor device including vanadium oxide sensor element with restricted current density'20097,498,626'Semiconductor device and method of manufacturing the same'20097,462,921'Integrated circuit device, method of manufacturing the same and method of forming vanadium oxide film'20087,432,170'Semiconductor device and fabrication method thereof'20087,432,545'Semiconductor device'20087,417,277'Semiconductor integrated circuit and method of manufacturing the same'20087,391,092'Integrated circuit including a temperature monitor element and thermal conducting layer'20087,345,347'Semiconductor device'20087,288,826'Semiconductor integrated circuit device'20077,274,395'MOS-type image sensor configured to reduce coupling noise'20077,256,456'SOI substrate and semiconductor integrated circuit device'20077,239,002'Integrated circuit device'20077,211,870'Semiconductor device'20077,095,072'Semiconductor device with wiring layers forming a capacitor'20067,091,576'Inductor for semiconductor integrated circuit and method of fabricating the same'20067,030,919'Solid state image pick-up device'20066,879,234'Semiconductor integrated circuit'20056,849,913'Integrated circuit including an inductor, active layers with isolation dielectrics, and multiple insulation layers'20056,841,843'Semiconductor integrated circuit device'20056,806,522'CMOS image sensor and manufacturing method for the same'20046,707,116'Integrated circuit and manufacturing method therefor'20046,639,293'Solid-state imaging device'20036,635,912'CMOS image sensor and manufacturing method thereof'20036,576,882'Image sensor'20036,545,360'Semiconductor device and manufacturing method thereof'20036,534,803'Electronic device, semiconductor device, and electrode forming method'20036,160,298'Full CMOS SRAM cell comprising Vcc and Vss buses on both sides of each of complementary data lines on a single level'20006,153,908'Buried-gate semiconductor device with improved level of integration'20006,133,586'Semiconductor memory device and method of fabricating the same'20006,127,708'Semiconductor device having an intervening region between channel stopper and diffusion region'20006,009,010'Static semiconductor memory device having data lines in parallel with power supply lines'19995,926,698'Semiconductor memory device and method of fabricating the same'19995,811,858'Semiconductor integrated circuit device having gate or active area patterned to allow for misalignment'19985,521,860'CMOS static memory'19965,504,705'Semiconductor memory device'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2012Patents assigned to NEC CORP (17)· patent assignee history
1996–2017Based in Tokyo, JP· patent location history
2003–2010Patents assigned to NEC ELECTRONICS CORP (28)· patent assignee history
2005–2014Based in Kanagawa, JP· patent location history
2007–2016Based in Kawasaki, JP· patent location history
2011–2017Patents assigned to RENESAS ELECTRONICS CORP (14)· patent assignee history
2012–2014Patents assigned to OHKUBO HIROAKI (10)· patent assignee history
2012–2014Patents assigned to NAKASHIBA YASUTAKA (9)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NEC ELECTRONICS CORP282003–2010
NEC CORP171996–2012
RENESAS ELECTRONICS CORP142011–2017
OHKUBO HIROAKIself102012–2014
NAKASHIBA YASUTAKA92012–2014
Locations
LocationPatentsSpan
Kanagawa, JP292005–2014
Tokyo, JP221996–2017
Kawasaki, JP32007–2016