Inventor

Hao-Yi Tsai

Inventor

Hsinchu, TW

Overview

2003–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 215 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1033%

H01LSemiconductor devices27%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%

H10DInorganic electric semiconductor devices7%

G06KGraphical data reading3%

H01FMagnets2%

G06VImage or video recognition or understanding2%

G01RMeasuring electric variables1%

H02JElectric power networks1%

G06FElectric digital data processing1%

PatentTitleYear

10,879,221Package-on-package structure2020 10,878,073Fingerprint sensor pixel array and methods of forming same2020 10,867,911InFO coil structure and methods of manufacturing same2020 10,861,823Dual-sided integrated fan-out package2020 10,861,841Semiconductor device with multiple polarity groups2020 10,853,616Fingerprint sensor device and method2020 10,847,304InFO coil on metal plate with slot2020 10,847,505Multi-chip semiconductor package2020 10,840,227Under-bump-metallization structure and redistribution layer design for integrated fan-out package with integrated passive device2020 10,840,111Chip package with fan-out structure2020 10,832,985Sensor package and method2020 10,825,602Stacked coil for wireless charging structure on InFO package2020 10,811,384Semiconductor package and method of manufacturing the same2020 10,797,008Semiconductor package and manufacturing method thereof2020 10,790,269Semiconductor devices and semiconductor structures2020 10,790,244Semiconductor device and method2020 10,784,203Semiconductor package and method2020 10,762,319Fingerprint sensor and manufacturing method thereof2020 10,763,229Semiconductor structure2020 10,734,328Semiconductor package and manufacturing method thereof2020 10,720,388Wireless charging package with chip integrated in coil center2020 10,720,495Semiconductor device and manufacturing method thereof2020 10,720,416Semiconductor package including thermal relaxation block and manufacturing method thereof2020 10,707,094Semiconductor package and manufacturing process thereof2020 10,698,994Fingerprint sensor pixel array and methods of forming same2020 10,700,008Package structure having redistribution layer structures2020 10,672,729Package structure and method of forming package structure2020 10,658,258Chip package and method of forming the same2020 10,658,348Semiconductor devices having a plurality of first and second conductive strips2020 10,658,334Method for forming a package structure including a package layer surrounding first connectors beside an integrated circuit die and second connectors below the integrated circuit die2020 10,651,675Packaged semiconductor devices with wireless charging means2020 10,530,175Hexagonal semiconductor package structure2020 10,522,481Post-passivation interconnect structure2019 10,510,631Fan out package structure and method of manufacturing the same2019 10,510,686Semiconductor package and manufacturing method thereof2019 10,510,652Method of manufacturing semiconductor device2019 10,509,938Fingerprint sensor device and method2019 10,510,713Semicondcutor package and method of manufacturing the same2019 10,510,478Stacked coil for wireless charging structure on InFO package2019 10,504,810Polymer-based-semiconductor structure with cavity2019 10,497,646Dual-mode wireless charging device2019 10,490,468Semiconductor structure with conductive structure2019 10,475,755Semiconductor structure2019 10,461,023Semiconductor packages and methods of forming the same2019 10,453,815Methods and apparatus for solder connections2019 10,354,114Fingerprint sensor in InFO structure and formation method2019 10,340,236Semiconductor device and method of manufacture2019 10,319,692Semiconductor structure and manufacturing method thereof2019 10,312,204System and method for an improved interconnect structure2019 10,304,614Stacked coil for wireless charging structure on InFO package2019 10,276,509Integrated fan-out package2019 10,276,402Semiconductor package and manufacturing process thereof2019 10,269,481Stacked coil for wireless charging structure on InFO package2019 10,269,737Method for manufacturing semiconductor structure2019 10,268,868Fingerprint sensor device and method2019 10,269,904Semiconductor structure and manufacturing method thereof2019 10,268,872Fingerprint sensor device and method2019 10,269,489Programmable inductor2019 10,269,674Method of manufacturing an integrated fan-out package having fan-out redistribution layer (RDL) to accommodate electrical connectors2019 10,269,773Semiconductor packages and methods of forming the same2019 10,269,702Info coil structure and methods of manufacturing same2019 10,163,780Wireless charging package with chip integrated in coil center2018 10,157,808Package structure and method of forming package structure2018 10,157,274Fingerprint sensor pixel array and methods of forming same2018 10,153,249Dual-sided integrated fan-out package2018 10,125,014Integrated circuit package and method of forming same2018 10,128,213Integrated fan-out stacked package with fan-out redistribution layer (RDL)2018 10,121,749Method of fabricating a post-passivation interconnect structure2018 10,115,685Method of manufacturing a semiconductor structure2018 10,109,605Polymer layers embedded with metal pads for heat dissipation2018 10,097,030Packaged semiconductor devices with wireless charging means2018 10,074,472InFO coil on metal plate with slot2018 10,074,615Package structure and method of fabricating the same2018 10,062,654Semicondcutor structure and semiconductor manufacturing process thereof2018 10,049,953Method of manufacturing an integrated fan-out package having fan-out redistribution layer (RDL) to accommodate electrical connectors2018 10,043,770System and method for an improved interconnect structure2018 10,020,271Calibration kits for RF passive devices2018 9,984,965Inductor system and method2018 9,953,892Polymer based-semiconductor structure with cavity2018 9,953,936Semiconductor structure and manufacturing method thereof2018 9,943,239Optical sensing system and associated electronic device2018 9,947,552Structure and formation method of chip package with fan-out structure2018 9,935,024Method for forming semiconductor structure2018 9,917,072'Method of manufacturing an integrated stacked package with a fan-out redistribution layer (RDL) and a same encapsulating process'2018 9,911,724'Multi-chip package system and methods of forming the same'2018 9,905,520'Solder ball protection structure with thick polymer layer'2018 9,904,776'Fingerprint sensor pixel array and methods of forming same'2018 9,899,288'Interconnect structures for wafer level package and methods of forming same'2018 9,898,645'Fingerprint sensor device and method'2018 9,881,850'Package structures and method of forming the same'2018 9,875,388Fingerprint sensor device and method2018 9,870,997'Integrated fan-out package and method of fabricating the same'2018 9,859,235'Underbump metallization structure'2018 9,850,126Integrated circuit package and method of forming same2017 9,852,985Conductive terminal on integrated circuit2017 9,842,815'Semiconductor device and method of manufacture'2017 9,831,140Wafer having pad structure2017 9,812,392'Inductor system and method'2017 9,806,045'Interconnection structure including a metal post encapsulated by solder joint having a concave outer surface'2017 9,799,615'Package structures having height-adjusted molding members and methods of forming the same'2017 9,799,614'Calibration kits for RF passive devices'2017 9,786,591'Capacitor in post-passivation structures and methods of forming the same'2017 9,786,618'Semiconductor structure and manufacturing method thereof'2017 9,761,522'Wireless charging package with chip integrated in coil center'2017 9,728,477'Method of manufacturing a semiconductor device having scribe lines'2017 9,691,708'Semiconductor package and manufacturing method thereof'2017 9,659,896'Interconnect structures for wafer level package and methods of forming same'2017 9,653,406'Conductive traces in semiconductor devices and methods of forming same'2017 9,647,054'Inductor system and method'2017 9,640,498'Integrated fan-out (InFO) package structures and methods of forming same'2017 9,633,963'Packaging devices and methods of manufacture thereof'2017 9,633,870'System and method for an improved interconnect structure'2017 9,620,465'Dual-sided integrated fan-out package'2017 9,613,914'Post-passivation interconnect structure'2017 9,601,446'Method of fabricating a bond pad structure'2017 9,601,443'Test structure for seal ring quality monitor'2017 9,589,941'Multi-chip package system and methods of forming the same'2017 9,589,915'Semiconductor device and manufacturing method thereof'2017 9,553,045'Inductor for post passivation interconnect and a method of forming'2017 9,543,259'Semiconductor structure with oval shaped conductor'2017 9,536,847'Bump pad structure'2017 9,530,757'Single mask package apparatus'2016 9,530,759'3D package with through substrate vias'2016 9,515,036'Methods and apparatus for solder connections'2016 9,490,203'Capacitor in post-passivation structures and methods of forming the same'2016 9,461,106'MIM capacitor and method forming the same'2016 9,449,927'Seal ring structure with metal-insulator-metal capacitor'2016 9,443,812'Semiconductor device with post-passivation interconnect structure and method of forming the same'2016 9,437,490'Semiconductor device and manufacturing method thereof'2016 9,425,112'Calibration kits for RF passive devices'2016 9,406,739'Inductor system and method'2016 9,397,060'Package on package structure'2016 9,397,056'Semiconductor device having trench adjacent to receiving area and method of forming the same'2016 9,379,076'Semiconductor device and manufacturing method thereof'2016 9,355,978'Packaging devices and methods of manufacture thereof'2016 9,355,954'Capacitor in post-passivation structures and methods of forming the same'2016 9,349,655'Method for mechanical stress enhancement in semiconductor devices'2016 9,343,415'Copper post structure for wafer level chip scale package'2016 9,343,385'Semiconductor device comprising a chip substrate, a mold, and a buffer layer'2016 9,337,154'Semiconductor device and method of manufacturing the same'2016 9,331,023'Device packaging'2016 9,305,877'3D package with through substrate vias'2016 9,293,606'Semiconductor device with seal ring with embedded decoupling capacitor'2016 9,287,143'Apparatus for package reinforcement using molding underfill'2016 9,275,925'System and method for an improved interconnect structure'2016 9,240,387'Wafer-level chip scale package with re-workable underfill'2016 9,171,811'Bump pad structure'2015 9,165,875'Low profile interposer with stud structure'2015 9,136,318'Capacitor in post-passivation structures and methods of forming the same'2015 9,123,601'Package on package structure'2015 9,093,411'Pad structure having contact bars extending into substrate and wafer having the pad structure'2015 9,082,761'Polymer layers embedded with metal pads for heat dissipation'2015 9,041,215'Single mask package apparatus and method'2015 9,035,468'Copper post structure for wafer level chip scale package'2015 9,013,038'Semiconductor device with post-passivation interconnect structure and method of forming the same'2015 9,000,876'Inductor for post passivation interconnect'2015 8,993,355'Test line placement to improve die sawing quality'2015 8,981,580'Bond pad structure'2015 8,970,001'Guard ring design for maintaining signal integrity'2015 8,963,328'Reducing delamination between an underfill and a buffer layer in a bond structure'2015 8,916,956'Multiple die packaging interposer structure and method'2014 8,907,478'Bump pad structure'2014 8,884,400'Capacitor in Post-Passivation structures and methods of forming the same'2014 8,884,412'Multiple die packaging interposer structure and method'2014 8,860,208'Heat spreader structures in scribe lines'2014 8,836,084'Structure for reducing integrated circuit corner peeling'2014 8,749,020'Metal e-fuse structure design'2014 8,749,043'Package on package structure'2014 8,722,529'Double solid metal pad with reduced area'2014 8,703,539'Multiple die packaging interposer structure and method'2014 8,685,798'Methods for forming through vias'2014 8,669,651'Package-on-package structures with reduced bump bridging'2014 8,648,444'Wafer scribe line structure for improving IC reliability'2014 8,643,147'Seal ring structure with improved cracking protection and reduced problems'2014 8,618,827'Measurement of electrical and mechanical characteristics of low-K dielectric in a semiconductor device'2013 8,618,673'Package structures'2013 8,610,267'Reducing delamination between an underfill and a buffer layer in a bond structure'2013 8,581,423'Double solid metal pad with reduced area'2013 8,519,512'Test line placement to improve die sawing quality'2013 8,476,770'Apparatus and methods for forming through vias'2013 8,450,126'Semiconductor test pad structures'2013 8,405,211'Bump pad structure'2013 8,373,254'Structure for reducing integrated circuit corner peeling'2013 8,368,180'Scribe line metal structure'2013 8,334,582'Protective seal ring for preventing die-saw induced stress'2012 8,278,737'Structure for improving die saw quality'2012 8,237,253'Package structures'2012 8,227,916'Package structure and method for reducing dielectric layer delamination'2012 8,227,917'Bond pad design for fine pitch wire bonding'2012 8,203,209'Bond pad design for reducing the effect of package stress'2012 8,178,980'Bond pad structure'2012 8,125,052'Seal ring structure with improved cracking protection'2012 8,125,233'Parametric testline with increased test pattern areas'2012 8,058,151'Methods of die sawing'2011 8,030,776'Integrated circuit with protective structure'2011 8,013,333'Semiconductor test pad structures'2011 7,936,067'Backend interconnect scheme with middle dielectric layer having improved strength'2011 7,906,836'Heat spreader structures in scribe lines'2011 7,859,092'Package structures'2010 7,811,866'Single passivation layer scheme for forming a fuse'2010 7,776,627'Flexible structures for interconnect reliability test'2010 7,754,601'Semiconductor interconnect air gap formation process'2010 7,732,897'Methods of die sawing and structures formed thereby'2010 7,679,384'Parametric testline with increased test pattern areas'2010 7,651,893'Metal electrical fuse structure'2010 7,553,736'Increasing dielectric constant in local regions for the formation of capacitors'2009 7,449,785'Solder bump on a semiconductor substrate'2008 7,446,398'Bump pattern design for flip chip semiconductor package'2008 7,397,106'Laser fuse with efficient heat dissipation'2008 7,364,998'Method for forming high reliability bump structure'2008 7,294,937'Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling'2007 7,235,424'Method and apparatus for enhanced CMP planarization using surrounded dummy design'2007 7,148,089'Method for forming copper fuse links'2006 7,126,225'Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling'2006 6,624,073'Optimized TaCN thin film diffusion barrier for copper metallization'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2020Based in Hsinchu, TW· patent location history

2006–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (79)· patent assignee history

2011–2018Patents assigned to TSAI HAO-YI (39)· patent assignee history

2011–2018Patents assigned to JENG SHIN-PUU (23)· patent assignee history

2012–2018Patents assigned to CHEN HSIEN-WEI (32)· patent assignee history

2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (134)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	134	2015–2020
TAIWAN SEMICONDUCTOR MFG	79	2006–2016
TSAI HAO-YIself	39	2011–2018
CHEN HSIEN-WEI	32	2012–2018
JENG SHIN-PUU	23	2011–2018

Locations

Location	Patents	Span
Hsinchu, TW	215	2003–2020