Inventor

Thomas D. Bissett

Inventor
Derry, NH, US

Overview

33→
Patents
1989–2018
Patent span
Physics
Primary field (CPC G)

Patents· 33 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing89%
H03DDemodulation or transference of modulation from one carrier to another6%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses6%
PatentTitleYear
10,095,590Controlling the operating state of a fault-tolerant computer system20189,760,442'Method of delaying checkpoints by inspecting network packets'20179,652,338'Dynamic checkpointing systems and methods'20179,588,844'Checkpointing systems and methods using data forwarding'20178,812,907'Fault tolerant computing systems using checkpoints'20147,877,552'Symmetric multiprocessor fault tolerant computer system'20116,473,869'Fault resilient/fault tolerant computing'20026,279,119'Fault resilient/fault tolerant computing'20016,205,565'Fault resilient/fault tolerant computing'20016,038,685'Fault resilient/fault tolerant computing'20005,956,474'Fault resilient/fault tolerant computing'19995,896,523'Loosely-coupled, synchronized execution'19995,790,397'Fault resilient/fault tolerant computing'19985,615,403'Method for executing I/O request by I/O processor after receiving trapped memory address directed to I/O device from all processors concurrently executing same program'19975,600,784'Fault resilient/fault tolerant computing'19975,588,112'DMA controller for memory scrubbing'19965,347,559'Apparatus and method of data transfer between systems using different clocks'19945,339,408'Method and apparatus for reducing checking costs in fault tolerant processors'19945,291,494'Method of handling errors in software'19945,255,367'Fault tolerant, synchronized twin computer system with error checking of I/O communication'19935,251,227'Targeted resets in a data processor including a trace memory to store transactions'19935,249,187'Dual rail processors with error checking on I/O reads'19935,185,877'Protocol for transfer of DMA data'19935,153,881'Method of handling errors in software'19925,099,485'Fault tolerant computer systems with fault isolation and repair'19925,068,780'Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones'19915,068,851'Apparatus and method for documenting faults in computing modules'19915,065,312'Method of converting unique data to system data'19915,048,022'Memory device with transfer of ECC signals on time division multiplexed bidirectional lines'19915,005,174'Dual zone, fault tolerant computer system with error checking in I/O writes'19914,916,704'Interface of non-fault tolerant components to fault tolerant system'19904,907,228'Dual-rail processor with error checking at single rail interfaces'19904,862,465'Dual-rail processors with error checking on I/O reads'1989

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1989–1994Based in Derry, NH, US· patent location history
1990–1996Patents assigned to DIGITAL EQUIPMENT CORP (17)· patent assignee history
1994–1996Based in Northboro, MA, US· patent location history
1997–2014Patents assigned to MARATHON TECHN CORP (11)· patent assignee history
1997–2001Based in Northborough, MA, US· patent location history
2001–2002Based in Kingston, RI, US· patent location history
2011–2018Based in Shirley, MA, US· patent location history
2014–2018Patents assigned to BISSETT THOMAS D (2)· patent assignee history
2014–2018Patents assigned to LEVEILLE PAUL A (2)· patent assignee history
2017Patents assigned to STRATUS TECH BERMUDA LTD (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
DIGITAL EQUIPMENT CORP171990–1996
MARATHON TECHN CORP111997–2014
STRATUS TECH BERMUDA LTD32017
BISSETT THOMAS Dself22014–2018
LEVEILLE PAUL A22014–2018
Locations
LocationPatentsSpan
Derry, NH, US151989–1994
Northborough, Massachusetts, US71997–2001
Shirley, Massachusetts, US62011–2018
Northboro, Massachusetts, US31994–1996
Kingston, RI, US22001–2002