Inventor

Ara Patapoutian

Inventor

Hopkinton, MA, US

Overview

121→

Patents

1995–2021

Patent span

Physics

Primary field (CPC G)

Patents· 121 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Bprimary

G11BInformation storage based on relative movement between record carrier and transducer25%

H03MCoding22%

G06FElectric digital data processing21%

G11CStatic stores19%

H04LTransmission of digital information, e.g. telegraphic communication7%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses4%

G06GAnalogue computers1%

H03HImpedance networks, e.g. resonant circuits1%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use1%

PatentTitleYear

11,121,729Read channel buffer management for higher throughput decoding2021 11,086,717Random selection of code words for read voltage calibration2021 11,042,439Efficient read and recovery with outer code2021 10,979,077Generating hamming weights for data2021 10,951,234Non-linear LLR look-up tables2021 10,944,424Error correction with multiple LLR-LUTS for a single read2021 10,891,189Customized parameterization of read parameters after a decoding failure for solid state storage devices2021 10,892,777Fast error recovery with error correction code (ECC) syndrome weight assist2021 10,804,932Non-linear LLR look-up tables2020 10,719,392Selective sampling for data recovery2020 10,592,134Open block stability scanning2020 10,574,270Sector management in drives having multiple modulation coding2020 10,490,288Page-level reference voltage parameterization for solid statesolid state storage devices2019 10,453,547Monitoring a memory for retirement2019 10,437,674Variable parity sectors2019 10,396,821Generating Hamming weights for data2019 10,379,972Minimizing reads for reallocated sectors2019 10,382,065Iterative outer code recovery using data from multiple reads2019 10,324,648Wear-based access optimization2019 10,263,640Low density parity check (LDPC) decoder with pre-saturation compensation2019 10,254,969Data refresh in flash memory2019 10,177,791Syndrome update and maintenance2019 10,140,180Segment-based outer code recovery2018 10,089,170Open block management2018 10,048,863Open block refresh management2018 10,033,408Scheduling strategies for iterative decoders2018 9,985,775Self-adapting phase-locked loop filter for use in a read channel of a heat assisted magnetic recording drive2018 9,971,913Adaptively combining waveforms2018 9,935,735Multiuse data channel2018 9,910,606'End of life extension of solid state memory'2018 9,858,002'Open block stability scanning'2018 9,576,624'Multi-dimentional data randomization'2017 9,559,725'Multi-strength reed-solomon outer code protection'2017 9,525,576'Self-adapting phase-locked loop filter for use in a read channel'2016 9,473,266'Scheduling strategies for iterative decoders'2016 9,401,161'Magnetic read head with multiple read transducers each having different design characteristics'2016 9,396,062'Group based codes for multi-dimensional recording (MDR)'2016 9,397,703'Adaptive read error recovery for memory devices'2016 9,378,083'Adaptive read error recovery for memory devices'2016 9,362,954'Digital communications channel'2016 9,349,444'Methods and apparatuses using a transfer function to predict resistance shifts and/or noise of resistance-based memory'2016 9,323,584'Load adaptive data recovery pipeline'2016 9,312,886'Storage device with multiple coding redundancies'2016 9,299,402'Mobile personalized boot data'2016 9,280,422'Dynamic distribution of code words among multiple decoders'2016 9,244,766'Variable data recovery scheme hierarchy'2016 9,201,728'Memory device with variable code rate'2015 9,195,860'Adaptively combining waveforms'2015 9,164,832'ECC management for variable resistance memory cells'2015 9,130,596'Multiuse data channel'2015 9,122,619'Opportunistic decoding in memory systems'2015 9,058,869'Applying a bias signal to memory cells to reverse a resistance shift of the memory cells'2015 9,042,169'Shifting cell voltage based on grouping of solid-state, non-volatile memory cells'2015 9,030,769'Data detection in adjacent tracks'2015 9,025,359'Applying a bias signal to memory cells to reverse a resistance shift of the memory cells'2015 9,019,640'Read channel throughput management'2015 9,015,549'Iterating inner and outer codes for data recovery'2015 8,996,963'Buffer management using side information'2015 8,976,474'Universal modulation coding for a data channel'2015 8,949,567'Cross-point resistive-based memory architecture'2015 8,943,384'Using a soft decoder with hard data'2015 8,934,284'Methods and apparatuses using a transfer function to predict resistance shifts and/or noise of resistance-based memory'2015 8,910,026'Data decoding using side information'2014 8,838,881'Transfer command with specified sense threshold vector component'2014 8,760,986'Read channel throughput management'2014 8,760,932'Determination of memory read reference and programming voltages'2014 8,745,318'Parameter tracking for memory devices'2014 8,737,133'Shifting cell voltage based on grouping of solid-state, non-volatile memory cells'2014 8,711,619'Categorizing bit errors of solid-state, non-volatile memory'2014 8,693,257'Determining optimal read reference and programming voltages for non-volatile memory using mutual information'2014 8,627,175'Opportunistic decoding in memory systems'2014 8,572,457'Outer code protection for solid state memory devices'2013 8,547,743'Read error recovery for solid-state memory based on cumulative background charges'2013 8,406,051'Iterative demodulation and decoding for multi-page memory architecture'2013 8,307,267'Programmable soft-output Viterbi algorithm system and method'2012 8,254,167'Joint encoding of logical pages in multi-page memory architecture'2012 8,243,511'Reuse of information from memory read operations'2012 8,166,364'Low density parity check decoder using multiple variable node degree distribution codes'2012 8,156,409'Selectively applied hybrid min-sum approximation for constraint node updates of LDPC decoders'2012 8,130,553'Systems and methods for low wear operation of solid state memory'2012 8,122,327'Symbol-level soft output viterbi algorithm (SOVA) and a simplification on SOVA'2012 8,040,994'Phase coefficient generation for PLL'2011 7,752,531'Defect sensing Viterbi based detector'2010 7,559,008'Nested LDPC encoders and decoder'2009 7,477,473'Servo positioning adjustment'2009 7,466,782'Methods, apparatus and computer program products for determining the timing of bits based on frequency error'2008 7,453,663'Disk drives with servo burst patterns radially offset in different radial spokes of a disk and methods of positioning based thereon'2008 7,342,734'Disk drives with radially aligned servo burst patterns that generate orthogonal contributions to a read signal and related demodulators and methods'2008 7,308,057'Baseline wander compensation for perpendicular recording'2007 7,266,750'Error recovery strategies for iterative decoders'2007 7,253,984'Disk drive that generates a position error signal and a fly height signal from a servo burst pattern'2007 7,237,180'Symbol-level soft output Viterbi algorithm (SOVA) and a simplification on SOVA'2007 7,228,480'Rate-1 coding for increasing timing information in recording data'2007 7,199,956'Disk drive self-servo writing using fundamental and higher harmonics of a printed reference pattern'2007 7,173,783'Media noise optimized detector for magnetic recording'2007 6,957,379'Method and apparatus for selecting storage capacity of data storage media'2005 6,933,864'Encoding method using code constraint violation pointers'2005 6,882,604'Method and apparatus for utilizing modulation codes that produce maximized sample timing information'2005 6,810,485'Determining the timing of a data signal'2004 6,728,894'System and method for clock adjustment by subsequently detecting a target bit of data stream, re-adjusting, and correcting clock based on difference in detected bit'2004 6,691,278'Detecting errors in coded bit strings'2004 6,631,494'Ameliorating the adverse impact of burst errors on the operation of ISI detectors'2003 6,615,361'Obtaining a phase error of a clock signal'2003 6,587,291'Asynchronously sampling wide bi-phase codes'2003 6,452,990'Synchronous detection of wide bi-phase coded servo information for disk drive'2002 6,412,088'Method and apparatus for using block reread'2002 6,249,398'Class of fixed partial response targets in a PRML sampled data detection channel'2001 6,236,343'Loop latency compensated PLL filter'2001 6,236,340'Modulation encoders and decoders'2001 6,184,806'Rate 32/33 (D=0, K=6) run length limited modulation code having optimized error propagation'2001 5,920,438'Programmable digital centerline tracking threshold apparatus and method'1999 5,877,644'Programmable digital envelope following threshold generation apparatus and method'1999 5,862,005'Synchronous detection of wide bi-phase coded servo information for disk drive'1999 5,825,318'Data and servo sampling in synchronous data detection channel'1998 5,680,383'Data-transition threshold following in optical recording'1997 5,661,760'Wide biphase digital servo information detection, and estimation for disk drive using servo Viterbi detector'1997 5,629,914'Data-transition threshold following in optical recording'1997 5,530,601'Tracking threshold circuit for peak detection'1996 5,508,855'Tracking threshold circuit for peak detection'1996 5,502,711'Dual digital phase locked loop clock channel for optical recording'1996 5,420,727'Error controlled volume serial identification for varied track density systems'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–1999Patents assigned to IBM (8)· patent assignee history

1995–1996Based in Tucson, AZ, US· patent location history

1996–2002Based in Westboro, MA, US· patent location history

2001–2009Patents assigned to MAXTOR CORP (24)· patent assignee history

2001–2012Based in Westborough, MA, US· patent location history

2007–2021Based in Hopkinton, MA, US· patent location history

2010–2021Patents assigned to SEAGATE TECHNOLOGY LLC (81)· patent assignee history

2012–2016Patents assigned to PATAPOUTIAN ARA (23)· patent assignee history

2012–2015Patents assigned to SRIDHARAN ARVIND (9)· patent assignee history

2019–2021Based in Shrewsbury, MA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
SEAGATE TECHNOLOGY LLC	81	2010–2021
MAXTOR CORP	24	2001–2009
PATAPOUTIAN ARAself	23	2012–2016
SRIDHARAN ARVIND	9	2012–2015
IBM	8	1995–1999

Locations

Location	Patents	Span
Hopkinton, Massachusetts, US	86	2007–2021
Westborough, Massachusetts, US	19	2001–2012
Westboro, Massachusetts, US	10	1996–2002
Shrewsbury, Massachusetts, US	3	2019–2021
Tucson, AZ, US	3	1995–1996