Inventor
Cheng-I Huang
Inventor
Hsinchu, TW
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing31%
H10DInorganic electric semiconductor devices20%
H01LSemiconductor devices13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices7%
H03KPulse technique4%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
G01BMeasuring length, thickness or similar linear dimensions2%
G01NInvestigating or analysing materials by determining their chemical or physical properties2%
G01RMeasuring electric variables2%
PatentTitleYear
D0930114Nozzle, watering spray gun handle202110,854,593Semiconductor device and layout thereof202010,854,499Integrated circuit, system for and method of forming an integrated circuit202010,672,708Standard-cell layout structure with horn power and smart metal cut202010,163,882Semiconductor device and layout thereof201810,128,234Electromigration resistant semiconductor device20189,659,141'EDA tool and method for conflict detection during multi-patterning lithography'20179,563,731'Cell boundaries for self aligned multiple patterning abutments'20179,262,558'RC extraction for single patterning spacer technique'20169,223,922'Semiconductor device design method'20159,213,795'Multiple via connections using connectivity rings'20159,141,752'EDA tool and method for conflict detection during multi-patterning lithography'20158,990,762'Semiconductor device design method, system and computer program product'20158,949,758'Hybrid design rule for double patterning'20158,813,016'Multiple via connections using connectivity rings'20148,769,451'Semiconductor device design method, system and computer program product'20148,756,552'Multiple via connections using connectivity rings'20148,732,641'Pattern matching based parasitic extraction with pattern reuse'20148,728,915'Wafer laser-making method and die fabricated using the same'20148,726,212'Streamlined parasitic modeling with common device profile'20148,627,243'Methods for optimizing conductor patterns for ECP and CMP in semiconductor processing'20148,448,120'RC extraction for single patterning spacer technique'20137,253,662'Method for forming an electric device comprising power switches around a logic circuit and related apparatus'20077,165,232'I/O circuit placement method and semiconductor device'20076,978,411'Memory test system for peak power reduction'20056,895,540'Mux scan cell with delay circuit for reducing hold-time violations'20056,872,091'Coaxial electrical connector with a switching function'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2007Patents assigned to FARADAY TECH CORP (4)· patent assignee history
2005–2020Based in Hsinchu, TW· patent location history
2005Based in Tainan, TW· patent location history
2013–2015Patents assigned to TAIWAN SEMICONDUCTOR MFG (10)· patent assignee history
2013–2014Patents assigned to HUANG CHENG-I (3)· patent assignee history
2014Patents assigned to ADVANCED SEMICONDUCTOR ENG (1)· patent assignee history
2014Based in Kaohsiung, TW· patent location history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (9)· patent assignee history
2021Based in Helsinki, FI· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 10 | 2013–2015 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 9 | 2015–2020 |
| FARADAY TECH CORP | 4 | 2005–2007 |
| HUANG CHENG-Iself | 3 | 2013–2014 |
| ADVANCED SEMICONDUCTOR ENG | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 24 | 2005–2020 |
| Helsinki, FI | 1 | 2021 |
| Kaohsiung, TW | 1 | 2014 |
| Tainan, TW | 1 | 2005 |