Inventor

Hem Takiar

Inventor

Fremont, CA, US

Overview

1983–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 188 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1037%

H05KPrinted circuits10%

G06KGraphical data reading8%

H01LSemiconductor devices7%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%

Y10TTechnical subjects covered by former us classification6%

LOC145%

G11CStatic stores3%

Y02PClimate change mitigation technologies in the production or processing of goods2%

H01RElectrically-conductive connections2%

PatentTitleYear

11,031,371Semiconductor package and method of fabricating semiconductor package2021 10,930,607Manufacturing process for separating logic and memory array2021 10,854,573Semiconductor die singulation using a sacrificial bonding material layer and an anisotropic channel etch2020 10,818,575Datacenter 3D solid state drives with matrix cooling2020 10,811,386Semiconductor device2020 10,734,354Semiconductor device including optically connected wafer stack2020 10,607,955Heterogeneous fan-out structures for memory devices2020 10,522,489Manufacturing process for separating logic and memory array2019 10,490,529Angled die semiconductor device2019 10,485,125Integrated USB connector and memory device2019 10,381,327Non-volatile memory system with wide I/O memory die2019 10,325,881Vertical semiconductor device having a stacked die block2019 10,249,592Wire bonded wide I/O semiconductor device2019 10,242,965Semiconductor device including interconnected package on package2019 10,051,733Printed circuit board with coextensive electrical connectors and contact pad areas2018 9,899,347'Wire bonded wide I/O semiconductor device'2018 9,362,244'Wire tail connector for a semiconductor device'2016 9,337,153'EMI shielding and thermal dissipation for semiconductor device'2016 9,230,919'Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging'2016 9,218,953'Low profile wire bonded USB device'2015 9,209,159'Hidden plating traces'2015 9,006,912'Printed circuit board with coextensive electrical connectors and contact pad areas'2015 8,987,053'Semiconductor package including flip chip controller at bottom of die stack'2015 8,947,883'Low profile wire bonded USB device'2015 8,878,346'Molded SiP package with reinforced solder columns'2014 8,878,368'Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging'2014 8,852,999'System-in-a-package based flash memory card'2014 8,728,864'Method of fabricating a memory card using SIP/SMT hybrid technology'2014 8,659,133'Etched surface mount islands in a leadframe package'2014 8,653,653'High density three dimensional semiconductor die package'2014 8,637,963'Radiation-shielded semiconductor device'2014 8,637,978'System-in-a-package based flash memory card'2014 8,637,972'Two-sided substrate lead connection for minimizing kerf width on a semiconductor substrate panel'2014 8,575,739'Col-based semiconductor package including electrical connections through a single layer leadframe'2013 8,575,724'Semiconductor device having under-filled die in a die stack'2013 8,487,441'Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging'2013 8,482,139'Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards'2013 8,470,640'Method of fabricating stacked semiconductor package with localized cavities for wire bonding'2013 8,461,675'Substrate panel with plating bar structured to allow minimum kerf width'2013 8,432,043'Stacked wire bonded semiconductor package with low profile bond line'2013 8,395,246'Two-sided die in a four-sided leadframe based package'2013 8,373,268'Semiconductor package including flip chip controller at bottom of die stack'2013 8,354,749'Method for efficiently producing removable peripheral cards'2013 8,349,655'Method of fabricating a two-sided die in a four-sided leadframe based package'2013 8,318,535'Method of fabricating a memory card using SiP/SMT hybrid technology'2012 8,294,251'Stacked semiconductor package with localized cavities for wire bonding'2012 8,241,953'Method of fabricating stacked wire bonded semiconductor package with low profile bond line'2012 8,242,596'Method for efficiently producing removable peripheral cards'2012 8,232,145'Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards'2012 8,217,522'Printed circuit board with coextensive electrical connectors and contact pad areas'2012 8,212,360'Semiconductor die having a redistribution layer'2012 8,129,272'Hidden plating traces'2012 8,110,439'Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages'2012 8,097,495'Die package with asymmetric leadframe connection'2012 8,058,099'Method of fabricating a two-sided die in a four-sided leadframe based package'2011 8,053,276'Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages'2011 8,053,880'Stacked, interconnected semiconductor package'2011 8,022,519'System-in-a-package based flash memory card'2011 8,022,417'Method of assembling semiconductor devices with LEDS'2011 8,008,132'Etched surface mount islands in a leadframe package'2011 7,994,647'Method of reducing memory card edge roughness by edge coating'2011 7,967,184'Padless substrate for surface mounted components'2011 7,952,179'Semiconductor package having through holes for molding back side of package'2011 7,939,944'Semiconductor die having a redistribution layer'2011 7,939,382'Method of fabricating a semiconductor package having through holes for molding back side of package'2011 7,867,819'Semiconductor package including flip chip controller at bottom of die stack'2011 7,864,540'Peripheral card with sloped edges'2011 7,822,883'Memory card with two standard sets of contacts and a hinged contact covering mechanism'2010 7,816,181'Method of under-filling semiconductor die in a die stack and semiconductor device formed thereby'2010 7,812,356'Method of assembling semiconductor devices with LEDS'2010 7,811,859'Method of reducing memory card edge roughness by edge coating'2010 7,806,731'Rounded contact fingers on substrate/PCB for crack prevention'2010 7,795,715'Leadframe based flash memory cards'2010 7,791,191'Semiconductor device having multiple die redistribution layer'2010 7,772,047'Method of fabricating a semiconductor die having a redistribution layer'2010 7,772,686'Memory card fabricated using SiP/SMT hybrid technology'2010 7,772,107'Methods of forming a single layer substrate for high capacity memory cards'2010 7,763,980'Semiconductor die having a distribution layer'2010 7,745,234'Method for reclaiming semiconductor package'2010 7,746,661'Printed circuit board with coextensive electrical connectors and contact pad areas'2010 7,728,411'COL-TSOP with nonconductive material for reducing package capacitance'2010 7,663,216'High density three dimensional semiconductor die package'2010 7,615,861'Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards'2009 7,615,409'Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages'2009 7,611,927'Method of minimizing kerf width on a semiconductor substrate panel'2009 7,592,699'Hidden plating traces'2009 7,560,304'Method of making a semiconductor device having multiple die redistribution layer'2009 7,554,813'Memory card with two standard sets of contacts and a contact covering mechanism'2009 7,550,834'Stacked, interconnected semiconductor packages'2009 7,495,255'Test pads on flash memory cards'2009 7,488,620'Method of fabricating leadframe based flash memory cards including singulation by straight line cuts'2009 7,487,265'Memory card with two standard sets of contacts and a hinged contact covering mechanism'2009 7,485,501'Method of manufacturing flash memory cards'2009 7,435,624'Method of reducing mechanical stress on a semiconductor die during fabrication'2008 7,416,132'Memory card with and without enclosure'2008 7,384,817'Method of assembling semiconductor devices with LEDs'2008 7,375,415'Die package with asymmetric leadframe connection'2008 7,364,090'Memory cards having two standard sets of contacts'2008 7,355,283'Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging'2008 7,355,860'Memory card with two standard sets of contacts and a contact covering mechanism'2008 7,340,540'Memory card with contacts, device connector, and a connector covering mechanism'2008 7,336,498'Memory card with push-push connector'2008 7,310,692'Memory card with integral covered second device connector for use with computing devices without a memory card slot'2007 7,307,848'Memory card with raised portion'2007 7,306,160'Memory card with adapter'2007 7,306,161'Memory card with chamfer'2007 7,303,127'Packaged memory devices with various unique physical appearances'2007 7,259,028'Test pads on flash memory cards'2007 D0548740'SIP based flash memory card'2007 7,241,643'Wafer level chip scale package'2007 D0542797'Memory card with a contact covering lid'2007 7,193,161'SiP module with a single sided lid'2007 D0538286'Memory card'2007 D0537081'Memory card'2007 D0535297'Memory card with two sets of contacts'2007 7,152,801'Memory cards having two standard sets of contacts'2006 D0533556'IC memory card'2006 D0532788'Combined memory card and carrier assembly'2006 D0531181'Combined memory card and carrier assembly'2006 7,102,703'Liquid crystal display assembly for reducing optical defects'2006 7,094,633'Method for efficiently producing removable peripheral cards'2006 D0525978'Memory card'2006 D0525623'Memory card'2006 D0525248'Memory card'2006 D0523435'Memory card'2006 D0518059'Memory card with two sets of contacts'2006 D0517072'IC memory card'2006 D0515586'Memory card with two sets of contacts'2006 D0515587'Memory card with two sets of contacts'2006 6,984,881'Stackable integrated circuit package and method therefor'2006 D0510935'IC memory card'2005 D0510579'IC memory card'2005 D0507795'IC memory card'2005 D0505959'IC memory card'2005 6,900,532'Wafer level chip scale package'2005 6,900,110'Chip scale package with compliant leads'2005 6,556,269'Connection assembly for reflective liquid crystal display and method'2003 6,521,970'Chip scale package with compliant leads'2003 6,489,879'PTC fuse including external heat source'2002 6,459,143'Method of packaging fuses'2002 6,448,632'Metal coated markings on integrated circuit devices'2002 6,398,034'Universal tape for integrated circuits'2002 6,384,397'Low cost die sized module for imaging application having a lens housing assembly'2002 6,384,890'Connection assembly for reflective liquid crystal projection with branched PCB display'2002 6,364,089'Multi-station rotary die handling device'2002 6,362,530'Manufacturing methods and construction for integrated circuit packages'2002 6,352,881'Method and apparatus for forming an underfill adhesive layer'2002 6,284,566'Chip scale package and method for manufacture thereof'2001 6,255,141'Method of packaging fuses'2001 6,245,595'Techniques for wafer level molding of underfill encapsulant'2001 6,238,949'Method and apparatus for forming a plastic chip on chip package module'2001 6,177,288'Method of making integrated circuit packages'2001 6,173,490'Method for forming a panel of packaged integrated circuits'2001 6,140,708'Chip scale package and method for manufacture thereof'2000 6,122,033'Fusible seal for LCD devices and methods for making same'2000 6,054,338'Low cost ball grid array device and method of manufacture thereof'2000 6,024,275'Method of making flip chip and BGA interconnections'2000 5,969,783'Reflective liquid crystal display and connection assembly and method'1999 5,914,528'Thermally-enhanced lead frame with reduced thermal gap'1999 5,901,043'Device and method for reducing thermal cycling in a semiconductor package'1999 5,832,585'Method of separating micro-devices formed on a substrate'1998 5,783,866'Low cost ball grid array device and method of manufacture thereof'1998 5,718,038'Electronic assembly for connecting to an electronic system and method of manufacture thereof'1998 5,715,594'Method of making removable computer peripheral cards having a solid one-piece housing'1998 5,629,563'Component stacking in multi-chip semiconductor packages'1997 5,625,235'Multichip integrated circuit module with crossed bonding wires'1997 5,621,635'Integrated circuit packaged power supply'1997 5,617,297'Encapsulation filler technology for molding active electronics components such as IC cards or PCMCIA cards'1997 5,596,225'Leadframe for an integrated circuit package which electrically interconnects multiple integrated circuit die'1997 5,554,821'Removable computer peripheral cards having a solid one-piece housing'1996 5,543,640'Logical three dimensional interconnections between integrated circuit chips using a two dimensional multi-chip module'1996 5,530,622'Electronic assembly for connecting to an electronic system and method of manufacture thereof'1996 5,504,370'Electronic system circuit package directly supporting components on isolated subsegments'1996 5,502,289'Stacked multi-chip modules and method of manufacturing'1996 5,495,398'Stacked multi-chip modules and method of manufacturing'1996 5,437,095'Method of making plastic encapsulated integrated circuit package'1995 5,428,245'Lead frame including an inductor or other such magnetic component'1995 5,422,435'Stacked multi-chip modules and method of manufacturing'1995 5,339,216'Device and method for reducing thermal cycling in a semiconductor package'1994 5,325,268'Interconnector for a multi-chip module or package'1994 5,296,743'Plastic encapsulated integrated circuit package and method of manufacturing the same'1994 5,046,657'Tape automated bonding of bumped tape on bumped die'1991 4,810,620'Nickel plated tape'1989 4,723,197'Bonding pad interconnection structure'1988 4,707,418'Nickel plated copper tape'1987 4,684,975'Molded semiconductor package having improved heat dissipation'1987 4,595,480'System for electroplating molded semiconductor devices'1986 4,367,265'Intergranular insulation type semiconductive ceramic and method of producing same'1983

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1983Based in Glendale, CA, US· patent location history

1986–2007Patents assigned to NAT SEMICONDUCTOR CORP (55)· patent assignee history

1986–1989Based in San Jose, CA, US· patent location history

1991–2021Based in Fremont, CA, US· patent location history

2005–2011Patents assigned to SANDISK CORP (71)· patent assignee history

2006–2013Based in Sunnyvale, CA, US· patent location history

2011–2018Patents assigned to SANDISK TECHNOLOGIES INC (43)· patent assignee history

2011–2016Patents assigned to TAKIAR HEM (31)· patent assignee history

2012–2015Patents assigned to LIAO CHIH-CHIN (12)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
SANDISK CORP	71	2005–2011
NAT SEMICONDUCTOR CORP	55	1986–2007
SANDISK TECHNOLOGIES INC	43	2011–2018
TAKIAR HEMself	31	2011–2016
LIAO CHIH-CHIN	12	2012–2015

Locations

Location	Patents	Span
Fremont, California, US	175	1991–2021
Sunnyvale, California, US	7	2006–2013
San Jose, California, US	5	1986–1989
Glendale, California, US	1	1983