Inventor

Tongbi Jiang

Inventor
Boise, ID, US

Overview

303→
Patents
1999–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 303 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1040%
H05KPrinted circuits12%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
Y10TTechnical subjects covered by former us classification8%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
Y02PClimate change mitigation technologies in the production or processing of goods3%
G01RMeasuring electric variables3%
H10DInorganic electric semiconductor devices2%
H01RElectrically-conductive connections2%
H01LSemiconductor devices2%
PatentTitleYear
11,103,460Fabrication methods for nanodelivery systems for long term controlled delivery of active pharmaceutical ingredients202110,991,271Coal measures fault formation simulation experiment device and normal and reverse fault simulation experiment method202110,957,222Normal fault simulation experiment device with adjustable angle and fracture initiation position and method of using the same202110,811,400Wafer level optical module202010,593,653Packaged integrated circuit devices with through-body conductive vias, and methods of making same202010,454,241VCSEL structure with embedded heat sink201910,103,512VCSEL structure with embedded heat sink201810,083,931Packaged microelectronic devices having stacked interconnect elements and methods for manufacturing the same201810,041,847Various stress free sensor packages using wafer level supporting die and air gap technique20189,735,539'VCSEL structure with embedded heat sink'20179,661,411'Integrated MEMS microphone and vibration sensor'20179,656,856'Method of lower profile MEMS package with stress isolations'20179,624,093'Method and apparatus of making MEMS packages'20179,574,959'Various stress free sensor packages using wafer level supporting die and air gap technique'20179,503,622'Preventing artifacts due to underfill in flip chip imager assembly'20169,446,941'Method of lower profile MEMS package with stress isolations'20169,240,385'Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices'20169,099,571'Packaged integrated circuit devices with through-body conductive vias, and methods of making same'20158,981,578'Sensor array package'20158,922,002'Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices'20148,846,424'Multi-lens solid state lighting devices'20148,729,590'Solid state lighting devices having side reflectivity and associated methods of manufacture'20148,723,307'Packaged integrated circuit devices with through-body conductive vias, and methods of making same'20148,709,866'Methods of forming integrated circuit packages'20148,680,680'Semiconductor devices including porous insulators'20148,552,438'Multi-lens solid state lighting devices'20138,531,031'Integrated circuit packages'20138,461,685'Substrate comprising a plurality of integrated circuitry die, and a substrate'20138,436,386'Solid state lighting devices having side reflectivity and associated methods of manufacture'20138,178,984'Flip chip with interposer'20128,138,613'Microelectronic devices'20128,092,734'Covers for microelectronic imagers and methods for wafer-level packaging of microelectronics imagers'20128,072,055'High density stacked die assemblies, structures incorporated therein and methods of fabricating the assemblies'20118,022,536'Semiconductor substrate for build-up packages'20117,998,860'Method for fabricating semiconductor components using maskless back side alignment to conductive vias'20117,977,157'Methods of forming integrated circuit packages, and methods of assembling integrated circuit packages'20117,910,385'Method of fabricating microelectronic devices'20117,888,188'Method of fabicating a microelectronic die having a curved surface'20117,851,266'Microelectronic device wafers including an in-situ molded adhesive, molds for in-situ molding adhesives on microelectronic device wafers, and methods of molding adhesives on microelectronic device wafers'20107,781,877'Packaged integrated circuit devices with through-body conductive vias, and methods of making same'20107,749,882'Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices'20107,727,785'Wafer back side coating to balance stress from passivation layer on front of wafer and be used as die attach adhesive'20107,700,406'Methods of assembling integrated circuit packages'20107,696,011'Methods for applying front side and edge protection material to electronic devices at the wafer level, devices made by the methods, and systems including the devices'20107,659,151'Flip chip with interposer, and methods of making same'20107,655,500'Packaged microelectronic devices and methods for packaging microelectronic devices'20107,635,611'Semiconductor substrate for build-up packages'20097,633,157'Microelectronic devices having a curved surface and methods for manufacturing the same'20097,615,871'Method and apparatus for attaching microelectronic substrates and support members'20097,592,691'High density stacked die assemblies, structures incorporated therein and methods of fabricating the assemblies'20097,589,426'Semiconductor assemblies including redistribution layers and packages and assemblies formed therefrom'20097,578,056'Method of coating contacts on a surface of a flip chip'20097,573,136'Semiconductor device assemblies and packages including multiple semiconductor device components'20097,557,337'Micro-lens configuration for small lens focusing in digital imaging devices'20097,554,200'Semiconductor devices including porous insulators'20097,550,847'Packaged microelectronic devices and methods for packaging microelectronic devices'20097,547,579'Underfill process'20097,537,966'Method for fabricating board on chip (BOC) semiconductor package with circuit side polymer layer'20097,485,971'Electronic device package'20097,479,413'Method for fabricating semiconductor package with circuit side polymer layer'20097,476,277'Apparatus for improving stencil/screen print quality'20097,442,578'Underfill compounds including electrically charged filler elements, microelectronic devices having underfill compounds including electrically charged filler elements, and methods of underfilling micoelectronic devices'20087,417,305'Electronic devices at the wafer level having front side and edge protection material and systems including the devices'20087,411,297'Microfeature devices and methods for manufacturing microfeature devices'20087,405,385'Micro-lens configuration for small lens focusing in digital imaging devices'20087,358,185'Device having contact pad with a conductive layer and a conductive passivation layer'20087,344,061'Multi-functional solder and articles made therewith, such as microelectronic components'20087,329,949'Packaged microelectronic devices and methods for packaging microelectronic devices'20087,312,101'Packaged microelectronic devices and methods for packaging microelectronic devices'20077,298,031'Multiple substrate microelectronic devices and methods of manufacture'20077,297,412'Fabrication of stacked microelectronic devices'20077,285,502'Methods for forming porous insulator structures on semiconductor devices'20077,268,059'Methods for securing components of semiconductor device assemblies to each other with adhesive materials that include pressure-sensitive and curable components'20077,268,012'Methods for fabrication of thin semiconductor assemblies including redistribution layers and packages and assemblies formed thereby'20077,262,487'Semiconductor devices and other electronic components including porous insulators created from “void” creating materials'20077,253,089'Microfeature devices and methods for manufacturing microfeature devices'20077,253,025'Multiple substrate microelectronic devices and methods of manufacture'20077,213,331'Method for forming stencil'20077,201,304'Multi-functional solder and articles made therewith, such as microelectronic components'20077,199,464'Semiconductor device structures including protective layers formed from healable materials'20077,199,463'Method and structure for manufacturing improved yield semiconductor packaged devices'20077,199,037'Microfeature devices and methods for manufacturing microfeature devices'20077,198,980'Methods for assembling multiple semiconductor devices'20077,189,602'Method and apparatus for reducing substrate bias voltage drop'20077,182,241'Multi-functional solder and articles made therewith, such as microelectronic components'20077,170,184'Treatment of a ground semiconductor die to improve adhesive bonding to a substrate'20077,169,685'Wafer back side coating to balance stress from passivation layer on front of wafer and be used as die attach adhesive'20077,153,754'Methods for forming porous insulators from “void” creating materials and structures and semiconductor devices including same'20067,153,788'Method and apparatus for attaching a workpiece to a workpiece support'20067,150,390'Flip chip dip coating encapsulant'20067,135,780'Semiconductor substrate for build-up packages'20067,122,908'Electronic device package'20067,115,853'Micro-lens configuration for small lens focusing in digital imaging devices'20067,109,588'Method and apparatus for attaching microelectronic substrates and support members'20067,109,063'Semiconductor substrate for build-up packages'20067,105,366'Method for in-line testing of flip-chip semiconductor assemblies'20067,094,628'Underfill compounds including electrically charged filler elements, microelectronic devices having underfill compounds including electrically charged filler elements, and methods of underfilling microelectronic devices'20067,095,095'Semiconductor constructions'20067,091,064'Method and apparatus for attaching microelectronic substrates and support members'20067,091,065'Method of making a center bond flip chip semiconductor carrier'20067,087,116'Apparatus for modifying the configuration of an exposed surface of a viscous fluid'20067,084,515'Electronic device package'20067,078,267'Methods of fabricating integrated circuitry'20067,074,648'Method for packaging flip-chip semiconductor assemblies'20067,071,030'Method of making a flexible substrate with a filler material'20067,071,078'Methods for securing components of semiconductor device assemblies to each other with hybrid adhesive materials'20067,061,119'Tape attachment chip-on-board assemblies'20067,037,751'Fabrication of stacked microelectronic devices'20067,037,808'Method of forming semiconductor constructions'20067,037,756'Stacked microelectronic devices and methods of fabricating same'20067,022,418'Fabrication of stacked microelectronic devices'20067,019,410'Die attach material for TBGA or flexible circuitry'20067,012,811'Method of tuning a multi-path circuit'20067,005,731'Plastic lead frames for semiconductor devices and packages including same'20067,005,878'Method for in-line testing of flip-chip semiconductor assemblies'20067,001,795'Total internal reflection (TIR) CMOS imager'20066,995,041'Semiconductor package with circuit side polymer layer and wafer level fabrication method'20066,995,442'Total internal reflection (TIR) CMOS imager'20066,982,177'Method for in-line testing of flip-chip semiconductor assemblies'20066,979,889'Plastic lead frames for semiconductor devices'20056,979,598'Method of attaching a leadframe to singulated semiconductor dice'20056,972,200'Method for manufacturing flip-chip semiconductor assembly'20056,969,914'Electronic device package'20056,967,113'Method for in-line testing of flip-chip semiconductor assemblies'20056,967,164'Method for electroless plating a contact pad'20056,962,826'Method for in-line testing of flip-chip semiconductor assemblies'20056,953,700'Method for in-line testing of flip-chip semiconductor assemblies'20056,953,699'Method for in-line testing of flip-chip semiconductor assemblies'20056,954,081'Method for in-line testing of flip-chip semiconductor assemblies'20056,949,834'Stacked semiconductor package with circuit side polymer layer'20056,949,943'Method for in-line testing of flip-chip semiconductor assemblies'20056,936,775'Selectively configurable circuit board'20056,933,221'Method for underfilling semiconductor components using no flow underfill'20056,926,190'Integrated circuit assemblies and assembly methods'20056,906,417'Ball grid array utilizing solder balls having a core material covered by a metal layer'20056,906,415'Semiconductor device assemblies and packages including multiple semiconductor devices and methods'20056,902,956'Method and structure for manufacturing improved yield semiconductor packaged devices'20056,900,080'Microelectronic package with reduced underfill and methods for forming such packages'20056,896,760'Fabrication of stacked microelectronic devices'20056,894,380'Packaged stacked semiconductor die and method of preparing same'20056,893,952'Methods of forming a ball grid array including a non-conductive polymer core and a silver or silver alloy outer layer'20056,889,430'Method of selectively adjusting surface tension of soldermask material'20056,891,108'Semiconductor packages and methods for making the same'20056,890,384'Apparatus and method for modifying the configuration of an exposed surface of a viscous fluid'20056,885,108'Protective layers formed on semiconductor device components so as to reduce or eliminate the occurrence of delamination thereof and cracking therein'20056,881,606'Method for forming a protective layer for use in packaging a semiconductor die'20056,872,600'Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication'20056,864,153'Methods employing hybrid adhesive materials to secure components of semiconductor device assemblies and packages to one another'20056,858,927'Semiconductor packages and methods for making the same'20056,844,618'Microelectronic package with reduced underfill and methods for forming such packages'20056,844,052'Method for underfilling semiconductor components'20056,841,422'Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication'20056,833,510'Semiconductor packages and methods for making the same'20046,825,569'BGA package having substrate with patterned solder mask defining open die attach area'20046,825,570'Resistance-reducing conductive adhesives for attachment of electronic components'20046,820,502'High resolution pressure-sensing device having an insulating flexible matrix loaded with filler particles'20046,818,460'Method for applying adhesives to a lead frame'20046,812,064'Ozone treatment of a ground semiconductor die to improve adhesive bonding to a substrate'20046,803,657'Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components'20046,791,168'Semiconductor package with circuit side polymer layer and wafer level fabrication method'20046,788,552'Method and apparatus for reducing substrate bias voltage drop'20046,787,399'Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication'20046,784,024'Die attach curing method for semiconductor device'20046,779,258'Semiconductor packages and methods for making the same'20046,777,268'Method of fabricating tape attachment chip-on-board assemblies'20046,774,480'Method and structure for manufacturing improved yield semiconductor packaged devices'20046,770,164'Method for attaching a semiconductor die to a substrate'20046,770,981'Composite interposer for BGA packages'20046,768,209'UNDERFILL COMPOUNDS INCLUDING ELECTRICALLY CHARGED FILLER ELEMENTS, MICROELECTRONIC DEVICES HAVING UNDERFILL COMPOUNDS INCLUDING ELECTRICALLY CHARGED FILLER ELEMENTS, AND METHODS OF UNDERFILLING MICROELECTRONIC DEVICES'20046,765,652'Forming thermally curable materials on a support structure in an electronic device'20046,762,485'Plastic lead frames for semiconductor devices'20046,757,176'Circuit board'20046,750,070'Process for manufacturing flip-chip semiconductor assembly'20046,740,821'Selectively configurable circuit board'20046,737,299'Thermally conductive adhesive tape for semiconductor devices and method for using the same'20046,724,073'Plastic lead frames for semiconductor devices and packages including same'20046,717,259'METHODS EMPLOYING HYBRID ADHESIVE MATERIALS TO SECURE COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES TO ONE ANOTHER AND ASSEMBLIES AND PACKAGES INCLUDING COMPONENTS SECURED TO ONE ANOTHER WITH SUCH HYBRID ADHESIVE MATERIALS'20046,710,462'Method of pressure curing for reducing voids in a die attach bondline and applications thereof'20046,709,896'Methods for use in packaging applications using an adhesive composition'20046,710,456'Composite interposer for BGA packages'20046,706,559'Method of attaching a leadframe to singulated semiconductor dice'20046,707,147'Substrates and assemblies including pre-applied adhesion promoter'20046,700,183'Low temperature die attaching material for BOC packages and products comprising such material'20046,699,928'Adhesive composition for use in packaging applications'20046,691,406'Methods of die attachment for BOC and F/C surface mount'20046,689,635'Apparatus and method for face-to-face connection of a die to a substrate with polymer electrodes'20046,685,083'Ultrasonic vibration mode for wire bonding'20046,684,717'High resolution pressure-sensing device having an insulating flexible matrix loaded with filler particles'20046,669,781'Method and apparatus for improving stencil/screen print quality'20036,664,175'Method of forming ruthenium interconnect for an integrated circuit'20036,662,440'Z-axis electrical contact for microelectric devices'20036,661,104'Microelectronic assembly with pre-disposed fill material and associated method of manufacture'20036,647,620'Method of making center bond flip chip semiconductor carrier'20036,646,354'Adhesive composition and methods for use in packaging applications'20036,641,669'Method and apparatus for improving stencil/screen print quality'20036,630,400'Method for electroless plating a contact pad'20036,616,864'Z-axis electrical contact for microelectronic devices'20036,610,591'Methods of ball grid array'20036,607,599'Apparatus for improving stencil/screen print quality'20036,601,294'Method for making a packaged semiconductor device'20036,602,730'Method for gravitation-assisted control of spread of viscous material applied to a substrate'20036,599,365'Apparatus for improving stencil/screen print quality'20036,589,812'Pre-applied adhesion promoter'20036,586,277'Method and structure for manufacturing improved yield semiconductor packaged devices'20036,582,994'Passivation layer for packaged integrated circuits'20036,579,744'Electrical interconnections, methods of conducting electricity, and methods of reducing horizontal conductivity within an anisotropic conductive adhesive'20036,576,495'Microelectronic assembly with pre-disposed fill material and associated method of manufacture'20036,566,253'Method of making electrical interconnection for attachment to a substrate'20036,561,044'High resolution pressure-sensing device having an insulating flexible matrix loaded with filler particles'20036,562,277'Method and apparatus for attaching a workpiece to a workpiece support'20036,551,863'Flip chip dip coating encapsulant'20036,548,376'Methods of thinning microelectronic workpieces'20036,548,764'Semiconductor packages and methods for making the same'20036,544,820'Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication'20036,544,864'METHODS EMPLOYING HYBRID ADHESIVE MATERIALS TO SECURE COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES TO ONE ANOTHER AND ASSEMBLIES AND PACKAGES INCLUDING COMPONENTS SECURED TO ONE ANOTHER WITH SUCH HYBRID ADHESIVE MATERIALS'20036,545,498'Method for in-line testing of flip-chip semiconductor assemblies'20036,541,872'Multi-layered adhesive for attaching a semiconductor die to a substrate'20036,539,815'High resolution pressure-sensing device having an insulating flexible matrix loaded with filler particles'20036,538,898'Method and apparatus of die attachment for BOC and F/C surface mount'20036,539,286'Fluid level sensor'20036,531,340'Low temperature die attaching material for BOC packages'20036,524,891'Method of pressure curing for reducing voids in a die attach bondline and applications thereof'20036,520,030'High resolution pressure sensing device having an insulating flexible matrix loaded with filler particles'20036,521,287'Method for manufacturing improved stencil/screen'20036,518,094'Center bond flip-chip semiconductor device and method of making it'20036,514,795'Packaged stacked semiconductor die and method of preparing same'20036,515,355'Passivation layer for packaged integrated circuits'20036,508,890'Method of enhancing the conductivity of a conductive surface'20036,506,628'Method of attaching a leadframe to singulated semiconductor dice'20036,501,170'Substrates and assemblies including pre-applied adhesion promoter'20026,492,713'Gravitationally assisted control of spread of viscous material applied to semiconductor assembly components'20026,489,681'Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components'20026,485,778'Method of applying an adhesive material to lead fingers of a lead frame'20026,472,901'Method for in-line testing of flip-chip semiconductor assemblies'20026,465,314'Semiconductor processing methods'20026,458,624'Resistance-reducing conductive adhesives for attachment of electronic components'20026,455,923'Apparatus and methods for providing substrate structures having metallic layers for microelectronics devices'20026,455,354'Method of fabricating tape attachment chip-on-board assemblies'20026,451,116'Apparatus for electroless plating a contact pad'20026,452,271'Interconnect component for a semiconductor die including a ruthenium layer and a method for its fabrication'20026,440,777'Method of depositing a thermoplastic polymer in semiconductor fabrication'20026,426,552'METHODS EMPLOYING HYBRID ADHESIVE MATERIALS TO SECURE COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES TO ONE ANOTHER AND ASSEMBLIES AND PACKAGES INCLUDING COMPONENTS SECURED TO ONE ANOTHER WITH SUCH HYBRID ADHESIVE MATERIALS'20026,423,579'Apparatus and methods for providing substrate structures having metallic layers for microelectronics devices'20026,413,102'Center bond flip chip semiconductor carrier and a method of making and using it'20026,414,869'Quad in-line memory module'20026,406,944'Method of fabricating a reinforcement of lead bonding in microelectronic packages'20026,388,199'Selectively adjusting surface tension of soldermask material'20026,380,626'Semiconductor device for attachment to a semiconductor substrate'20026,380,632'Center bond flip-chip semiconductor device and method of making it'20026,369,602'Method for in-line testing of flip-chip semiconductor assemblies'20026,368,897'Method for manufactoring and using stencil/screen'20026,367,685'Ultrasonic vibration mode for wire bonding'20026,365,842'Electrical circuits, circuits, and electrical couplings'20026,363,796'High resolution pressure-sensing device having an insulating flexible matrix loaded with filler particles'20026,359,334'Thermally conductive adhesive tape for semiconductor devices and method using the same'20026,355,504'Electrical interconnections, methods of conducting electricity, and methods of reducing horizontal conductivity within an anisotropic conductive adhesive'20026,353,268'Semiconductor die attachment method and apparatus'20026,346,152'Method and apparatus for applying adhesives to a lead frame'20026,346,750'Resistance-reducing conductive adhesives for attachment of electronic components'20026,346,151'Method and apparatus for electroless plating a contact pad'20026,343,019'Apparatus and method of stacking die on a substrate'20026,339,259'Adhesive composition for use in packaging applications'20026,336,973'Apparatus and method for modifying the configuration of an exposed surface of a viscous fluid'20026,329,832'Method for in-line testing of flip-chip semiconductor assemblies'20016,323,543'Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication'20016,316,285'Passivation layer for packaged integrated circuits'20016,316,824'Plastic leads frames for semiconductor devices'20016,312,977'Method of attaching a leadframe to singulated semiconductor dice'20016,303,500'Method and apparatus for electroless plating a contact pad'20016,294,410'Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication'20016,288,885'Method and apparatus for electrostatic discharge protection for printed circuit boards'20016,264,486'Zero insertion force sockets using negative thermal expansion materials'20016,245,594'Methods for forming conductive micro-bumps and recessed contacts for flip-chip technology and method of flip-chip assembly'20016,244,498'Ultrasonic vibration mode for wire bonding'20016,239,489'Reinforcement of lead bonding in microelectronics packages'20016,238,223'Method of depositing a thermoplastic polymer in semiconductor fabrication'20016,207,559'Method of making a semiconductor device for attachment to a semiconductor substrate'20016,208,519'Thermally enhanced semiconductor package'20016,200,833'Method of attaching a leadframe to singulated semiconductor dice'20016,184,064'Semiconductor die back side surface and method of fabrication'20016,165,856'Using an organic layer as an ion implantation mask when forming shallow source/drain region'20006,164,993'Zero insertion force sockets using negative thermal expansion materials'20006,137,063'Electrical interconnections'20006,124,151'Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication'20006,118,080'Z-axis electrical contact for microelectronic devices'20006,113,709'Method of preparing a conductive bonding pad'20006,110,805'Method and apparatus for attaching a workpiece to a workpiece support'20006,108,228'Quad in-line memory module'20006,091,136'Plastic lead frames for semiconductor devices'20006,083,768'Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components'20006,084,311'Method and apparatus for reducing resin bleed during the formation of a semiconductor device'20006,073,497'High resolution pressure sensing device having an insulating flexible matrix loaded with filler particles'20006,064,120'Apparatus and method for face-to-face connection of a die face to a substrate with polymer electrodes'20006,051,879'Electrical interconnection for attachment to a substrate'20006,048,656'Void-free underfill of surface mounted chips'20006,048,755'Method for fabricating BGA package using substrate with patterned solder mask open in die attach area'20006,023,666'In-line method of monitoring die attach material adhesive weight'20006,017,776'Method of attaching a leadframe to singulated semiconductor dice'20006,013,535'Method for applying adhesives to a lead frame'20006,011,307'Anisotropic conductive interconnect material for electronic devices, method of use and resulting product'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2020Patents assigned to MICRON TECHNOLOGY INC (280)· patent assignee history
1999–2018Based in Boise, ID, US· patent location history
2009–2012Patents assigned to APTINA IMAGING CORP (2)· patent assignee history
2011–2014Patents assigned to JIANG TONGBI (11)· patent assignee history
2011–2012Patents assigned to CORISIS DAVID J (2)· patent assignee history
2015–2020Patents assigned to APPLE INC (12)· patent assignee history
2016–2020Based in Santa Clara, CA, US· patent location history
2017Based in Cupertino, CA, US· patent location history
2021Based in Qingdao, CN· patent location history
2021Based in Austin, TX, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MICRON TECHNOLOGY INC2801999–2020
APPLE INC122015–2020
JIANG TONGBIself112011–2014
APTINA IMAGING CORP22009–2012
CORISIS DAVID J22011–2012
Locations
LocationPatentsSpan
Boise, ID, US2881999–2018
Santa Clara, California, US112016–2020
Qingdao, CN22021
Austin, Texas, US12021
Cupertino, California, US12017