Inventor

Dun-Nian Yaung

Inventor
Taipei, TW

Overview

423→
Patents
1999–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 423 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Fprimary
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation32%
H01LSemiconductor devices27%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1019%
H10DInorganic electric semiconductor devices7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
H04NPictorial communication, e.g. television3%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution1%
H10BElectronic memory devices1%
Y02PClimate change mitigation technologies in the production or processing of goods1%
G02BOptical elements, systems or apparatus1%
PatentTitleYear
11,121,159Pixel structure of image sensor having dielectric layer surrounding photo conversion layer and color filter202111,114,486Implant isolated devices and method for forming the same202111,107,767Structure for standard logic performance improvement having a back-side through-substrate-via202111,088,192Metal block and bond pad structure202111,088,196Metal reflector grounding for noise reduction in light detector202111,069,736Via support structure under pad areas for BSI bondability improvement202111,069,731Apparatus for reducing optical cross-talk in image sensors202111,063,038Through silicon via design for stacking integrated circuits202111,063,080Implant damage free image sensor and method of the same202111,063,081Device over photodetector pixel sensor202111,062,977Shield structure for backside through substrate vias (TSVs)202111,043,522Stacked substrate structure with inter-tier interconnection202111,037,885Semiconductor packaging device comprising a shield structure202111,037,909Stacked semiconductor structure and method202111,024,602Hybrid bond pad structure202111,011,567Structure and method for 3D image sensor202111,004,880Semiconductor imaging device having improved dark current performance202110,991,752Vertically integrated image sensor chips and methods for forming the same202110,978,345Interconnect structure for stacked device202110,964,692Through silicon via design for stacking integrated circuits202110,930,699Method and apparatus for image sensor packaging202110,916,502Semiconductor device and manufacturing method thereof202110,910,420Semiconductor switching device separate by device isolation202110,886,320Mechanisms for forming image-sensor device with epitaxial isolation feature202110,879,297Image sensor device and method of forming same202010,867,891Ion through-substrate via202010,868,071Method for forming semiconductor image sensor202010,861,899Interconnect structure for stacked device and method202010,861,894Multiple deep trench isolation (MDTI) structure for CMOS image sensor202010,833,119Pad structure for front side illuminated image sensor202010,825,853Semiconductor image sensor device with deep trench isolations and method for manufacturing the same202010,811,398Semiconductor structure and method for manufacturing the same202010,804,155Inductor structure for integrated circuit202010,797,091Semiconductor imaging device having improved dark current performance202010,790,265Semiconductor device structure with back-side layer to reduce leakage202010,790,194Inductor structure for integrated circuit202010,790,327Semiconductor device structure with a conductive feature passing through a passivation layer202010,777,590Method for forming image sensor device structure with doping layer in light-sensing region202010,763,292Interconnect apparatus and method for a stacked semiconductor device202010,734,428Image sensor device202010,734,423Semiconductor switching device separated by device isolation202010,727,265Multiple deep trench isolation (MDTI) structure for CMOS image sensor202010,727,205Hybrid bonding technology for stacking integrated circuits202010,727,164Semiconductor structure and manufacturing method for the same202010,692,914Implant damage free image sensor and method of the same202010,682,523Interconnect structure and method of forming same202010,680,027Stacked semiconductor dies with a conductive feature passing through a passivation layer202010,672,819Mechanisms for forming image-sensor device with deep-trench isolation structure202010,629,592Through silicon via design for stacking integrated circuits202010,629,568Stacked integrated circuits with redistribution lines202010,622,394Image sensing device202010,566,378Back side illuminated image sensor with reduced sidewall-induced leakage202010,566,288Structure for standard logic performance improvement having a back-side through-substrate-via202010,566,374Via support structure under pad areas for BSI bondability improvement202010,535,696Pad structure exposed in an opening through multiple dielectric layers in BSI image sensor chips202010,535,697Structure and method for 3D Image sensor202010,535,706Interconnect structure for stacked device and method202010,522,586Apparatus for reducing optical cross-talk in image sensors201910,522,525Semiconductor device structure201910,515,994Semiconductor devices, methods of manufacturing thereof, and image sensor devices201910,515,995Bond pad structure for bonding improvement201910,510,7293DIC interconnect apparatus and method201910,510,793Uniform-size bonding patterns201910,510,791Elevated photodiode with a stacked scheme201910,510,789Extra doped region for back-side deep trench isolation201910,510,542Gate electrodes with notches and methods for forming the same201910,510,592Integrated circuit (IC) structure for high performance and functional density201910,510,912Image sensor device and method201910,510,730Stacked semiconductor structure and method201910,510,790High-k dielectric liners in shallow trench isolations201910,510,7923DIC seal ring structure and methods of forming same201910,504,784Inductor structure for integrated circuit201910,490,580Image sensor pickup region layout201910,475,828Image sensor device structure with doping layer in light-sensing region201910,475,758Semiconductor device structure and method for forming the same201910,475,843Method and apparatus for image sensor packaging201910,468,443Pixel structure of image sensor and method of forming same201910,468,441Semiconductor switching device separated by device isolation201910,468,448Semiconductor image sensor and method for forming the same201910,461,109Multiple deep trench isolation (MDTI) structure for CMOS image sensor201910,388,642Hybrid bonding with uniform pattern density201910,361,233High-k dielectric liners in shallow trench isolations201910,304,818Method of manufacturing semiconductor devices having conductive plugs with varying widths201910,304,886Back-side deep trench isolation (BDTI) structure for pinned photodiode image sensor201910,297,631Metal block and bond pad structure201910,297,632Method for an image sensor device201910,290,671Image sensor device and method of forming same201910,283,549Via support structure under pad areas for BSI bondability improvement201910,276,622Mechanisms for forming image-sensor device with expitaxial isolation feature201910,276,618Extra doped region for back-side deep trench isolation201910,276,619Semiconductor device structure with a conductive feature passing through a passivation layer201910,269,848Image sensor having enhanced backside illumination quantum efficiency201910,269,768Stacked integrated circuits with redistribution lines201910,269,863Methods and apparatus for via last through-vias201910,269,770Hybrid bond pad structure201910,192,918Image sensor including dual isolation and method of making the same201910,177,186Pixel structure of image sensor and method of forming same201910,177,187Implant damage free image sensor and method of the same201910,170,512Uniform-size bonding patterns201910,163,956Interconnect apparatus and method201810,164,133Image sensor device and method201810,163,951Image sensor device201810,163,878Semiconductor structure and method for manufacturing the same201810,163,758Semiconductor structure and manufacturing method for the same201810,157,889Stacked semiconductor structure and method201810,157,959Interconnect structure for stacked device and method201810,157,8913DIC interconnect apparatus and method201810,157,958Vertically integrated image sensor chips and methods for forming the same201810,153,316Mechanisms for forming image sensor device with deep-trench isolation structure201810,147,752Back-side illuminated (BSI) image sensor with global shutter scheme201810,147,682Structure for stacked logic performance improvement201810,141,358Semiconductor switching device separated by device isolation201810,128,304Isolation for semiconductor devices201810,121,812Stacked substrate structure with inter-tier interconnection201810,121,821Biased backside illuminated sensor shield structure201810,103,287Semiconductor arrangement and formation thereof201810,092,768Interconnect structure and method of forming same201810,096,515Interconnect structure for stacked device201810,096,645Method and apparatus for image sensor packaging201810,090,353Semiconductor devices, methods of manufacturing thereof, and image sensor devices201810,090,349CMOS image sensor chips with stacked scheme and methods for forming the same201810,074,612Method for forming alignment marks and structure of same201810,062,721Elevated photodiode with a stacked scheme201810,062,728Image sensor device and method201810,062,720Deep trench isolation fabrication for BSI image sensor201810,056,3533DIC interconnect apparatus and method201810,049,981Through via structure, semiconductor device and manufacturing method thereof201810,038,025Via support structure under pad areas for BSI bondability improvement201810,038,026Bond pad structure for bonding improvement201810,014,340Stacked SPAD image sensor201810,008,532Implant isolated devices and method for forming the same20189,978,805Method for manufacturing image sensor structure having wide contact20189,966,405Method and apparatus for image sensor packaging20189,966,412Method for reducing optical cross-talk in image sensors20189,960,142Hybrid bonding with air-gap structure20189,954,022Extra doped region for back-side deep trench isolation20189,941,249Multi-wafer stacking by Ox-Ox bonding20189,935,147Deep trench isolation structure in image sensor device20189,923,011'Semiconductor device structure with stacked semiconductor dies'20189,917,123'Method and apparatus for image sensor packaging'20189,905,605'Phase detection autofocus techniques'20189,905,426'Gate electrodes with notches and methods for forming the same'20189,893,111'Full-PDAF (phase detection autofocus) CMOS image sensor structures'20189,887,182'3DIC structure and method for hybrid bonding semiconductor wafers'20189,887,234'CMOS image sensor and method for forming the same'20189,881,884'Semiconductor device structure and method for forming the same'20189,875,989Semiconductor device structure20189,865,630'Image sensor pickup region layout'20189,865,645'Interconnect structure for stacked device and method'20189,859,322'Methods and apparatus for glass removal in CMOS image sensors'20189,853,082Color filter array and micro-lens structure for imaging system20179,847,368Vertically integrated image sensor chips and methods for forming the same20179,847,364Image sensor devices and design and manufacturing methods thereof20179,837,464Backside structure and methods for BSI image sensors20179,818,735'Method of manufacturing a semiconductor device'20179,812,409'Seal ring structure with a metal pad'20179,812,487'Structure and method for 3D image sensor'20179,812,482'Frontside illuminated (FSI) image sensor with a reflector'20179,812,483'Back-side illuminated (BSI) image sensor with global shutter scheme'20179,806,119'3DIC seal ring structure and methods of forming same'20179,786,592'Integrated circuit structure and method of forming the same'20179,780,137'Mechanisms for forming image-sensor device with epitaxial isolation feature'20179,773,828'Image sensor device and method of forming same'20179,768,224'Image sensor including multiple lenses and method of manufacture thereof'20179,764,153'Interconnect structure and method of forming same'20179,761,629'Image sensor device and method'20179,754,925'3DIC interconnect apparatus and method'20179,748,304'Image sensor devices, methods of manufacture thereof, and semiconductor device manufacturing methods'20179,741,665'Alignment marks in non-STI isolation formation and methods of forming the same'20179,728,570'Deep trench isolation fabrication for BSI image sensor'20179,728,521'Hybrid bond using a copper alloy for yield improvement'20179,722,109'Image sensor device and method'20179,716,078'Stacked semicondcutor structure and method'20179,711,562'Apparatus and method for reducing optical cross-talk in image sensors'20179,704,827'Hybrid bond pad structure'20179,704,910'Semiconductor switching device separated by device isolation'20179,699,897'Pad structure'20179,673,245'Implant isolated devices and method for forming the same'20179,673,246'Dual metal for a backside package of backside illuminated image sensor'20179,666,566'3DIC structure and method for hybrid bonding semiconductor wafers'20179,666,624'Mechanisms for forming image-sensor device with deep-trench isolation structure'20179,666,630'Semiconductor devices, methods of manufacturing thereof, and image sensor devices'20179,653,508'Pad structure exposed in an opening through multiple dielectric layers in BSI image sensor chips'20179,640,582'Method of manufacturing image sensor having enhanced backside illumination quantum efficiency'20179,627,326'Method for forming alignment marks and structure of same'20179,627,430'Method and apparatus for low resistance image sensor contact'20179,620,548'Image sensor with wide contact'20179,614,000'Biased backside illuminated sensor shield structure'20179,613,996'Backside structure and methods for BSI image sensors'20179,576,999'Backside structure and methods for BSI image sensors'20179,570,503'Ridge structure for back side illuminated image sensor'20179,570,497'Back side illuminated image sensor having isolated bonding pads'20179,559,244'CMOS image sensors and methods for forming the same'20179,553,020'Interconnect structure for connecting dies and methods of forming the same'20179,543,257'3DIC interconnect devices and methods of forming same'20179,536,810'Flat pad structure for integrating complementary metal-oxide-semiconductor (CMOS) image sensor processes'20179,536,777'Interconnect apparatus and method'20179,530,811'Elevated photodiode with a stacked scheme'20169,525,003'Structure and method for 3D image sensor'20169,520,433'Method of fabricating deep trench isolation structure in image sensor and device thereof'20169,473,753'Apparatus and method for reducing optical cross-talk in image sensors'20169,455,158'3DIC interconnect devices and methods of forming same'20169,455,288'Image sensor structure to reduce cross-talk and improve quantum efficiency'20169,449,914'Stacked integrated circuits with redistribution lines'20169,443,836'Forming pixel units of image sensors through bonding two chips'20169,437,578'Stacked IC control through the use of homogenous region'20169,425,150'Multi-via interconnect structure and method of manufacture'20169,412,719'3DIC interconnect apparatus and method'20169,412,725'Method and apparatus for image sensor packaging'20169,406,711'Apparatus and method for backside illuminated image sensors'20169,406,715'Image sensor device'20169,406,712'Interconnect structure for connecting dies and methods of forming the same'20169,401,380'Backside structure and methods for BSI image sensors'20169,391,109'Uniform-size bonding patterns'20169,391,101'Image sensor pickup region layout'20169,391,114'Semiconductor devices, methods of manufacturing thereof, and image sensor devices'20169,379,093'Method and apparatus for image sensor packaging'20169,373,657'System and method for fabricating a 3D image sensor structure'20169,368,545'Elevated photodiodes with crosstalk isolation'20169,362,329'Pad structure exposed in an opening through multiple dielectric layers in BSI image sensor chips'20169,355,888'Implant isolated devices and method for forming the same'20169,355,964'Method for forming alignment marks and structure of same'20169,356,066'Interconnect structure for stacked device and method'20169,356,069'Photo diode and method of forming the same'20169,356,058'Backside structure for BSI image sensor'20169,337,235'Method and apparatus for image sensor packaging'20169,324,761'Method of making image sensor devices having a concave reflective shield'20169,318,528'Image sensor device and method'20169,318,526'Mechanisms for forming image-sensor device with deep-trench isolation structure'20169,318,640'Method and apparatus for image sensor packaging'20169,318,370'High-k dielectric liners in shallow trench isolations'20169,312,294'Semiconductor devices, methods of manufacturing thereof, and image sensor devices'20169,312,229'Hybrid bonding with air-gap structure'20169,305,966'Backside structure and method for BSI image sensors'20169,305,822'Alignment marks in non-STI isolation formation and methods of forming the same'20169,299,736'Hybrid bonding with uniform pattern density'20169,293,502'Semiconductor switching device separated by device isolation'20169,287,312'Imaging sensor structure and method'20169,287,310'Methods and apparatus for glass removal in CMOS image sensors'20169,281,334'Pickup device structure within a device isolation region'20169,263,272'Gate electrodes with notches and methods for forming the same'20169,257,326'Method of making backside illuminated image sensors'20169,257,414'Stacked semiconductor structure and method'20169,245,912'Method and apparatus for low resistance image sensor contact'20169,230,941'Bonding structure for stacked semiconductor devices'20169,224,770'Image sensor device and method'20159,196,547'Dual shallow trench isolation and related applications'20159,190,345'Semiconductor devices and methods of manufacture thereof'20159,184,207'Pad structures formed in double openings in dielectric layers'20159,177,986'Isolation for semiconductor devices'20159,165,970'Back side illuminated image sensor having isolated bonding pads'20159,159,852'Image sensor device and method'20159,153,565'Image sensors with a high fill-factor'20159,147,702'Image sensor for mitigating dark current'20159,147,703'CMOS image sensor structure'20159,142,586'Pad design for backside illuminated image sensor'20159,142,690'Semiconductor device having a bonding pad and shield structure and method of manufacturing the same'20159,136,298'Mechanisms for forming image-sensor device with deep-trench isolation structure'20159,136,302'Apparatus for vertically integrated backside illuminated image sensors'20159,123,615'Vertically integrated image sensor chips and methods for forming the same'20159,123,617'Elevated photodiode with a stacked scheme'20159,117,879'Semiconductor device and manufacturing method thereof'20159,076,715'Interconnect structure for connecting dies and methods of forming the same'20159,076,708'CMOS image sensors and methods for forming the same'20159,064,986'Photo diode and method of forming the same'20159,064,989'Photo diode and method of forming the same'20159,059,061'Structure and method for 3D image sensor'20159,048,162'CMOS image sensors and methods for forming the same'20159,041,841'Image sensor having enhanced backside illumination quantum efficiency'20159,040,891'Image device and methods of forming the same'20159,041,206'Interconnect structure and method'20159,035,445'Seal ring structure with a metal pad'20159,029,183'Method and apparatus for image sensor packaging'20159,013,022'Pad structure including glue layer and non-low-k dielectric layer in BSI image sensor chips'20158,987,855'Pad structures formed in double openings in dielectric layers'20158,987,113'Image sensor including multiple lenses and method of manufacture thereof'20158,981,510'Ridge structure for back side illuminated image sensor'20158,969,991'Backside structure and methods for BSI image sensors'20158,962,375'Method of making a reflective shield'20158,957,358'CMOS image sensor chips with stacked scheme and methods for forming the same'20158,952,497'Scribe lines in wafers'20158,952,474'Method of fabricating backside-illuminated image sensor'20158,946,847'Backside illuminated image sensors and method of making the same'20158,946,849'BSI image sensor chips with separated color filters and methods for forming the same'20158,946,784'Method and apparatus for image sensor packaging'20158,941,204'Apparatus and method for reducing cross talk in image sensors'20158,933,527'Elevated photodiodes with crosstalk isolation'20158,900,966'Alignment for backside illumination sensor'20148,895,349'Backside illuminated image sensor having capacitor on pixel region'20148,883,544'Method of forming an image device'20148,878,242'Pickup device structure within a device isolation region'20148,878,325'Elevated photodiode with a stacked scheme'20148,816,457'Sensor structure for optical performance enhancement'20148,810,700'Front side implanted guard ring structure for backside'20148,809,098'Back side defect reduction for back side illuminated image sensor'20148,790,954'Method of making wafer structure for backside illuminated color image sensor'20148,791,541'Backside-illuminated image sensor having a supporting substrate'20148,785,984'Method for making multi-step photodiode junction structure for backside illuminated sensor'20148,766,387'Vertically integrated image sensor chips and methods for forming the same'20148,736,006'Backside structure for a BSI image sensor device'2014

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (205)· patent assignee history
1999–2021Based in Taipei, TW· patent location history
2007–2019Based in Hsinchu, TW· patent location history
2012–2016Patents assigned to YAUNG DUN-NIAN (69)· patent assignee history
2012–2016Patents assigned to LIU JEN-CHENG (57)· patent assignee history
2012–2016Patents assigned to WANG WEN-DE (26)· patent assignee history
2015–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (215)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD2152015–2021
TAIWAN SEMICONDUCTOR MFG2051999–2016
YAUNG DUN-NIANself692012–2016
LIU JEN-CHENG572012–2016
WANG WEN-DE262012–2016
Locations
LocationPatentsSpan
Taipei, TW4181999–2021
Hsinchu, TW52007–2019