The present disclosure relates to a microelectronics package with an inductive element and a magnetically enhanced mold compound component, and a process for making the same. The disclosed microelectronics package includes a module substrate, a thinned flip-chip die with an upper surface that includes a first surface portion and a second surface portion surrounding the first surface portion, the magnetically enhanced mold compound component, and a mold compound component. The thinned flip-chip die is attached to the module substrate and includes a device layer with an inductive element embedded therein. Herein, the inductive element is underlying the first surface portion and not underlying the second surface portion. The magnetically enhanced mold compound component is formed over the first surface portion. The mold compound component is formed over the second surface portion, not over the first surface portion, and surrounding the magnetically enhanced mold compound component.

Claims

22 · 13 independent · depth 2

22 granted claims

›1.independentAn apparatus comprising: a module substrate; a thinned flip-chip die, which has an upper surface including a first surface portion and a second surfac…+4

›2.independentThe apparatus of claim 1 wherein: the upper surface of the thinned flip-chip die further includes a third surface portion surrounded by the second sur…

›3.independentThe apparatus of claim 2 wherein the first magnetically enhanced mold compound component and the second magnetically enhanced mold compound component …

›4.independentThe apparatus of claim 2 wherein the first magnetically enhanced mold compound component and the second magnetically enhanced mold compound component …+2

›5.independentThe apparatus of claim 1 wherein the device layer further comprises a second inductive element that is underlying the first surface portion such that …

›6.independentThe apparatus of claim 1 wherein the device layer further comprises a second inductive element that is underlying the first surface portion and latera…

›7.independentThe apparatus of claim 1 wherein the upper surface of the thinned flip-chip die is an upper surface of the dielectric layer.

›8.independentThe apparatus of claim 1 wherein the first magnetically enhanced mold compound component is formed from polymer mixed with at least one magnetically e…

›11.independentThe apparatus of claim 1 wherein the first mold compound component has a thermal conductivity between 2.5 w/m·k and 50 w/m·k.

›12.independentThe apparatus of claim 1 further comprising a second mold compound component that resides between the module substrate and the lower surface of the de…

›17.independentThe apparatus of claim 1 wherein the dielectric layer is formed of silicon oxide.

›18.independentThe apparatus of claim 1 wherein the first inductive element is one of a group consisting of inductor, transmission line, and coupler.

›19.independentThe apparatus of claim 1 wherein the device layer further includes at least one of a group consisting of diodes, transistors, mechanical switches, and…+3

Classifications

6 codes

IPC · International Patent Classification

Section H — Electricity

H01L23/64
H01L23/18
H01L23/00
H01L23/29
H01L23/31
H01L23/66

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File wrapper

Pendency

1.5 y

544 days filing → grant

Office actions

after a restriction

Examiner

Yasser A Abdelaziez

art unit 2898 · TC 2800

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Citations: 305 back · 0 forward

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Priority chain

2 priority documents

Priority

9 May 2016

earliest claimed

›Priority documents — 2

Type	Document	Date
provisional	US 62333317	9 May 2016
related publication	US 20170323860 A1	9 Nov 2017

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