The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes: programming a group of G memory cells such that a combination of respective program states of the group maps to a constellation point corresponding to a received N unit data pattern, the group used to store N/G units of data per memory cell; wherein the constellation point is one of a number of constellation points of a constellation associated with mapping respective program state combinations of the group of memory cells to N unit data patterns; and wherein the constellation comprises a first mapping shell and a second mapping shell, the constellation points corresponding to the respective first and second mapping shells determined, at least partially, based on a polynomial expression of order equal to G.

Claims

20 · 3 independent · depth 4

20 granted claims

›1.independentAn apparatus, comprising:na plurality (G) of memory cells; anda packing component configured to:nmap each one of a plurality (2N) of data patterns to …+7

›2.↳ 1The apparatus of claim 1, wherein each of the G memory cells are programmable to a plurality (L) of program states.d2+4

›7.↳ 1The apparatus of claim 1, wherein N/G is a fractional number.d2

›8.↳ 1The apparatus of claim 1, wherein:na quantity of constellation mapping points corresponding to the first shell is determined based on a first term of …d2

›9.independentA method, comprising:nstoring a N unit data pattern in a plurality (G) of memory cells such that the G memory cells store N/G units of data per memory…+4

›14.independentAn apparatus, comprising:nan array of memory cells each programmable to a plurality (L) of program states; anda controller configured to:nstore a part…+6

›15.↳ 14The apparatus of claim 14, wherein the first term of the polynomial expression is AG, with AG being a quantity of constellation points of the first ma…d2+1

›17.↳ 14The apparatus of claim 14, wherein the mapping indicates a swap cell for constellation points of the second mapping shell.d2

›18.↳ 14The apparatus of claim 14, wherein the stored N unit data pattern is an N bit data pattern, and wherein each of the mappings of the first mapping shel…d2

›19.↳ 14The apparatus of claim 14, wherein the controller is configured to determine the N unit data pattern stored in the G memory cells without performing a…d2

›20.↳ 14The apparatus of claim 14, wherein the G memory cells are fractional unit memory cells.d2

Classifications

9 codes

IPC · International Patent Classification

Section G — Physics

G11C16/10
G06F12/06
G11C16/04
G11C11/56
G06F12/00
G06F12/02
G11C16/00
G11C13/00
G11C14/00

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1.2 y

425 days filing → grant

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non-final + final

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Examiner

John Lane

art unit 2139 · TC 2100

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Type	Document	Date
related publication	US 20150162089 A1	11 Jun 2015

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