Display device

A display device comprising:na first wiring connected to a pixel portion, the first wiring including a first portion, a second portion and a third portion;a common wiring; anda protective circuit comprising a first thin film transistor and a second thin film transistor,wherein the first thin film transistor includes:na first gate electrode;a first gate insulating layer over the first gate electrode;a first oxide semiconductor layer over the first gate electrode with the first gate insulating layer interposed therebetween;a first conductive layer in contact with the first oxide semiconductor layer; anda second conductive layer in contact with the first oxide semiconductor layer,wherein the first gate electrode is directly connected to the first wiring,wherein the first conductive layer is electrically connected to the second portion through a first transparent conductive layer, andwherein the second conductive layer is directly connected to the common wiring, andwherein the second thin film transistor includes:na second gate electrode;a second gate insulating layer over the second gate electrode;a second oxide semiconductor layer over the second gate electrode with the second gate insulating layer interposed therebetween;a third conductive layer in contact with the second oxide semiconductor layer; anda fourth conductive layer in contact with the second oxide semiconductor layer,wherein the second gate electrode is electrically connected to the common wiring through a second transparent conductive layer,wherein the third conductive layer is directly connected to the first wiring,wherein the fourth conductive layer is directly connected to the common wiring,wherein the first portion overlaps with the common wiring,wherein the third portion is closer to the pixel portion than the first portion and the second portion,wherein a first distance between edges of the first portion is narrower than a second distance between edges of the second portion, andwherein a direction of the first distance is parallel to a direction of the second distance.

A display device comprising:na first wiring connected to a pixel portion;a common wiring; anda protective circuit comprising a first thin film transistor, a second thin film transistor and a third thin film transistor,wherein the first thin film transistor includes:na first gate electrode;a first gate insulating layer over the first gate electrode;a first oxide semiconductor layer over the first gate electrode with the first gate insulating layer interposed therebetween;a first conductive layer in contact with the first oxide semiconductor layer; anda second conductive layer in contact with the first oxide semiconductor layer,wherein the first conductive layer is connected to the pixel portion, andwherein the second conductive layer is connected to the common wiring,wherein the second thin film transistor includes:na second gate electrode;a second gate insulating layer over the second gate electrode;a second oxide semiconductor layer over the second gate electrode with the second gate insulating layer interposed therebetween;a third conductive layer in contact with the second oxide semiconductor layer; anda fourth conductive layer in contact with the second oxide semiconductor layer,wherein the second gate electrode is connected to the pixel portion,wherein the third conductive layer is connected to the pixel portion, andwherein the fourth conductive layer is connected to the first gate electrode,wherein the third thin film transistor includes:na third gate electrode;a third gate insulating layer over the third gate electrode;a third oxide semiconductor layer over the third gate electrode with the third gate insulating layer interposed therebetween;a fifth conductive layer in contact with the third oxide semiconductor layer; anda sixth conductive layer in contact with the third oxide semiconductor layer,wherein the third gate electrode is connected to the common wiring,wherein the fifth conductive layer is connected to the first gate electrode, andwherein the sixth conductive layer is connected to the common wiring,wherein the second gate electrode comprises a first region where the second gate electrode overlaps with the second oxide semiconductor layer, and a second region where the second gate electrode does not overlap with the second oxide semiconductor layer,wherein the second region is in contact with the first wiring,wherein a first distance between edges of the second region is narrower than a second distance between edges of the first region, andwherein each of a direction of the first distance and a direction of the second distance is parallel to a channel length direction of the second thin film transistor.

A display device comprising:na first wiring connected to a pixel portion;a common wiring; anda protective circuit comprising a first thin film transistor and a second thin film transistor,wherein the first thin film transistor includes:a first gate electrode;a first gate insulating layer over the first gate electrode;a first oxide semiconductor layer over the first gate electrode with the first gate insulating layer interposed therebetween;a first conductive layer in contact with the first oxide semiconductor layer; anda second conductive layer in contact with the first oxide semiconductor layer,wherein the first gate electrode is electrically connected to the common wiring,wherein the first conductive layer is electrically connected to the first wiring, andwherein the second conductive layer is directly connected to the common wiring, wherein the second thin film transistor includes:a second gate electrode;a second gate insulating layer over the second gate electrode;a second oxide semiconductor layer over the second gate electrode with the second gate insulating layer interposed there between;a third conductive layer in contact with the second oxide semiconductor layer;and a fourth conductive layer in contact with the second oxide semiconductor layer,wherein the second gate electrode is directly connected to the first wiring, wherein the third conductive layer is electrically connected to the first wiring, andwherein the fourth conductive layer is directly connected to the common wiring, and wherein the second gate electrode comprises a first region where the second gate electrode overlaps with the second oxide semiconductor layer, and a second region where the second gate electrode does not overlap with the second oxide semiconductor layer,wherein the second region is in contact with the first wiring,wherein a first distance between edges of the second region is narrower than a second distance between edges of the first region, andwherein each of a direction of the first distance and a direction of the second distance is parallel to a channel length direction of the second thin film transistor.