A method of making a microelectronic package comprising:nforming a dielectric encapsulation layer on an in-process unit including a substrate having a first surface and a second surface remote therefrom, the first surface of the substrate extending in lateral directions, a microelectronic element mounted to the first surface of the substrate, a plurality of conductive elements exposed at the first surface, at least some of the conductive elements being electrically connected to the microelectronic element, and wire bonds having bases joined to the conductive elements and end surfaces remote from the bases, each wire bond defining an edge surface extending between the base and the end surface, wherein a first one of the wire bonds is adapted for carrying a first signal electric potential and a second one of the wire bonds is adapted for simultaneously carrying a second signal electric potential different form the first signal electric potential, and wherein an unencapsulated portion of at least one of the wire bonds is formed such that the end surface thereof is displaced in at least one of the lateral directions from the conductive element to which the at least one wire bond is joined;wherein the encapsulation layer is formed so as to at least partially cover the first surface and portions of the wire bonds, such that unencapsulated portions of the wire bonds are defined by a portion of at least one of the end surface or of the edge surface thereof that is uncovered by the encapsulation layer.
›2.↳ 1The method of claim 1, wherein the substrate is a lead frame and wherein the conductive elements are leads of the lead frame.d2
The method of claim 1, wherein the substrate is a lead frame and wherein the conductive elements are leads of the lead frame.
›3.↳ 1The method of claim 1, wherein forming the encapsulation layer includes depositing a dielectric material mass over the first surface and substantially…d2+2
The method of claim 1, wherein forming the encapsulation layer includes depositing a dielectric material mass over the first surface and substantially all of the wire bonds and removing a portion of the dielectric material mass to uncover portions of the wire bonds to define the unencapsulated portions thereof.
›14.↳ 3The method of claim 3, wherein at least one of the wire bonds extends in a loop joined to each of at least two of the conductive elements, wherein the…d3+1
The method of claim 3, wherein at least one of the wire bonds extends in a loop joined to each of at least two of the conductive elements, wherein the dielectric material mass is deposited so as to at least partially cover the first surface and the at least one wire bond loop, and wherein removing a portion of the dielectric material mass further includes removing a portion of the at least one wire bond loop so as sever the at least one wire bond loop into first and second wire bonds having respective free ends that are uncovered by the encapsulation layer to form the unencapsulated portions thereof.
›15.↳ 14The method of claim 14, further comprising forming the loop of the in-process unit by steps including joining a first end of a wire to the conductive …d4
The method of claim 14, further comprising forming the loop of the in-process unit by steps including joining a first end of a wire to the conductive element, drawing the wire in a direction away from the first surface, then drawing the wire in at least a lateral direction along the first surface, then drawing the wire to the second conductive element and joining the wire to the second conductive element.
›4.↳ 1The method of claim 1, wherein the encapsulation layer is formed on the in-process unit by pressing a dielectric material mass over the wire bonds fro…d2
The method of claim 1, wherein the encapsulation layer is formed on the in-process unit by pressing a dielectric material mass over the wire bonds from a location remote from the substrate and into contact with the first surface of the substrate such that the at least one of the wire bonds penetrates the dielectric material mass.
›5.↳ 1The method of claim 1, wherein the wire bonds are made of wire consisting substantially of gold, copper, aluminum, or solder.d2
The method of claim 1, wherein the wire bonds are made of wire consisting substantially of gold, copper, aluminum, or solder.
›6.↳ 1The method of claim 1, wherein the first wire bonds includes aluminum, and wherein the wire bonds are joined to the conductive element by wedge bondin…d2
The method of claim 1, wherein the first wire bonds includes aluminum, and wherein the wire bonds are joined to the conductive element by wedge bonding.
›7.↳ 1The method of claim 1, wherein the in-process unit is formed including a step of forming the wire bonds such that at least one of the wire bonds inclu…d2
The method of claim 1, wherein the in-process unit is formed including a step of forming the wire bonds such that at least one of the wire bonds includes a substantially curved segment positioned between the conductive element and the end surface of the at least one wire bond.
›8.↳ 1The method of claim 1, wherein the substrate includes a first region and a second region, the microelectronic element overlies the first region and ha…d2
The method of claim 1, wherein the substrate includes a first region and a second region, the microelectronic element overlies the first region and has a major surface remote from the substrate, wherein the first conductive element is disposed within the second region, wherein the in-process unit is formed including a step of forming the wire bonds such that at least a portion of at least one of the wire bonds extends over the major surface of the microelectronic element.
›9.↳ 1The method of claim 1, wherein the step of forming the encapsulation layer includes forming at least one cavity extending from a major surface of the …d2+4
The method of claim 1, wherein the step of forming the encapsulation layer includes forming at least one cavity extending from a major surface of the encapsulation layer toward the substrate, the at least one cavity surrounding the unencapsulated portion of one of the wire bonds.
›16.↳ 9The method of claim 9, wherein the at least one cavity is formed after depositing a dielectric encapsulation material onto the substrate by at least o…d3
The method of claim 9, wherein the at least one cavity is formed after depositing a dielectric encapsulation material onto the substrate by at least one of wet etching, dry etching, or laser etching the encapsulation material.
›17.↳ 9The method of claim 9, wherein the at least one cavity is formed by removing at least a portion of a mass of sacrificial material from a predetermined…d3+2
The method of claim 9, wherein the at least one cavity is formed by removing at least a portion of a mass of sacrificial material from a predetermined location of at least one of the wire bonds after depositing a dielectric encapsulation material onto the substrate and the at least one wire bond.
›18.↳ 17The method of claim 17, wherein the step of forming the encapsulation layer is carried out such that a portion of the mass of sacrificial material is …d4
The method of claim 17, wherein the step of forming the encapsulation layer is carried out such that a portion of the mass of sacrificial material is exposed on a major surface of the encapsulation layer, the exposed portion of the mass of sacrificial material surrounding a portion of the wire bond near the free end thereof and spacing apart a portion of the encapsulation layer therefrom.
›19.↳ 17The method of claim 17, wherein at least one of the wire bonds defines a longitudinal axis along a length thereof, and a second portion of the mass of…d4
The method of claim 17, wherein at least one of the wire bonds defines a longitudinal axis along a length thereof, and a second portion of the mass of sacrificial material extends along the longitudinal axis of the at least one wire bond extending from a location adjacent to the base and remains after the step of removing at least a portion of the mass of sacrificial material.
›10.↳ 1The method of claim 1, wherein the wire bonds define a longitudinal axis along a length thereof, and wherein the wire bonds include an inner layer of …d2+2
The method of claim 1, wherein the wire bonds define a longitudinal axis along a length thereof, and wherein the wire bonds include an inner layer of a first material extending along the longitudinal axis and an outer layer of a second material remote from the longitudinal axis and extending along the length of the wire bond.
›20.↳ 10The method of claim 10, wherein the first material is copper and wherein the second material is solder.d3
The method of claim 10, wherein the first material is copper and wherein the second material is solder.
›21.↳ 10The method of claim 10, wherein a portion of the second material is removed after the step of forming the encapsulation layer to form a cavity extendi…d3
The method of claim 10, wherein a portion of the second material is removed after the step of forming the encapsulation layer to form a cavity extending from a surface of the dielectric layer to uncover a portion of the edge surface of the inner layer of the wire bond.
›11.↳ 1The method of claim 1, further including forming a stud bump on the unencapsulated portion of at least one of the wire bonds.d2
The method of claim 1, further including forming a stud bump on the unencapsulated portion of at least one of the wire bonds.
›12.↳ 1The method of claim 1, further including depositing a solder ball on the unencapsulated portion of at least one of the wire bonds.d2
The method of claim 1, further including depositing a solder ball on the unencapsulated portion of at least one of the wire bonds.
›13.↳ 1A method of making a microelectronic assembly, comprising joining a first microelectronic package made according to the steps of claim 1 with a second…d2
A method of making a microelectronic assembly, comprising joining a first microelectronic package made according to the steps of claim 1 with a second microelectronic package, the second microelectronic package including a substrate having a first surface and a plurality of contacts exposed at the first surface of the substrate, wherein joining the first microelectronic package with the second microelectronic package includes electrically and mechanically connecting the unencapsulated portions of the wire bonds of the first microelectronic package with the contacts of the second microelectronic package.
