Dicing-free LED fabrication

The semiconductor integrated circuit (IC) industry has experienced rapid growth in recent years. Technological advances in IC materials and design have produced various types of ICs that serve different purposes. One type of these ICs includes photonic devices, such as light-emitting diode (LED) devices. The LED devices are typically fabricated on a wafer. To package the individual LED devices, the LED wafer is traditionally sliced to separate the sliced pieces of the wafer into LED dies. However, the slicing process involves the use of mechanical tools, which may be costly. Further, the slicing process may create contaminant particles on the LED devices, which will limit the yield and performance of the LED devices. In addition, the mechanically-sliced LED dies may have unsmooth edges, which may also adversely impact the LED device's performance.

Therefore, while existing methods of fabricating the LED devices have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.

Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is emphasized that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

FIG. 1 is a flowchart illustrating a method for fabricating a LED device according to various aspects of the present disclosure.

FIGS. 2-9 are diagrammatic fragmentary cross-sectional side views of a portion of a wafer containing LED devices at various stages of fabrication in accordance with various aspects of the present disclosure.

It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. Moreover, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed interposing the first and second features, such that the first and second features may not be in direct contact. Various features may be arbitrarily drawn in different scales for the sake of simplicity and clarity.

Illustrated in FIG. 1 is a flowchart of a method 11 for fabricating an LED device according to various aspects of the present disclosure. Referring to FIG. 1 , the method 11 begins with block 13 in a substrate having a semiconductor layer is provided. The substrate may be a sapphire substrate. The substrate has opposite first and second sides. The semiconductor layer is formed on the first side of the substrate. The semiconductor layer may include oppositely doped gallium nitride epi-layers. The method 11 continues with block 15 in which a patterned photoresist layer is formed over the semiconductor layer. The patterned photoresist layers have a plurality of openings therein. The method 11 continues with block 17 in which each of the openings is filled with a conductive component. The conductive component may be thermally and electrically conductive and may include a metal. The method 11 continues with block 19 in which the semiconductor layer is separated into a plurality of LED dies using a localized radiation process. The radiation process is performed from the second side of the substrate. The radiation process includes radiating a plurality of first regions of the substrate. Each of the first regions of the substrate is aligned with one of the conductive components.

FIGS. 2 to 9 are diagrammatic fragmentary cross-sectional side views of a portion of an LED wafer (a wafer containing LED devices) at various fabrication stages according to embodiments of the method 11 of FIG. 1 . The word “wafer” is used herein to refer to the substrate of the wafer as well as the various components formed on the wafer. It is understood that FIGS. 2 to 9 have been simplified for a better understanding of the inventive concepts of the present disclosure.

Referring to FIG. 2 , a substrate 35 is provided. The substrate 35 includes a material that is suitable for growing a light-emitting material. Thus, the substrate 35 may also be referred to as a growth substrate or a growth wafer. In one embodiment, the substrate 35 includes a sapphire material. In other embodiments, the substrate 35 may include silicon carbide, silicon, or another suitable material for growing the light-emitting material.

A semiconductor layer 50 is formed on the substrate 35 . The semiconductor layer 50 includes oppositely doped semiconductor layers, which may form a P/N junction. In an embodiment, the semiconductor layer 50 includes a layer of gallium nitride (GaN) material doped with a p-type dopant such as boron (B), and a layer of gallium nitride material doped with an n-type dopant such as arsenic (As) or phosphorous (P).

The semiconductor layer 50 may also include a multiple quantum well (MQW) layer that is disposed in between the oppositely doped (p-type and n-type) layers. The MQW layer has alternating (or periodic) layers of gallium nitride and indium gallium nitride (InGaN). For example, in one embodiment, the MQW layer may have ten (or any other suitable number) layers of gallium nitride and ten (or any other suitable number) layers of indium gallium nitride, where an indium gallium nitride layer is formed on a gallium nitride layer, and another gallium nitride layer is formed on the indium gallium nitride layer, so on and so forth. For the sake of simplicity, the oppositely doped p-type and n-type layers and the MQW layer within the semiconductor layer 50 are not specifically illustrated.

The oppositely doped layers and the MQW layer of the semiconductor layer 50 are formed by an epitaxial growth process known in the art. In the epitaxial growth process, the substrate 35 acts as a seed crystal, and the layers of the semiconductor layer 50 take on a lattice structure and an orientation that are substantially identical to those of the substrate 35 . After the completion of the epitaxial growth process, a P/N junction (or a P/N diode) is formed by the disposition of the MQW layer between the oppositely doped p-type and n-type layers.

When an electrical voltage (or electrical charge) is applied to the doped layers, electrical current flows through the MQW layer. As a result, the MQW layer emits radiation such as light in an observable spectrum. The color of the light emitted by the MQW layer corresponds to the wavelength of the light. The wavelength of the light (and hence the color of the light) may be tuned by varying the composition and structure of the materials that make up the MQW layer.

A layer 60 is then formed on the semiconductor layer 50 . The layer 60 includes a conductive material. In an embodiment, the layer 60 includes a metal material, for example, Aluminum, Silver, combinations thereof, or another suitable metal material. The layer 60 may be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), e-gun, thermal evaporator, or another suitable technique.

In an embodiment, the layer 60 serves as an Ohmic contact, meaning its current-voltage (I/V) curve is substantially linear and symmetric. In another embodiment, the layer 60 serves as a reflective layer, or a minor, to reflect light emitted by light-emitting diode (LED) devices that will be formed from the semiconductor layer 50 . In yet another embodiment, the layer 60 serves as a capped layer to protect the semiconductor layer 50 . In one more embodiment, the layer 60 serves as a seed layer (also referred to as an adhesive layer) for a plating process to be performed later, which will be discussed below. It is understood that the layer 60 may serve all the functions/purposes discussed above. Alternatively, a separate layer may be formed to carry out each of these functions/purposes discussed above. For example, the layer 60 may serve as the Ohmic contact layer, another layer may be formed over the layer 60 and may serve as the reflective layer, and a capped layer may be formed over the reflective layer, etc.

A photoresist layer 70 is then formed over the layer 60 . The photoresist layer 70 includes a photosensitive material and may be formed by a spin-coating process or another suitable technique.

Referring now to FIG. 3 , the photoresist layer 70 is patterned by a photolithography process, also referred to as a patterning process. The photolithography process may include a plurality of masking, exposing, developing, baking, rinsing, and stripping processes, among other processes. As a result of the photolithography process, the photoresist layer is patterned into a plurality of photoresist components (also referred to as photoresist portions). For the sake of providing an example, five of such photoresist components 70 A, 70 B, 70 C, 70 D, and 70 E are shown in FIG. 3 . The photoresist components 70 A- 70 E are each formed to be in (or over) a scribe line (also referred to as a street line) region of the wafer. The scribe line or street line regions are where the LED dies are to be physically separated before they are packaged. One reason for forming the photoresist components 70 A- 70 E is to avoid cutting of metal in the fabrication of LED devices. This will be discussed in more detail below.

The photoresist components 70 A- 70 E are separated by openings 80 , 81 , 82 , and 83 . The openings 80 - 83 each have a lateral dimension (or width) 90 . In an embodiment, the width 90 is in a range from about 0.5 mili-meter (mm) to about 2 mm. It is understood that in alternative embodiments, the openings 80 - 83 may not have equal lateral dimensions.

Referring now to FIG. 4 , conductive components (also referred to as conductive portions) 100 , 101 , 102 , and 103 are formed in the openings 80 , 81 , 82 , and 83 , respectively. In an embodiment, the conductive components 100 - 103 are formed using an electrochemical plating (ECP) process known in the art. As discussed above, the layer 60 may serve as a seed layer in the ECP process for growing the conductive components 100 - 103 in the openings 80 - 83 . Alternatively, another layer may be formed over the layer 60 to serve as the seed layer for the ECP process. In an embodiment, the conductive components 100 - 103 each include a material that is both thermally conductive and electrically conductive, such as a metal material. The conductive components 100 - 103 at least partially fill the openings 80 - 83 .

Referring to FIG. 5 , a glue material (also referred to as an adhesive material) 110 is formed over the photoresist components 70 A- 70 E and the conductive components 100 - 103 . In an embodiment, the glue material 110 is a material that is activated by an ultra-violet (UV) light, that is, the glue material 110 becomes irreversibly adhesive after being radiated by a suitable UV light.

Thereafter, a layer 120 is formed over the glue material 110 . In an embodiment, the layer 120 includes a light-to-heat conversion material. As such, the layer 120 may also be referred to as a light-to-heat conversion (LTHC) conversion layer. This means that the layer 120 is operable to absorb radiation waves such as light, and then convert that radiation to heat.

A substrate 130 is then bonded to the layer 120 using a glass bonding technique known in the art. In an embodiment, the substrate 130 includes a glass substrate. The glass material of the substrate 130 is chosen so that it will let a substantial amount of radiation pass through without absorbing the radiation. In an alternative embodiment, the light-to-heat conversion layer 120 is formed on the glass substrate 130 first, and then the glass substrate 130 is bonded to the glue material 110 with the light-to-heat conversion layer being the interface between the glue material 110 and the glass substrate 130 .

Referring now to FIG. 6 , a localized radiation process 140 is performed on the substrate 35 . The radiation process 140 is performed from a side of the substrate 35 opposite to the side of the substrate 35 on which the semiconductor layer 50 is formed. In an embodiment, the radiation process 140 includes a laser scan process that uses a 248 nanometer (nm) KrF laser. The radiation process 140 is localized in the sense that only selected regions of the substrate 35 are exposed to the radiation. Correspondingly, only the regions of the semiconductor layer 50 that are aligned with the selected regions of the substrate 35 are exposed to the radiation.

In an embodiment, the regions of the substrate 35 and the corresponding regions of the semiconductor layer 50 being radiated are each substantially aligned with one of the conductive components 100 - 103 . For the sake of clarity, these regions are designated as regions 35 A- 35 D and 50 A- 50 D, respectively, wherein the boundaries of these regions are shown as dashed lines within the substrate 35 and the semiconductor layer 50 . The remaining regions of the substrate 35 and the semiconductor layer 50 are each aligned with one of the photoresist components 70 A- 70 E. These remaining regions of the substrate 35 and the semiconductor layer 50 are designated as regions 35 E- 35 I and 50 E- 50 I, respectively, for the sake of clarity.

It is understood that in alternative embodiments, the regions 35 A- 35 D and 50 A- 50 D may be narrower than the conductive components 100 - 103 . Alternatively stated, the regions 35 A- 35 D and 50 A- 50 D may have smaller lateral dimensions than the lateral dimension 90 of the openings 80 - 83 (shown in FIG. 3 ), which is also the lateral dimension of the conductive components 50 A- 50 D (since the conductive components 50 A- 50 D fill the openings 80 - 83 ).

The radiation from the radiation process 140 is selected in a manner so that it mostly passes through the substrate regions 35 A- 35 D and get absorbed by semiconductor regions 50 A- 50 D. As a result of the radiation, a nitrogen gas is generated and released at the interfaces between the substrate and semiconductor regions 35 A and 50 A, 35 B and 50 B, 35 C and 50 C, 35 D and 50 D, respectively. Consequently, the substrate regions 35 A- 35 D become separated from the semiconductor regions 50 A- 50 D. Meanwhile, the substrate regions 35 E- 35 I are still attached to the semiconductor regions 50 E- 50 I, because these regions were not exposed to radiation, and thus no nitrogen gas was released between their respective interfaces.

In an alternative embodiment, a dry etching process is performed to etch away the substrate regions 35 E- 35 I and the semiconductor regions 50 E- 50 I before the radiation process 140 is performed. Thus, openings will be formed in place of the substrate regions 35 E- 35 I and the semiconductor regions 50 E- 50 I. This dry etching process may be carried out in a manner so that the openings have substantially smooth sidewalls. For the sake of simplicity, this alternative embodiment is not specifically illustrated.

Referring now to FIG. 7 , the substrate 35 is removed along with the semiconductor regions 50 E- 50 I using a substrate removal process 150 . The substrate removal process 150 may include a lift off process. The substrate 35 can be easily lifted off the semiconductor regions 50 A- 50 D, since the radiation process 140 (shown in FIG. 6 ) has already separated the substrate 35 from the regions 50 A- 50 D through the release of nitrogen gas. The semiconductor regions 50 E- 50 I can be removed along with the substrate 35 because the semiconductor regions 50 E- 50 I still remain attached to the substrate 35 at the completion of the radiation process 140 , as discussed above. The substrate 130 provides mechanical strength and support during the substrate removal process 150 .

In an embodiment, portions of the layer 60 below (and aligned with) the semiconductor regions 50 E- 50 I also remain attached during the substrate removal process 150 and are therefore removed together with the substrate 35 . In an alternative embodiment, these portions of the layer 60 below and aligned with the semiconductor regions 50 E- 50 I may be etched away after the substrate removal process 150 is performed. In addition, it is understood that in some alternative embodiments, the substrate 35 may be removed using a grinding process, a chemical-mechanical polishing (CMP) process, or one or more suitable etching processes.

Referring to FIG. 8 , contact pads (also referred to as electrodes) 160 , 161 , 162 , and 163 may be formed on the semiconductor regions 50 A, 50 B, 50 C, and 50 D, respectively. The semiconductor regions 50 A- 50 D are main portions of LED dies and may be referred to as LED dies or LED devices. The contact pads 160 - 163 may be used to apply electrical voltages to the LED dies 50 A- 50 D.

After the contact pads 160 - 163 are formed, a substrate removal process 170 is then performed to removal the substrate 130 . In an embodiment, the substrate removal process 170 includes a laser scan process, in which the substrate 130 is radiated by a laser. As discussed above, the material of the substrate 130 is selected so that it absorbs a minimal amount of radiation. Therefore, the radiation from the laser scan process mostly passes through the substrate 130 without being absorbed, and most of the radiation is actually absorbed by the layer 120 .

Also as discussed before, the layer 120 includes a material that converts radiation such as light into heat. Thus, the radiation from the laser scan process is absorbed by the layer 120 and subsequently transformed into heat energy. The heat energy causes the substrate 130 to become de-coupled from the layer 120 . Thus, the substrate 130 may be de-bonded from the layers above using the laser scan process. In alternative embodiments, the substrate 130 may be de-bonded using a chemical treatment process, a peeling off process, or combinations thereof. The layer 120 may be removed during the removal of the substrate 130 or thereafter.

Referring now to FIG. 9 , a glue removal process 180 is used to remove the glue material 110 . In an embodiment, the glue removal process 180 includes a peeling off process, in which the glue material 110 is peeled off along with the photoresist components 70 A- 70 E. One of the reasons that the photoresist components can be peeled off along with the glue material 110 is that, the adhesion force between the photoresist components 70 A- 70 E and the glue material 110 is stronger than the adhesion force between the photoresist components 70 A- 70 E and the conductive components 100 - 103 adjacent to the photoresist components 70 A- 70 E.

Meanwhile, the adhesion force between the conductive components 100 - 103 and the glue material 110 is not as strong as the adhesion force between the conductive components 100 - 103 and the layer 60 . Therefore, the conductive components 100 - 103 will not be peeled off along with the glue material 110 . Also, although not illustrated for the sake of simplicity, the entire wafer may be transferred to a blue tape (used to carry out further processing) before the glue material 110 is removed.

At this stage of fabrication, it can be seen that the LED dies 50 A- 50 D have been completely separated from one another, where no mechanical dicing processes are used to accomplish such separation. It is understood that addition processes may be performed to complete the fabrication of each individual LED die. For example, an encapsulant structure may be formed over each LED die to mold the LED die. The encapsulant structure may include an organic material such as resin or plastic and may provide sufficient sealing for the LED die to minimize corrosion concerns. Lenses may also be formed for each LED die, so that the light emitted by the LED die may be directed and focused in an intended propagation direction. For the sake of simplicity, these additional fabrication processes are not discussed in detail herein.

The embodiments of the present disclosure discussed above have advantages over existing methods. It is understood, however, that other embodiments may offer different advantages, and that no particular advantage is required for any embodiment. One of the advantages is that no mechanical dicing processes are used to physically separate the LED dies. Traditional LED fabrication processes may involve the use of mechanical saw devices to cut through the scribe line regions, which are also referred to as street line regions of the LED wafer. This sawing process may damage the edges of the LED dies. Moreover, if the LED dies are formed on a metal substrate, the sawing may create metal contaminant particles, which may substantially degrade the performance and yield of the LED devices.

Here, photoresist components (such as 70 A- 70 E) are formed in (or over) the scribe line or street line regions of the LED wafer. The thermally conductive metal components (such as 100 - 103 ) are formed between the scribe line regions—in other words, the conductive metal components are formed directly underneath the LED dies. As such, no cutting of metal is needed—since these conductive metal components are not formed in the scribe line regions by design. The elimination of metal cutting will increase yield and improve performance of the LED devices as well as reduce LED fabrication costs.

Also, the sapphire substrate removal process (such as process 150 ) requires no physical or mechanical cutting, since it is carried out using a radiation process 140 (shown in FIG. 6 ). The semiconductor regions (such as 50 E- 50 I) in the scribe line regions can be removed along with the sapphire substrate 35 , which simplifies LED fabrication processes. Also, in the embodiment where dry etching is used to form openings in the scribe line regions, the resulting LED dies have smooth sidewalls, which may also help increase yield and improve performance of the LED devices.

Another advantage is that each conductive metal component serves as a good heat sync for the respective LED device. This may be beneficial, especially when the LED devices generate large amounts of heat during its operation.

An additional advantage is that the photoresist components (such as 70 A- 70 E) can be removed during the removal of the glue material 110 . Once again, this simplifies the fabrication of the LED devices and therefore reduces fabrication costs.

One of the broader forms of the present disclosure involves a method. The method includes: providing a substrate having opposite first and second sides, wherein the first side has a semiconductor layer formed thereon; forming a photoresist layer over the semiconductor layer; patterning the photoresist layer into a plurality of photoresist components, the photoresist components being separated by openings; filling the openings with a plurality of thermally conductive components; and separating the semiconductor layer into a plurality of dies using a radiation process that is performed to the substrate from the second side, each of the first regions of the substrate being aligned with one of the conductive components.

Another of the broader forms of the present disclosure involves a method of LED fabrication. The method includes: providing a wafer having a sapphire substrate and a semiconductor layer formed on the sapphire substrate, the semiconductor layer containing a plurality of un-separated LED dies; forming a photo-sensitive layer over the semiconductor layer; performing a photolithography process to pattern the photo-sensitive layer into a plurality of patterned portions, the patterned portions being separated by a plurality of openings that are each substantially aligned with one of the LED dies; forming a metal material in each of the openings; radiating the wafer in a localized manner such that only portions of the wafer that are substantially aligned with the openings are radiated; and removing the sapphire substrate along with un-radiated portions of the semiconductor layer, thereby separating the plurality of LED dies into individual LED dies.

Still another of the broader forms of the present disclosure involves a method of fabricating an LED device. The method includes: providing a sapphire substrate having a semiconductor layer formed thereon; forming a patterned photoresist layer over the semiconductor layer, the photoresist layer having an opening therein; forming a conductive component in the opening; and radiating a first portion of the sapphire substrate with a laser, the first portion of the sapphire substrate being aligned with the conductive component; wherein: a second portion of the sapphire substrate that is aligned with the patterned photoresist layer is not radiated; in response to the radiating, the first portion of the sapphire substrate becomes separated from a first portion of the semiconductor layer therebelow, the first portion of the semiconductor layer being aligned with the conductive component; and the second portion of the sapphire substrate remain coupled to a second portion of the semiconductor layer therebelow after the radiating, the second portion of the semiconductor layer being aligned with the patterned photoresist layer.

The foregoing has outlined features of several embodiments so that those skilled in the art may better understand the detailed description that follows. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.