This disclosure concerns memory kink checking. One embodiment includes selectively applying one of a plurality of voltages to a first data line according to a programming status of a first memory cell, wherein the first memory cell is coupled to the first data line and to a selected access line. An effect on a second data line is determined, due at least in part to the voltage applied to the first data line and a capacitive coupling between at least the first data line and the second data line, wherein the second data line is coupled to a second memory cell, the second memory cell is adjacent to the first memory cell, and the second memory cell is coupled to the selected access line. A kink correction is applied to the second data line, responsive to the determined effect, during a subsequent programming pulse applied to the second memory cell.

Claims

13 · 2 independent · depth 3

13 granted claims

›1.independentA method for operating a memory device, comprising:nperforming a first kink check before applying a programming pulse including:nfloating first data l…+8

›2.↳ 1The method of claim 1, wherein sensing the second data lines includes sensing the second data lines for kink.d2

›3.↳ 1The method of claim 1, wherein selectively applying one of the plurality of voltages to the data lines includes:napplying a first voltage when the pro…d2

›4.↳ 1The method of claim 1, wherein sensing the first data lines includes sensing a voltage on the first data lines due at least in part to capacitive coup…d2

›5.↳ 1The method of claim 1, wherein sensing the second data lines includes sensing a voltage on the second data lines due at least in part to capacitive co…d2

›6.↳ 1The method of claim 1, wherein the method includes applying the programming pulse to the access line while applying kink correction to at least one of…d2+2

›9.↳ 1The method of claim 1, wherein the method includes performing the first and the second kink check before every programming pulse.d2

›10.independentA memory device, comprising:nmemory cells coupled to an access line;data lines, each associated with a respective one of the memory cells;control circ…+3

Classifications

3 codes

IPC · International Patent Classification

Section G — Physics

G11C11/34

USPC · US Patent Classification

365/185.2365/185.18

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Douglas King

art unit 2824 · TC 2800

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Type	Document	Date
related publication	US 20130294156 A1	7 Nov 2013

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