USPatentGranted

Method and apparatus for power throttling in a microprocessor using a closed loop feedback system

Granted 11 Dec 2001 · no office action yet

Application
183255
filed 30 Oct 1998
Publication
Not published
not published
Patent· this page
US 6,330,680
granted 11 Dec 2001

Life of the patent

3 dated events
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Abstract

A method and apparatus for power throttling in a microprocessor. A voltage source supplies voltage to the microprocessor, and a clock source operates the microprocessor at a desired frequency. In one embodiment, a power monitor is configured to measure the short term power consumption of the microprocessor. In another embodiment, a temperature sensor measures the temperature of the microprocessor. Control logic is coupled to the voltage source and the clock source. The control logic receives an indication of the power consumption or temperature, as applicable, and compares it to a predetermined value. In response to the comparison, the control logic varies the supply voltage and the frequency.

Claims

26 · 4 independent · depth 3
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26 granted claims

Classifications

2 codes
USPC · US Patent Classification
713/322702/132

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Pendency
3.1 y
1,138 days filing → grant
Office actions
0
on the grant's record
Examiner
Paul R. Myers
art unit —
Citations: 34 back · 1 forward

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