Apparatuses and methods including memory and operation of same

An apparatus, comprising: a memory cell; a first memory access line coupled to the memory cell; and a second memory access line coupled to the memory cell, wherein the first and second memory access lines are configured to provide a write pulse having a first or second polarity across the memory cell, wherein, during a read operation, the memory cell is determined to be in a first or second logic state based on a current through the memory cell responsive to a read pulse having the first polarity applied to the memory cell, wherein the current is provided through the memory cell responsive to one of first and second threshold voltages exhibited by the memory cell during the read operation on the memory cell, and wherein, during the read operation, the memory cell is determined to be in the first logic state if the current through the memory cell responsive to the first threshold voltage of the memory cell is equal to or above a threshold current, or determined to be in the second logic state if the current through the memory cell responsive to the second threshold voltage of the memory cell is below the threshold current.