Copper fuse for integrated circuit

1. Field of Invention

The present invention relates to a semiconductor structure in integrated circuit (IC). More particularly, the present invention relates to a copper fuse of semiconductor structure for IC.

2. Description of Related Art

As the design rule of the semiconductor process approaches or is less than 0.18 μm, copper gradually replaces aluminum as an interconnect in the metallization process since copper has lower resistance that can reduce RC delay. However, copper easily reacts with the oxygen in the surroundings to form a thin copper oxide on its surface, which leads to the failure of electrical contact. As a result, it is difficult to substitute copper for aluminum when forming a fuse in an IC as, in the IC industry, at the current line width.

The invention provides a structure of a copper fuse in an IC, by which structure RC delay is reduced.

As embodied and broadly described herein, the invention provides a structure of a copper fuse for an IC, which fuse includes two copper pads formed on a semiconductor substrate where the copper pads are isolated from each other with dielectrics. A metal line formed over the semiconductor substrate covers the two metal pads wherein one end of the metal line is connected to one of the two copper pads and the other end of the metal line is connected to the other of the two copper pads. A passivation layer formed over the semiconductor substrate covers the two copper pads.

It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings,

FIG. 1 is a schematic, cross-sectional view illustrating a structure of a copper fuse according to one preferred embodiment of this invention; and

FIG. 2 is a schematic, top view of FIG. 1, where the cross-sectional view along the line I—I is shown in FIG. 1 .

Referring to FIG. 1, after the formation of a MOS device and contact (not shown), a tungsten plug is subsequently formed in the device region 100 a of an IC structure. Such metallization processes as wiring line and vias are carried out by damascene, for example, where the wiring lines and the vias are isolated from with dielectrics 102 . Thereafter, a passivation layer 104 a is deposited and then patterned by photolithography to form a pad window such that a metal pad 106 a made of copper, for example, is exposed. A barrier layer 108 a such as TiN or TaN is formed on the metal pad layer 106 a . An aluminum layer 110 a is formed and patterned to complete the wire bonding process of the device region 100 a for the back-end process of the IC.

Referring to FIG. 1 and FIG. 2 simultaneously, a copper fuse set up in the peripheral region 100 b is first to form two metal copper pads 106 b in the dielectrics 102 . The two copper pads 106 b connected to corresponding devices (not shown) are formed by damascene, for example, when the metal pad 106 a is formed. Thereafter, the passivation layer 104 b is formed when the passivation layer 104 a is formed in order to cover the two copper pads 106 b . The passivation layer 104 b can be silicon oxide/silicon nitride, for example. As the passivation layer 104 a in the device region 100 a is patterned, photolithography is also employed to form an opening 112 in the passivation layer 104 b so that the two copper pads are exposed. A barrier layer 108 b such as TiN or TaN formed by sputtering is then formed on the copper pads 106 b . A metal layer 110 b is formed by sputtering to cover the copper pads 106 b to electrically connect the two copper pads 106 b . The barrier layer 108 b is used to improve the adhesion of the copper pads 106 b and the metal layer 110 b, and the metal layer 110 b can be aluminum, for example. Thereafter, the metal layer 110 b and the barrier layer 108 b are patterned to form parallel fuses, as shown in FIG. 2 . One end of the metal layer 110 b is connected to one copper pad 106 b and the other end of the metal layer 1106 b is connected to the other copper pad 106 b.

The two copper pads 106 b and the metal line 110 b constitute the copper fuse structure of the preferred embodiment in the invention. The copper pads 106 b are electrically insulated and electrically connected by the metal layer 110 b. Therefore, when any one of the fuses in FIG. 2 must be disconnected, the metal line 110 b can be blown off by laser power such that the copper pads 106 b can be prevented from being damaged.

The copper pads 106 b in this embodiment is covered by the passivation layer 104 b and the metal layer 110 b so that the copper pads 106 b are isolated from the air. When the back end process is complete, the copper pads 106 b are not exposed. Therefore, oxidation on the surface of the copper pads 104 b can be avoided. In addition, the copper pads are used as a portion of the fuses, thereby reducing RC delay.

Moreover, the process to form the copper fuses in this embodiment is compatible with the back-end process of the device region 100 a for IC structure. Thus, the manufacturing cost does not increase.

The copper fuse structure utilizes an aluminum metal line to cover and electrically connect to the two copper pads. The copper pads serve as a part of the fuses to reduce RC delay, and in addition, the fuse is disconnected by blowing off the aluminum line. Moreover, the aluminum line and the passivation layer covering the copper pads is capable of preventing the copper pads from being oxidized by air.

It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.