RS-232 bus data tap apparatus

1. Field of the Invention

The present invention relates generally to apparatus for monitoring a data bus. In particular, the present invention relates to an apparatus which allows a notebook computer or the like to monitor data transmission via an RS-232 bus.

2. Description of the Prior Art

There is currently a need to monitor communications or data transmission between data terminal equipment and data set equipment which takes place over an RS-232 bus. While it is relatively simple to monitor transmit or receive data independently, it is very difficult to monitor both transmit and receive communications simultaneously.

Commercially available monitoring systems generally monitor communications via the RS-232 bus in only one direction, either transmit data or receive data is monitored, but not data transmission in both directions. Generally, RS-232 bus monitoring devices are relatively simple wire taps or tees.

There is, however, a need for a monitoring apparatus which allows the user to simultaneously monitor transmit and receive data of half duplex communications taking place over a full duplex RS-232 bus with a single port RS-232 connection to a personal computer.

The present invention overcomes some of the difficulties of the past including those mentioned above in that it comprises a relatively simple in design yet highly effective and efficient monitoring apparatus for use in monitoring data communications via the RS-232 bus between data terminal equipment and data set equipment.

The monitoring apparatus of the present invention allows the user to monitor transmit and receive data of half duplex communications taking place over a full duplex RS-232 bus and also monitor full duplex communications on the RS-232 bus. The monitoring apparatus includes six switching transistors which are turned on and off depending on input voltage levels appearing at the transmit and receive lines input to the monitoring apparatus from the RS-232 bus. Turning on and off the switching transistors enables a computer, lap top or other device connected to the monitoring apparatus to receive and process data communications on the RS-232 bus.

FIG. 1 is a simplified electronics diagram illustrating an RS-232 bus having an active tap electronics device connected thereto; and

FIG. 2 is a detailed electronics diagram of the active tap electronics device of FIG. 1 which comprises a preferred embodiment.

Referring first to FIG. 1, there is shown a simplified electronics diagram of an RS-232 bus 10 which allows for communications between a data terminal equipment (DTE) via port 12 and data set equipment (DSE) via port 14 . Connected to the RX (pin 2 ), TX (pin 3 ) and GND (pin 5 ) lines of RS-232 bus 10 is an active tap electronics circuit 16 which monitors data transmission between the data terminal equipment and the data set equipment. Data terminal equipment is a control system or a computer, while data set equipment may be, for example a modem. The RS-232 bus 10 of FIG. 1 is a full duplex communications system which allows the data terminal equipment to send data to the data set equipment and the data set equipment to send data to the data terminal equipment at the same time. The RS-232 bus 10 can also operate as a half duplex system whereby the data terminal equipment first sends data to the data set equipment, followed by a response from the data set equipment to the data terminal equipment. When bus 10 is operating in the half duplex mode, the active tap electronics circuit 16 monitors transmitted communications to the data set equipment or port 14 and the received communications from the data set equipment to port 12 .

RS-232 bus 10 includes a TX line which is a transmit data line, an RX line which is a receive data line, a ground, a Request to Send (RTS), and a Clear to Send (CTS). The DTR line via port 18 supplies positive power to the active tap electronics circuit 16 . The TX line of port 18 supplies negative power to the active tap electronics circuit 16 . The RX line of port 18 is the monitor input from the active tap electronics circuit 16 . The DSR line of port 18 remains open to insure that the TX line of port 18 is the mark state which is a signal of having a voltage range of from −3 VDC to −20 VDC.

At this time it should be noted that only one input to the active tap electronics circuit 16 is allowed to be active, while the other input must be in the mark state, i.e. −3 VDC to −20 VDC. It should also be noted that when monitoring full duplex communications, either the TX or RX input must be disabled, i.e. switched to the marked state to prevent an echo from the sent data from distorting the monitoring of that data.

Ports 12 , 14 and 18 are connectors with ports 12 and 18 each being a 9 pin female connector and port 14 being a 9 pin male connector. A notebook, desk top or lap top computer can be connected to port 18 to receive and process the data being monitored by active tap electronics circuit 16 . The computer or other device connected to port 18 operates only in a receive mode of operation and does not transmit data. The DTR line of port 18 is at a positive voltage which is the active voltage polarity for the data terminal ready line of a computer or terminal during normal RS-232 bus operation. A software program such as HyperTerminal which is included in Microsoft's Windows 95 can be used to effect the active voltage polarity at the data terminal ready line of port 18 .

The transistor Q 1 , Q 2 and Q 6 used in the preferred embodiment of the present invention are 2N2222 NPN transistors commercially available from Motorola of Austin, Tex. The transistors Q 3 , Q 4 and Q 5 are 2N2907 PNP transistors also commercially available from Motorola. Transistors Q 1 , Q 2 , Q 3 , Q 4 , Q 5 and Q 6 are switching transistors which are designed to operate high voltages, i.e. thirty to forty volts. Resistors R 1 and R 2 are 20 k-ohm resistors, resistors R 3 and R 4 are 5 k-ohm resistors, resistors R 6 and R 7 are 200 ohm resistors, resistor R 5 is a 2 k-ohm resistor and resistor R 8 is a 10 k-ohm resistor. Capacitors C 1 and C 2 are one microfarad capacitors.

Referring to FIG. 2, there are three lines, the TX line, the RX line and ground connected to the active tap electronics circuit 16 . When RS-232 bus 10 is inactive, that is there is no transfer of data, the TX line is in a mark state and the RX output (port 18 ) of circuit 16 is also in a mark state.

When either the TX line or the RX line of bus 10 transition to a space state which includes a start bit of +3 VDC to +20 VDC, transistor Q 1 or transistor Q 2 will turn on. Turning on either transistor Q 1 or transistor Q 2 turns on transistor Q 5 . The voltage at the DTR (data terminal ready) line of circuit 16 is transferred through resistor R 6 and transistor Q 5 to the RX line of port 18 resulting in a high voltage (+3 VDC to +20 VDC) at the RX line of port 18 .

A monitoring device, such as a computer supplies high voltage power (+3 VDC to +20 VDC) to the DTR line of circuit 16 . The monitoring device is also connected to the RX line of port 18 . The voltage drop across R 6 is negligible since R 6 is a 200 ohm resistor and the input impedance to the RX line of port 18 is a minimum of 3 k-ohms to 7 k-ohms.

When a positive voltage is supplied to the base of transistor Q 1 , transistor Q 1 is turned on. The collector of transistor Q 1 is now at ground potential which results in the resistor R 3 and the base of transistor Q 5 also being at ground potential. This turns on transistor Q 5 .

When transistor Q 5 turns on the current flow path is from the DTR line, port 18 through resistor R 6 , the emitter base junction of transistor Q 5 and resistor R 3 , and then through the collector emitter junction of transistor Q 1 to ground. The positive voltage at the DTR line of port 18 passes through transistor Q 5 and appears at the RX line of port 18 of circuit 16 .

When the TX line and the RX line of port 12 are a negative voltage, or a mark state, transistors Q 1 and Q 2 are turned off. A negative voltage supplied to transistors Q 3 and Q 4 , turns on transistors Q 3 and Q 4 . When transistors Q 3 and Q 4 are turned on a ground potential is applied to resistor R 4 . The ground potential at resistor R 4 turns on transistor Q 6 . There is a negative voltage at the TX line of port 18 which is then passes through transistor Q 6 to the RX line of port 18 .

Resistors R 3 and R 4 are current limiting resistors which prevent large voltages from being applied across the emitter base junctions of transistors Q 5 and Q 6 , thereby preventing damage to transistors Q 5 and Q 6 .

When either the TX line of port 12 or the RX line of port 12 is high, transistor Q 1 or transistor Q 2 is turned on and transistor Q 3 or transistor Q 4 is turned off. When either transistor Q 3 or transistor Q 4 is turned off, there is no current flow through the emitter base junction of transistor Q 6 and transistor Q 6 is turned off. Since either transistor Q 1 or transistor Q 2 is turned on, transistor Q 5 will be turned on which results in a positive voltage being provided to the RX line of port 18 .

At this time it should be noted that only transistor Q 5 or transistor Q 6 will be turned on, transistors Q 5 and Q 6 can not be turned on simultaneously without destroying the transistors.

Whenever port 12 is not connected to RS-232 bus 10 the TX and RX lines of port 12 are floating. This results in transistors Q 1 , Q 2 , Q 3 and Q 4 being turned off, which, in turns off transistors Q 5 and Q 6 . The RX output of port 18 is at the ground state since the ground applied to resistor R 8 is provided to the RX output of port 18 .

Referring to FIGS. 1 and 2, when RS-232 bus 10 is in a full duplex mode of operation, either the TX line or the RX line of port 12 must be disabled. Circuit 16 includes a switch S 1 which is set to its A terminal to disable the TX line of port 12 and its C terminal to disable the RX line of port 12 . Setting the switch S 1 to its A terminal disables transistor Q 1 since a negative voltage is applied to transistor Q 1 and turns on transistor Q 3 . In a like manner, setting the switch S 1 to its C terminal disables transistor Q 2 since a negative voltage is applied to transistor Q 2 and turns on transistor Q 4 . Terminal B of switch S 1 is a floating terminal. Resistor R 5 is a current limiting resistor which protects transistors Q 3 and Q 4 .

When RS-232 bus 10 is in a full duplex mode of operation, the transmitted commands from port 12 , are echoed back by the receive device connected to port 14 . This requires the user of active tap electronics circuit 16 to disable the TX line by setting the switch S 1 to its A terminal so that only the RX line is being monitored. This allows the user to monitor the echo of the transmitted data and the response to the transmitted data provided by the receive device or data set equipment.

When the only line being utilized to transmit and receive data is the TX line of RS-232 bus 10 , the user can disable the RX line at port 12 of circuit 16 by setting the switch S 1 to the its C terminal.

From the foregoing, it may readily be seen that the present invention comprises a new, unique and exceedingly useful RS-232 bus data tap apparatus for monitoring data transmission on an RS-232 bus which constitutes a considerable improvement over the known prior art. Obviously, many modifications and variations of the present invention are possible in light of the above teachings. It is, therefore to be understood that within the scope of the appended claims that the invention may be practiced otherwise than as specifically described.