Optical detector apparatus

This application claims the benefit of priority to Japanese patent application 2000-161421 filed on May 31, 2000.

1. Field of the Invention

The present invention generally relates to optical detector apparatuses for detecting motion. More specifically, the present invention relates to an optical detector apparatus for detecting motion, in which voltage signals having different phases A and B, generated in response to light signals, are converted into binary signals with a high accuracy.

2. Description of the Related Art

FIG. 4A is a circuit diagram of a first conventional detector apparatus. The detector apparatus is used for detecting the distance and direction of motion, for example, rotation of a ball mounted in a mouse apparatus (not shown) which allows inputs to a computer.

The mouse apparatus includes the ball, orthogonal shafts (not shown) rotatably supported and engaged with the ball, encoder disks (not shown) each provided on one end of the associated shaft and each having slits radially formed with a predetermined pitch in a circumferential direction, light emitting devices each opposing one face of the associated encoder disk, and light receiving devices opposing the other face of the associated encoder disk.

When the mouse apparatus is moved, generating rotation of the ball, the shafts rotate in response. Light emitted from each of the light emitting devices provided on one side of the associated encoder disk partially transmits through the slits of the associated encoder disk to reach the light receiving devices provided on the other side of the associated encoder disk.

Referring to FIG. 4A , one of the light emitting devices 2 , one of the light receiving devices 3 , and wave-shaping circuits 5 and 6 are shown. The light emitting device 2 is typically implemented by a light emitting diode. The light receiving device 3 includes a pair of light receiving elements 3 a and 3 b each implemented by a phototransistor.

Emitter terminals 3 e and 3 e ′ of the light receiving elements 3 a and 3 b are connected to the reference voltage R, respectively, via resistors 4 and 4 ′ having the same value of resistance. The wave-shaping circuits 5 and 6 are provided subsequent to the resistors 4 and 4 ′.

The wave-shaping circuits 5 and 6 include two binarization circuits 5 A and 6 A primarily implemented by comparators. The emitter terminals 3 e and 3 e ′ of the light receiving elements 3 a and 3 b are connected to non-inverting input terminals 5 a and 6 a of the binarization circuits 5 A and 6 A, respectively. The emitter terminals 3 e and 3 e ′ of the light receiving elements 3 a and 3 b are connected via resistors 7 and 7 ′ having the same value of resistance, and the node 7 a between the resistors 7 and 7 ′ is connected to the reference potential via a capacitor 8 . The node 7 a is also connected to inverting input terminals 5 b and 6 b of the binarization circuits 5 A and 6 A. Output terminals 5 c and 6 c of the binarization circuits 5 A and 6 A are connected to the non-inverting inputs 5 a and 6 a thereof, respectively, via resistors having a predetermined value of resistance, so that positive feedback is provided.

When the light receiving elements 3 a and 3 b detect light from the light emitting device 2 , currents flow in the direction from the collector terminal 3 c to the emitter terminals 3 e and 3 e ′. The currents flow through the resistors 4 and 4 ′ to cause voltage drops, thereby generating a voltage signal Sa of phase A and a voltage signal Sb of phase B. As shown in FIG. 5 , the voltage signals form sine waves in synchronization with the light signals received by the light receiving elements 3 a and 3 b , the amplitudes thereof corresponding to the intensity of the light signals. The voltage signals Sa and Sb have a difference in phase due to the positional difference between the light receiving elements 3 a and 3 b . For example, if the ball rotates in a first direction, the voltage signal Sb is 90 degrees behind the voltage signal Sa, whereas if the ball rotates in a second direction opposite to the first direction, the voltage signal Sa is 90 degrees behind the voltage signal Sb.

The resistors 7 and 7 ′ and the capacitor 8 constitute an integral smoothing circuit. The integral smoothing circuit integrally smoothes the voltage signals Sa and Sb together, a voltage obtained by smoothing being input, as a threshold voltage, to the inverting input terminals 5 b and 6 b of the binarization circuits 5 A and 6 A. Then, the binarization circuits 5 A and 6 A convert the voltage signals Sa and Sb input to the non-inverting terminals 5 a and 6 a into binary signals with reference to the threshold voltage V TH .

For example, the binarization circuit 5 A outputs a high-level signal when the voltage signal Sa is larger than the threshold voltage V TH , and outputs a low-level signal when the voltage signal Sa is smaller than the threshold voltage V TH . Accordingly, the voltage signals Sa and Sb are respectively converted into high-or-low binary signals.

FIG. 4B is a circuit diagram of another conventional detector apparatus. As opposed to the detector apparatus shown in FIG. 4A , the binarization circuits 5 A and 6 A respectively have integral smoothing circuits 9 A and 9 B. The voltage signals Sa and Sb are integrally smoothed in the integral smoothing circuits 9 A and 9 B, respectively, to generate threshold voltages V T1 and V T2 . The binarization circuits 5 A and 6 A converts the voltage signals Sa and Sb into binary signal Da and Db with reference to the threshold voltages V T1 and V T2 , respectively.

However, the conventional-detector apparatuses suffer the following problems.

The light emitting device 2 and the light receiving device 3 exhibit performance variations due to temperature changes, degradation over time, response characteristics of the light receiving device 3 , and difference in dimension and sensitivity between the light receiving elements 3 a and 3 b . In addition, if the light emitting device 2 and the light receiving device 3 are not mounted at precise positions on a substrate in the mouse apparatus, the characteristics of the voltage signals Sa and Sb are likely to change, causing variations in output signal characteristics.

For example, if the light receiving elements 3 a and 3 b have quite different characteristics, as shown in FIG. 6 , the voltage signal Sa may be positively biased while the voltage signal Sb is negatively biased.

In the conventional detector apparatus shown in FIG. 4A , the mean voltage of the threshold voltage V T1 for the voltage signal Sa and of the threshold voltage V T2 for the voltage signal Sb serves as the threshold voltage V TH for both of the signals. In this case, the voltage signal Sb does not cross the threshold voltage V TH , inhibiting generation of the binary signal Db. That is, if there is a large disparity between the threshold voltage V T1 for the voltage signal Sa and the threshold voltage V T2 for the voltage signal Sb, the voltage signals Sa and Sb are not properly binarized.

In the detector apparatus shown in FIG. 4B , the threshold voltages V T1 , and V T2 are obtained by integrally smoothing the respective voltage signals Sa and Sb. Thus, when the voltage signals Sa and Sb are not input, i.e., when the mouse apparatus is not moved, power supply noise, external floating noise, etc. are binarized with reference to the threshold voltages V T1 , and V T2 obtained the power supply noise, external floating noise, etc. Thus, the detector apparatus is overly sensitive and detects small disturbances such as the power supply noise, external floating noise, etc., converting undesired signals into binary signals.

Therefore, the conventional detector apparatuses have required complex adjustment on a product-by-product basis in order to avoid component characteristic variations and component displacements and to thereby ensure adequate performance.

Accordingly, it is an object of the present invention to provide a detector apparatus in which adjustment on a product-by-product basis is not required and in which a plurality of signals having different phases are converted into binary signals with a high accuracy.

To this end, the present invention provides a detector apparatus including a movable member having light-transmitting regions disposed with a predetermined pitch and light-blocking regions between adjacent light-transmitting regions; a pair of photoelectric elements for detecting light signals passing through the light-transmitting regions of the movable member and thereby generating corresponding voltage signals in different phases A and B; and a pair of wave-shaping circuits for generating binary signals in accordance with the voltage signals, the binary signals allowing recognition of direction of movement. In the detector apparatus, one of the pair of wave-shaping circuits, which receives the voltage signal of phase A, and the other of the pair of wave-shaping circuits, which receives the voltage signal of phase B, generate the binary signals using voltages obtained by smoothing the voltage signals as threshold voltages.

Preferably, in the detector apparatus, the pair of wave-shaping circuits is provided with an offset setting unit for providing an offset to the voltages obtained by smoothing the voltage signals, and generates the binary signals using threshold voltages obtained by using the offset.

More preferably, the offset setting unit provides the offset by lowering the mean voltage of the voltage signal of phase A and the voltage signal of phase B and smoothing the lowered voltage, the offset being added to or subtracted from the voltages obtained by smoothing the voltage signals.

Also, it is preferable that the movable member is an encoder disk, on which the light-transmitting regions and the light-blocking regions alternates in a circumferential direction; a light emitting unit being disposed opposing one face of the encoder disk, and the pair of photoelectric elements for generating the voltage signals of the phases A and B being disposed opposing the other face thereof.

More preferably, in the detector apparatus, a spherical rotatable member, the encoder disk which rotates about an X axis in response to rotation of the spherical rotatable member, and the encoder disk which rotates about a Y axis perpendicular to the X axis are provided, the pair of photoelectric elements for generating the voltage signals of the phases A and B being individually provided for each of the encoder disks, and movement in the X-Y coordinate system, corresponding to the direction of rotation of the spherical rotatable member, being detected based on the voltage signals of the phases A and B from the pair of photoelectric elements corresponding to one of the encoder disks and the voltage signals of the phases A and B from the pair of photoelectric elements corresponding to the other encoder disk.

In accordance with the present invention, when the voltage signals of phases A and B are converted into binary signals, the threshold voltage is obtained, for example, by adding a voltage, obtained by lowering the mean voltage of the voltage signal of phase A and the voltage signal of phase B and smoothing the lowered voltage, to the voltage signal of phase A and the voltage signal of phase B, respectively. Thus, binary signals can be properly obtained even when the voltage signals significantly varies. Therefore, less structural adjustment is required when the light emitting device and the photoelectric device have component characteristic variations and when the components are not precisely mounted. In addition, even when light receiving elements corresponding to phase A and phase B in a single photoelectric device have different characteristics, the difference is offset, and the voltage signals of phase A and phase B are accurately converted into binary signals.

Furthermore, the threshold voltages can be set above the level of disturbances such as power supply noise. Thus, generation of undesired binary signals is prevented, particularly when no voltage signals of phase A and phase B are output.

FIG. 1 is a schematic plan view of detector portion incorporated in, for example, a mouse apparatus;

FIG. 2 is a diagram showing the configuration of a detector apparatus according to an embodiment of the present invention;

FIG. 3 is a waveform chart showing input signals and output signals of the detector apparatus shown in FIG. 2 ;

FIGS. 4A and 4B show the configurations of circuits incorporated in conventional detector apparatuses;

FIG. 5 is a waveform chart illustrating an ideal signal conversion; and

FIG. 6 is a waveform chart illustrating a signal conversion when an input signals of different levels are input to a conventional detector apparatus.

A preferred embodiment of the present invention will now be described with reference to the accompanying drawings.

Referring first to FIG. 1 , a detector portion of a mouse apparatus 10 includes a ball 11 , shafts 15 A and 15 B, encoder disks 14 A and 14 B, light emitting units 12 A and 12 B implemented by light emitting diodes (LEDs), and light receiving units 13 A and 13 B.

The ball 11 is rotatably supported in contact with the shafts 15 A and 15 B. The shafts 15 A and 15 B are orthogonally disposed, and are supported so as to rotate about a vertical axis (Y direction) and a horizontal axis (X direction), respectively, in response to rotation of the ball 11 . Each of the light emitting units 12 A and 12 B is disposed opposing one face of the associated encoder disk 14 A and 14 B, while each of the light receiving units 13 A and 13 B is disposed opposing the other face thereof. Each of the encoder disks 14 A and 14 B includes a plurality of slits radially formed on the outer end portion thereof with a predetermined pitch; that is, light-transmitting regions and light-blocking regions alternate in a circumferential direction. The encoder disks 14 A and 14 B rotate in association with the shafts 15 A and 15 B, and thereby transmit or block, in accordance with rotation of the ball 11 , light signals from the light emitting units 12 A and 12 B, respectively.

Referring next to FIG. 2 , which is a circuit diagram of a detector apparatus according to an embodiment of the present invention, each of the light receiving units 13 A and 13 B includes a pair of photoelectric elements 13 a and 13 b implemented by phototransistors. The photoelectric elements 13 a and 13 b are provided within a single package at different positions relative to the associated light emitting unit 12 A or 12 B. The collector terminals of the photoelectric elements 13 a and 13 b are connected to a power supply voltage V cc . The emitter terminals of the photoelectric elements 13 a and 13 b are connected to a reference voltage G via resistors R 1 and R 1 ′, and to input terminals 10 a and 10 b of a wave-shaping circuit 20 , respectively.

The wave-shaping circuit includes a plurality of resistors, a plurality of capacitors, and binarization circuits implemented by two comparators 21 and 22 . The input terminals 20 a and 20 b of the wave-shaping circuit 20 are connected to non-inverting input terminals 21 a and 22 a of the comparators 21 and 22 , respectively. To inverting input terminals 21 b and 22 b of the comparators 21 and 22 , a first integral smoothing circuit 23 and a second integral smoothing circuit 24 are connected, respectively. The first integral smoothing circuit 23 is implemented by a resistor R 3 and a capacitor C 1 , and the second integral smoothing circuit 24 is implemented by a resistor R 3 ′ and a capacitor C 2 . The input ends of the first and the second integral smoothing circuits 23 and 24 are connected to the input terminals 20 a and 20 b of the wave-shaping circuit 20 , and the output ends thereof are connected to the inverting input terminals 21 b and 22 b of the comparators 21 and 22 , respectively. The inverting input terminals 21 b and 22 b and output terminals 21 c and 22 c of the comparators 21 and 22 are connected via resistors R 7 and R 7 ′, respectively, providing positive feedback to the comparators 21 and 22 . The output terminals 21 c and 22 c of the comparators 21 and 22 are connected to the output terminals 20 c and 20 d of the wave-shaping circuit 20 , respectively.

The input terminals 20 a and 20 b of the wave-shaping circuit 20 are connected via resistors R 2 and R 2 ′. The node a between the resistors R 2 and R 2 ′ is connected to the reference voltage G via resistors R 4 and R 5 connected in series. The node b between the resistors R 4 and R 5 is connected to the capacitors C 1 and C 2 via resistors R 6 and R 6 ′, respectively. The resistor R 6 and the capacitor C 1 constitutes a third integral smoothing circuit 25 , and the resistor R 6 ′ and the capacitor C 2 constitutes a fourth integral smoothing circuit 26 .

The operation of the detector apparatus will be described below.

When the mouse apparatus 10 is moved, the ball 11 , the shafts 15 A and 15 B, and encoder disks 14 and 14 rotate in turn. The photoelectric elements 13 a and 13 b of each of the light receiving units 13 A and 13 B receive signals of light emitted from the associated light emitting unit 12 A or 12 B and passing through the slits of the associated encoder disk 14 A or 14 B. Then, currents in accordance with the light signals flow through the resistors R 1 and R 1 ′, generating voltage signals in accordance with the currents. The photoelectric element 13 a generates a voltage signal Sa of phase A, and the photoelectric element 13 b generates a voltage signal Sb of phase B. The voltage signals Sa and Sb are in synchronization with the light signals, and the amplitudes thereof are in accordance with the intensity of the light signals.

The voltage signals Sa and Sb differ in phase due to the difference of positions between the photoelectric element 13 a and the photoelectric element 13 b . For example, when the mouse apparatus 10 is moved in the direction X 1 , with regard to the light receiving unit 13 A, the voltage signal Sa is ahead of the voltage signal Sb in terms of phase. Conversely, if the mouse apparatus 10 is moved in the direction X 2 , the voltage signal Sb is ahead of the voltage signal Sa in terms of phase. When the mouse apparatus 10 is moved in the direction Y 1 or Y 2 , the similar relationship appears between the voltage signals Sa and Sb with regard to the light receiving unit 13 B.

Thus, movement of the mouse apparatus 10 can be detected based on the phase relationship between the voltage signals Sa and Sb for each of the light receiving units 13 A and 13 B.

By way of example, if the reference potential G is half of the power supply voltage V cc , the voltage signals Sa and Sb respectively form sine waves with the reference potential G being the center amplitude. The voltage signal Sa is integrally smoothed in the first integral smoothing circuit 23 , and the voltage signal Sb is integrally smoothed in the second integral smoothing circuit 24 .

The resistors R 2 and R 2 ′ have the same value of resistance, and the resistors R 1 and R 1 ′ have the same value of resistance, the resistance value of R 2 and R 2 ′ being much greater than the resistance value of R 1 and R 1 ′. Thus, at the node a, the voltage signal Sa and the voltage signal Sb are added, and the amplitude of the added signal is substantially halved, so a mixed signal Sc is obtained. At the node b, the amplitude of the mixed signal Sc is divided to half by the resistors R 4 and R 5 , so that a low-voltage signal Sd is obtained. The low-voltage signal Sd is input to the third and the fourth integral smoothing circuits 25 and 26 . Note that the resistors R 4 and R 5 may also be set such that Sd is much smaller than Sc rather than merely half of Sc. Examples may include Sd being about ¼, {fraction (1/10)}, {fraction (1/20)}, or {fraction (1/100)} of Sc. The resistors R 4 and R 5 may be discrete components such as individual resistors or a potentiometer, or may be integrated into a composite circuit board containing other of the elements.

Accordingly, a voltage obtained by integrally smoothing the low-voltage signal Sd in the third integral smoothing circuit 25 is added, as an offset, to a voltage obtained by integrally smoothing the voltage signal Sa in the first integral smoothing circuit 23 , so that a first threshold voltage V T1 is input to the inverting input terminal 21 b of the comparator 21 . A voltage obtained by integrally smoothing the low-voltage signal Sd in the fourth and integral smoothing circuit 26 is added, as an offset, to the voltage signal Sa integrally smoothed in the second integral smoothing circuit 24 , so that a second threshold voltage V T2 is input to the inverting input terminal 22 b of the comparator 22 . That is, the resistors R 2 and R 2 ′, the resistors R 4 and R 5 , and the third and the fourth integral smoothing circuits 25 and 26 constitute an offset setting unit.

If the voltage signals Sa and Sb have the same amplitude with the V cc /2 being the center thereof, as shown in FIG. 3 , the voltages obtained by integrally smoothing the voltage signals Sa and Sb are both V cc /2. The first and the second threshold voltages V T1 , and V T2 are obtained by adding the low-voltage signal Sd, as an offset, to a voltage obtained by integrally smoothing the voltage signals Sa and Sb. Thus, in this case, the first and the second threshold voltages V T1 and V T2 are the same as the low-voltage signal Sd. That is, the first and the second threshold voltages V T1 and V T2 change in accordance with the amplitudes of the voltage signals Sa and Sb, allowing flexible setting of appropriate threshold voltages.

Even when the amplitude and reference voltage differ between the voltage signals Sa and Sb, in a manner similar to the above, the first and the second threshold voltages V T1 , and V T2 are respectively set based on the voltage signals Sa and Sb.

The offset is relatively small compared with the voltages obtained by integrally smoothing the voltage signals Sa and Sb. Thus, the first and the second threshold voltages V T1 , and V T2 are not deviated much from the expected threshold voltages. Thus, the voltage signals Sa and Sb can be binarized using appropriate threshold voltages as the first and the second threshold voltages V T1 and V T2 .

When the mouse apparatus 10 is not in motion, power supply noise may occur. In that case, the first and the second threshold voltages V T1 , and V T2 input to the inverting input terminals 21 b and 22 b of the comparators 21 and 22 are obtained by adding a low-voltage signal Sd′ corresponding to the power supply noise to a mixed signal Sc′ corresponding to the power supply noise. Thus, the first and the second threshold voltages V T1 , and V T2 are set above the level of ripple of the power supply noise. Accordingly, the comparators 21 and 22 are prevented from operating in response to the power supply noise and other disturbances, inhibiting undesired binary signals from being generated.

In the above-described detector apparatus, a high-level signal is output when the voltage signal Sa is higher than the first threshold voltage V T1 , and when the voltage signal Sb is higher than the second threshold voltage V T2 , whereas a low-level signal is output when the voltage signal Sa is lower than the first threshold voltage V T1 , and when the voltage signal Sb is lower than the threshold voltage V T2 .

Binary signals Da and Db thus obtained from the voltage signals Sa and Sb are respectively output from the input terminals 20 a and 20 b of the wave-shaping circuit 20 , and are fed to a computer via an interface (not shown). The computer determines the distance and direction of movement of the mouse apparatus 10 based on the binary signals Da and Db, and accordingly moves a cursor or the like displayed on a monitor.

In the above-described embodiment, the threshold voltages V T1 , and V T2 are dynamically changed in accordance with the voltage signals Sa and Sb, so that the wave-shaping circuit 20 dynamically adjusts to the voltage signals Sa and Sb.

Although in the above-described embodiment, the offset is added to voltages obtained by integrally smoothing the a voltage signals Sa and Sb, it is to be understood that the present invention is not limited thereto, and the, arrangement may be such that the offset is subtracted in subtraction circuits.

Furthermore, although in the above-described embodiment, the offset is obtained by dividing the mixed signal Sc, the offset may be obtained by different ways.

The above-described detector apparatus is unsusceptible to variations in component characteristics, physical changes during assembly, and displacement of components.

It is to be appreciated that the present invention is applicable to any detector apparatus in which movement is detected based on a difference in phase between voltage signals having different phases obtained by using light emitting elements and light receiving elements.

Although in the above-described embodiment, the arrangement is such that two signals are binarized, the arrangement may be such that three or more signals are respectively binarized. Similarly to the above-described embodiment, each of the voltage signals is input to the node a via a resistor so that a mixed signal is generated, and the mixed signal is divided at the node b to generate a low-voltage signal, the low-voltage signal being input to the inverting inputs of each comparator.

Similarly, emitters and detectors that respectively emit and detect electromagnetic signals at frequencies other than optical or near-IR may be used, as long as appropriate components that alternately block and transmit these signals are also supplied.