Deep PWM dimmable voltage-fed resonant push-pull inverter circuit for LCD backlighting with a coupled inductor

1. Field of the Invention

The present invention relates to an improved apparatus and method for operating dimming fluorescent lamps in a deep dimming mode, and, in particular, to a push-pull inverter circuit capable of operation in a pulse width modulated (PWM) deep dimming mode.

2. Description of the Related Art

Existing LCD back lighting systems utilize a variety of circuit topologies. Two popular circuit topologies are the half bridge inverter and buck power stage plus current-fed push-pull inverter (also referred to as a Royer inverter).

To conserve energy most LCD back lighting systems including those described above are dimmable systems. For those applications which use CCFL lamps, two dinmming methods are commonly employed. A first method is PWM power regulation, and a second method is output current regulation using frequency shift or input voltage regulation. FIG. 1 illustrates a buck power stage 2 plus current feed push-pull inverter 4 topology. This circuit topology performs the dimming function by PWM output current regulation. The buck power stage is used to regulate the output current. The output current in turn regulates the output power to perform PWM dimming. The current-fed push-pull portion does not include a power regulation function. To perform dimming, the buck power stage controls the output power which controls the amplitude of the lamp current. The efficiency of the overall circuit topology of the prior art circuit of FIG. 1 is determined by the efficiencies of the constituent stages, namely, the buck power stage and the current-fed push-pull stage. While the current-fed push-pull stage can reach a high efficiency, the buck power is inherently inefficient. A further shortcoming of the circuit is that it is not suitable for operation in a pulse width modulated deep dimming mode. To make the circuit suitable for deep dimming applications, it is necessary to convert the current fed push-pull configuration to a voltage fed push pull configuration. A voltage fed push-pull configuration is more desirable than a current fed push-pull configuration. This is required because a voltage fed push-pull configuration can respond much faster to input current changes.

FIG. 2 illustrates half-bridge type inverter circuit topology of the prior art. The half-bridge type inverter topology is a more efficient circuit topology than the buck stage/push-pull type inverter topology described above. Similar to the push-pull type inverter, the half-bridge type inverter includes a transformer T. It is well known in the art that for a half-bridge inverter circuit configuration the output voltage V out is generally half of the input voltage, V in . So for a 12V input voltage the maximum voltage on the primary of the transformer is 6V. However, the lamp requires a voltage on the order of 690V. As such, the turns ratio of the transformer must be greater than 100×. The high turns ratio of the transformer T reduces the efficiency of the circuit. A further shortcoming of this circuit configuration is that although the steady-state current of the load R L (i.e., lamp) is 6 milliamps, the reflected current is very high due to the transformer turns ratio. The high reflected current further serves to reduce the efficiency of the circuit.

It is an object of the present invention to provide a voltage-fed series resonant push-pull inverter that is capable of efficient operation in a PWM deep dimming mode.

According to one aspect of the present invention, there is provided a voltage-fed series resonant push-pull inverter comprising: a DC voltage source, a transformer having a first and a second primary winding and at least one secondary winding adapted to be connected in series with a lamp load; a first resonant circuit including a first resonant inductor and a resonant capacitor, one side of said first resonant inductor connected in series with said first primary winding of said transformer, the other side of said first resonant inductor being connected in series a first switching transistor and also connected to one side of said resonant capacitor;

The novel circuit further comprises: a second resonant circuit including a second resonant inductor and the resonant capacitor, one side of said second resonant inductor connected in series with said second primary winding of said transformer, the other side of said second resonant inductor being connected in series with a second switching transistor and also connected to the other side of said resonant capacitor, said resonant inductor being magnetically coupled to said first resonant inductor;

The construction of the novel circuit allows it to be rapidly switched on and off to perform deep pulse with modulated (PWM) dimming.

According to another aspect of the invention, the first and second resonant inductors are magnetically coupled to each other whereby each inductor stores energy in a respective half-switching cycle whereby the stored energy is released in the next half-switching cycle thereby providing a boost function.

According to a further aspect of the invention, the voltage fed push-pull inverter has a low input impedance and a high output impedance for driving CCFL loads and the like in a PWM deep dimming mode.

According to yet another aspect of the invention, the inventive circuit has a high Q value sufficient to breakdown a lamp load (i.e., reducing the high startup resistance), and subsequent to breaking down a lamp load the Q of the circuit transitions to a low Q value without the necessity of utilizing prior art techniques for recognizing when a lamp load transitions from the breakdown state.

One feature of the inverter of the present invention is that in situations where the load is a CCFL load or the like, the driving source is current driven to stabilize the load.

The foregoing features of the present invention will become more readily apparent and may be understood by referring to the following detailed description of an illustrative embodiment of the present invention, taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a circuit diagram illustrating an LCD backlighting inverter circuit of the prior art;

FIG. 2 is a circuit diagram illustrating an LCD backlighting inverter circuit of the prior art;

FIG. 3 is a circuit diagram illustrating an LCD backlighting inverter circuit in accordance with an embodiment of the present invention; and

FIG. 4 illustrates representative current/voltage waveforms present in the circuit of FIG. 3 .

FIGS. 5 a-d illustrate various circuit configurations for describing a lamp start operation.

Construction

Turning now to the drawings, in which like reference numerals identify similar or identical elements throughout the several views, FIG. 3 illustrates a deep PWM dimmable voltage-fed resonant push-pull inverter 10 according to a preferred embodiment of the present invention. It is envisioned that the improved circuit according to the present invention will be used in deep pulse-width modulated (PWM) dimming applications.

As shown in FIG. 3, inverter 10 , which includes a PWM driver circuit 12 , is connected to a load R L . Load R L can be, but is not limited to a fluorescent lamp of the cold cathode type. The light from R L can be used to illuminate a liquid crystal display (LCD) of a computer (not shown). Load R L is connected to a secondary winding 16 of a transformer T.

Transformer T has a primary winding 18 whose midpoint 22 is connected to a voltage source V. Each terminal of the transformer T is connected in series with a respective inductor of the coupled inductor pair L 1 /L 2 . The opposite terminals of coupled inductor pair L 1 /L 2 are connected to terminals of switching transistors Q 1 an Q 2 , respectively. Resonant capacitor C r extends across the terminals of coupled inductor pair L 1 /L 2 above switching transistors Q 1 , Q 2 . Switching transistors Q 1 and Q 2 are driven by PWM driver circuit 12 .

Details of Operation

Steady State Operation

The operation of the inverter circuit 10 is symmetrical in each half cycle of the successive ON/OFF switching cycles of switching transistors Q 1 and Q 2 which operate at a constant frequency (i.e., 30 kHz) and at constant duty cycle (i.e., 50%). As a consequence of the switching cycle symmetry, the circuit operation will be described for the half cycle defined as {Q 1 ON/Q 2 OFF} for ease of explanation. By symmetry, the {Q 1 OFF/Q 2 ON} half cycle is analogously described.

{(Q 1 ON/Q 2 OFF} Half Switching Cycle

The operation of the circuit of FIG. 3 will now be described for the Q 1 ON/Q 2 OFF half switching cycle with reference to the circuit waveforms of FIG. 4 .

FIG. 4 illustrates circuit voltage/current waveforms (e.g., waveforms A, B and C) for one full switching cycle of the inverter circuit 10 . Demarcation lines X and Y define the beginning and end of the first half switching cycle {Q 1 ON/Q 2 OFF}, and demarcation lines Y and Z define the beginning and end of the second half switching cycle {Q 1 OFF/Q 2 ON}.

Referring now to the first half switching cycle {Q 1 ON/Q 2 OFF}, waveform (A) describes the current through inductor L 2 , I L2 , waveform (B) describes the inductor current through L 1 , I L1 , and waveform (C) describes the voltage across capacitor Cr, V CR . Waveforms A, B and C are shown for one complete switching cycle. However, as a consequence of the circuit symmetry, the waveforms will be discussed only for the {Q 1 ON/Q 2 OFF} half switching cycle.

It is assumed that just prior to Q 1 being turned ON (point D) at the start of the first half switching cycle, the voltage on the resonant capacitor Cr, waveform (C), is substantially zero volts (point F) and the currents in the coupling inductor L 1 /L 2 , I L1 and I L2 , are both positive currents (i.e., the currents travel in a direction away from the source, V in , see FIG. 3 ).

It is further assumed that the impedance of a magnetizing inductance (not shown) associated with transformer T is much higher than the reflected load impedance of load R L (not shown).

At a point at which Q 1 is turned ON (see point D) for the half switching cycle defined by {Q 1 ON/Q 2 OFF }, a positive DC current I DC is formed by a current loop defined by DC voltage, Vin, the reflected load resistance R REFL (not shown), inductor L 1 and switching transistor Q 1 . It is noted that switching transistors Q 1 and Q 2 are switched at a point at which the voltage across C r is substantially zero to effect zero voltage switching (see points D and E).

From the point at which Q 1 is turned on (see point D) at the start of the half-cycle, the current in L 1 , I L1 , increases until point B 1 , as described by waveform (B).

Also, at the point at which Q 1 is turned on at point D, energy previously stored in inductor L 2 in the previous half-switching cycle resonantly decreases, as described by waveform (A), representing I L2 , (between points A 1 to A 2 ). The energy is released to capacitor Cr. Waveform (C), from substantially points C 1 -C 2 , describes the transfer of energy as an increased voltage across capacitor C r as stored energy from inductor L 2 is transferred to capacitor C r . It is noted that during this period of energy release from inductor L 1 , capacitor C r is being charged from two sources, the input voltage source, V in , and from the stored energy released from inductor L 2 . This latter source is referred to as a boost function. That is, it provides an additional charge on capacitor C r above and beyond what is normally provided by the voltage source, V in . For the present half-cycle, the boost function is considered to be operative from substantially the Q 1 turn on point (point D) until the point at which C r reaches its maximum value (see point C 2 ). At the point at which C r reaches it maximum value (point C 2 ), C r is then considered to be in resonance with inductor L 2 . Capacitor C r is said to be in resonance with inductor L 2 at point C 2 because the energy which was initially transferred from inductor L 2 to C r is then resonantly returned through both inductor L 2 and the load's reflected resistor R REFL back towards the source, V in . This return of resonant energy is shown as inductor current, I L2 , (See waveform (A) from point A 3 to point A 4 ) which is in series with the input DC voltage Vin through the reflected resistor R REFL . The inductor current, I L2 , from points A 3 to A 4 may be characterized as a negative half-period current in that the I L2 current is in a direction opposite that of the source current I DC .

During this half-switching cycle, inductor L 1 is charged from the voltage source, Vin, through the reflected resistor R REFL and switching transistor Q 1 to store energy which provides a boost function in the next half cycle, similar to that described above with regard to inductor L 2 in the current half-switching cycle. It is noted that the process of storing energy to be released in the next-half cycle is alternately repeated for each of the resonant inductors.

The resonant energy stored in inductor L 2 , in addition to providing a boost function, will partially couple to inductor L 1 as current I L2 having both AC and DC components. The AC component of the coupled current I L2 , is out-of-phase with the AC component of current I L1 The out-of-phase AC current coupled from inductor L 2 has the effect of reducing the undesirable AC component (i.e., AC ripple) of current I Dc thereby maintaining the DC level of current I DC at a relatively constant level. The magnitude of the AC current coupled from inductor L 2 is a function of the coupling co-efficiency between inductors L 1 and L 2 . Therefore, the coupling coefficient is established at a predetermined value sufficient to make the high frequency ripple of the output current of the DC voltage source very low. The current in L 2 , I back , increases from zero to a negative maximum value. The current in L 2 and the voltage on Cr decreases until zero.

As the voltage on Cr reaches zero (point E), Q 1 turns OFF and Q 2 turns ON. It is noted that throughout the first half cycle discussed above, Inductor L 1 stores energy from the input DC voltage source Vin, which will be used in the next half cycle to create a resonance with L 2 . Further, the second half switching cycle, defined by {Q 1 OFF/Q 2 ON} is similar to the first half switching half cycle described above with the waveforms for L 1 and L 2 reversed, and the waveform for Cr being negative that for the Q 1 ON/Q 2 OFF portion.

Thus, during the second half switching cycle, L 2 is charged from input DC voltage source, Vin, and stores energy which will be used to create a resonant condition in the next half switching cycle. During this half-cycle, inductor L 1 resonates with Cr to generate the out-of-phase AC component that is transferred to L 2 due to the coupling of inductors L 1 /L 2 .

This coupling for each half-cycle causes the high frequency ripple of the output current of the input DC voltage source to be very low. The couple coeficiency of the couple inductors will affect how much magnetic energy will couple from L 1 to L 2 or L 2 to L 1 . There is an optimum value for the minimum high frequency ripple. The transformer T outputs two half cycles of AC current to the lamp created in the primary winding due to the out-of-phase switching of Q 1 and Q 2 . Because the reflected resistor R is in series with L 2 and Cr or L 1 and Cr, the current in the lamp will be controlled by the L 2 and Cr or L 1 and Cr series resonant circuit. As such, the inverter is a high frequency current source to drive the lamp, without the need for a ballast capacitor in the output of the transformer as is required in voltage driven sources of the prior art. The transformer only transfer real power from primary to secondary. There is no reactive power passing through the transformer. The inverter can have higher efficiency.

Lamp Start Operation.

Lamp start operation operates in a different manner than the normal operation discussed above. Before the resistance of the lamp is reduced by the startup voltage, the lamp has a high impedance.

FIG. 5 a illustrates a T-type transformer model whereby the transformer T of the inventive circuit of FIG. 3 is represented by three inductors: a primary leakage inductor, L ps , a secondary leakage inductor L ss , and a magnetizing inductor, L pm . The T-type model is a standard model, well known in the art. Vin represents a general input voltage for describing the T-type model.

FIG. 5 b illustrates the transformer circuit of FIG. 5 a for lamp start operation. That is, the resistance of the lamp is sufficiently high such that it can be characterized as an open circuit. In this case, all of the current travels through the magnetizing inductor, L pm .

FIG. 5 c represents the inventive circuit of FIG. 3 for a normal operating condition, that is where the circuit of FIG. 5 a would represent the transformer T, shown in FIG. 3, and the reflected load, R refl . As shown in FIG. 5 c , the reflected load resistance, R refl , represents the lamp load in the secondary of transformer T reflected back into the primary labeled as R fefl .

FIG. 5 d illustrates the inventive circuit of FIG. 3 for the lamp start condition, that is, where the circuit of FIG. 5 b would represent the transformer T and load shown in FIG. 3 . In this case, as discussed above, and shown at FIG. 5 b , the load resistance, R L , is so high as to be effectively considered an open circuit. Accordingly, the value of this resistance, R L , reflected into the primary is also effectively considered an open circuit, and is therefore removed from the circuit illustration of FIG. 5 d.

In general, the output or secondary voltage of the inventive circuit of FIG. 3 for driving the load, R L , may be written as:

V out =N*(L PM /(L R +L PM )*Q*V in

Where:

N is the transformer turns ratio associated with the transformer T of the inventive circuit;

L ps is the primary leakage inductor of the T-type circuit model of transformer T;

L ss is the secondary leakage inductor of the T-type circuit model of transformer T;

L pm is the magnetizing inductor of the T-type circuit model of transformer T;

L R is either L 1 or L 2 depending on the half-cycle;

V in is the input or source voltage for driving the inventive circuit of FIG. 3;

Q is the efficiency factor associated with the inventive circuit of FIG. 3, which may be written as

Q=w*L/R f

where R f represents the real part of the equivalent series resistance of the circuit of FIG. 3, R f , which may be written as: R f = R * W 2 * L 2 R 2 + W 2 * L 2

At lamp startup, as discussed above, and shown in FIG. 5 d , the circuit resistance R circuit is very small because the lamp or load presents a very high initial resistance prior to the lamp or load being broken down. The reflected resistance of the lamp or load is described in the equations above as R.

At lamp startup the Q of the circuit is very high as a consequence of the load having a very high value, and the series resistance of the circuit R f therefore having a very low value, which is the denominator of the Q equation above. The large value of Q at start up multiplied by the turns ratio, N, and the other terms described above results in a very high startup value for V out . This high initial startup value of V out is sufficient to breakdown the lamp load, causing its in resistance, R L , to go from effectively an infinite value to a value on the order of 115 k. This value reflected back into the primary results in a breakdown reflected voltage value on the order of 30 ohms. It is therefore shown that subsequent to lamp breakdown the Q of the circuit naturally transitions from a very high Q value to a very low Q value without the need for external monitoring and/or switching means such as, for example, frequency switching and/or feedback loops as required in prior art configurations.

It will be understood that various modifications may be made to the embodiments disclosed herein, and that the above descriptions should not be construed as limiting, but merely as exemplifications of preferred embodiments. Those skilled in the art will envision other modifications within the scope and spirit of the claims appended hereto.