Electrostatic discharge protective device incorporating silicon controlled rectifier devices

1. Field of the Invention

The present invention relates generally to electrostatic discharge (ESD) protection in integrated circuit (IC) packages, and more particularly, to the use of silicon controlled rectifier devices as ESD protective devices.

2. Background Art

Electrostatic discharge (ESD) is a movement of static electricity from a nonconductive surface, which could cause damage to semiconductors and other circuit components in ICs. A person walking on a carpet, for instance, can carry an amount of electrostatic charge up to several thousands of volts under high humidity conditions and over 10,000 volts under low humidity conditions. When touching ICs by hand, the instantaneous power level of the ESD could cause severe damage to the ICs. CMOS (complementary metal-oxide semiconductor) logic ICs are especially vulnerable to ESD.

To protect IC packages against ESD damage, various solutions have been proposed. One solution suggests the provision of an ESD protective device (also referred to herein as “ESD cell”) between the internal semiconductor devices in the IC chip (hereinafter referred to as “internal circuit”) and the corresponding bonding pad, as illustrated in FIG. 1 . Under normal circumstances, the circuit in FIG. 1 operates as if the ESD cell is not present, so that the bonding pad directly couples the internal circuit. However, when a high voltage pulse (i.e., voltage in kvs) occurs, the ESD cell will shunt the current from the bonding pad away from the internal circuit, thereby protecting the internal circuit from damage.

Recently, silicon controlled rectifier (SCR) devices have been used as ESD cells because SCR devices can switch from very high impedance states to a very low impedance state. FIG. 2 illustrates a conventional SCR device, and FIG. 3 illustrates the voltage vs. current characteristics of a conventional SCR device. Referring to FIG. 3, the current rises very slowly as voltage increases, until the SCR device hits a switching voltage Vs. From Vs, the voltage decreases as the current rises slowly, until the SCR device reaches a “holding point” P. At this holding point P, the voltage will generally stay the same (or rise very slowly) even as the current increases drastically. As used herein, the term “latchup” means the part of the curve in FIG. 3 that is above the holding point P.

One significant drawback with the use of SCR devices as ESD cells is that SCR devices are susceptible to latchup caused by non-ESD events, such as other noise triggers. As a result, this susceptibility to latchup often requires further trade-offs in circuit design to optimize ESD robustness and latchup immunity.

Thus, there still remains a need for an SCR device that is capable of being used as an ESD cell, and where latchup of the SCR device caused by non-ESD events is minimized or eliminated.

It is an object of the present invention to provide an improved SCR device for use as an ESD cell.

It is another object of the present invention to provide an SCR device where latchup will only occur when ESD occurs.

In accordance with the foregoing and other objectives of the invention, the present invention provides an SCR cell structure that has a plurality of divided p+ and n+ blocks, with the spacing, sizes and locations of these divided p+ and n+ blocks being varied or adjusted to minimize latchup caused by non-ESD events. To further minimize latchup caused by non-ESD events, the SCR cell structure can also provide a plurality of divided blocks of Nwell and Psub pickup contacts, and varying the spacing, sizes, shapes and locations of these divided blocks of Nwell and Psub pickup contacts. In addition, the spacing of contact holes within the pickup contacts can also be varied to further minimize latchup caused by non-ESD events.

The invention can be more fully understood by reading the subsequent detailed description of the preferred embodiments, with reference made to the accompanying drawings.

FIG. 1 illustrates the use of an ESD protective device between a bonding pad and an internal circuit.

FIG. 2 illustrates a conventional SCR device.

FIG. 3 is a graph illustrating the voltage vs. current characteristics of a conventional SCR device.

FIG. 4 is a simple layout schematic of a conventional SCR cell structure used as an ESD protective device.

FIG. 5 is a layout schematic of an SCR cell structure used as an ESD protective device according to one embodiment of the present invention.

FIG. 6 is a layout schematic of the SCR cell structure of FIG. 5 illustrating the spacing between contact holes.

FIG. 7 is a layout schematic of an SCR cell structure used as an ESD protective device according to another embodiment of the present invention.

FIG. 8 is a layout schematic of an SCR cell structure used as an ESD protective device according to yet another embodiment of the present invention.

In the following description, for purposes of explanation and not limitation, specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In certain instances, detailed descriptions of well-known or conventional data processing techniques, hardware devices and circuits are omitted so as to not obscure the description of the present invention with unnecessary detail.

The present invention provides an SCR cell structure that provides a plurality of divided p+ and n+ blocks, and varies the spacing, sizes and locations of these divided p+ and n+ blocks to minimize latchup caused by non-ESD events. To further minimize latchup caused by non-ESD events, the SCR cell structure can also provide a plurality of divided blocks of Nwell and Psub pickup contacts, and varying the spacing, sizes, shapes and locations of these divided blocks of Nwell and Psub pickup contacts. In addition, the spacing of contact holes within the pickup contacts can also be varied to further minimize latchup caused by non-ESD events.

To better understand the principles of the present invention, reference should first be made to FIG. 4, which is a simple schematic of a conventional SCR cell structure 10 used as an ESD protective device. As shown in FIG. 4, the Psub and Nwell regions of the conventional SCR cell 10 are each provided with one corresponding N+ block 12 and P+ block 14 , respectively. The N+ block 12 and the P+ block 14 are spaced apart by a consistent spacing S 1 throughout their respective lengths. The N+ block 12 has a corresponding Psub pickup 16 that is also spaced from the N+ block 12 by a consistent spacing S 2 throughout their respective lengths, and the Psub pickup 16 has the same shape as the N+ block 12 . Similarly, the P+ block 14 has a corresponding Nwell pickup 18 that is also spaced from the P+ block 14 by a consistent spacing S 3 throughout their respective lengths, and the Nwell pickup 18 has the same shape as the P+ block 14 .

Referring now to FIG. 5, the SCR cell structure 100 according to one embodiment of the present invention has a plurality of N+ blocks 102 a , 102 b , 102 c , 102 d in the Psub region, and a plurality of P+ blocks 104 a , 104 b , 104 c , 104 d in the Nwell region. N+ block 102 a is closest to the bonding pad, N+ block 102 d is closest to the unwanted trigger sources (and furthest from the bonding pad), and the N+ blocks 102 b and 102 c are intermediate between the N+ blocks 102 a and 102 d . Similarly, P+ block 104 a is closest to the bonding pad, P+ block 104 d is closest to the unwanted trigger sources, and the P+ blocks 104 b and 104 c are intermediate between the P+ blocks 104 a and 104 d . Each of these blocks 102 a - 102 d and 104 a-d can be configured, positioned and spaced apart according to the desired application by the circuit designer, employing the following basic principles of the present invention:

1. The corresponding N+ and P+ blocks 102 , 104 that are closer to the bonding pad are spaced more closely apart to enable latchup to occur more easily (i.e., it is desired to have the ESD protection turn on more easily).

2. The corresponding N+ and P+ blocks 102 , 104 that are closer to the other parts of the circuit (labeled as the “trigger source” in FIG. 5) are spaced further apart to minimize latchup occuring due to non-ESD events (i.e., unwanted trigger sources) from the other parts of the circuit.

3. The distance or spacing between adjacent N+ blocks 102 and P+ blocks 104 is smaller for the blocks 102 , 104 that are closer to the bonding pad.

4. The distance or spacing between adjacent N+ blocks 102 and P+ blocks 104 is greater for the blocks 102 , 104 that are closer to the unwanted trigger sources, in order to minimize mutual induction of latchup. In other words, it is desired to prevent an accidental latchup at, for example, the P+ block 104 d to cause adjacent P+ block 104 c from latching up.

5. The corresponding N+ and P+ blocks 102 , 104 that are closer to the bonding pad are sized larger.

6. The corresponding N+ and P+ blocks 102 , 104 that are closer to the unwanted trigger sources are sized smaller.

Regarding principles 5 and 6 , the length and size of an N+ or P+ block 102 , 104 will determine the ESD power delivering limit. In other words, a longer or larger block size can carry more ESD power, while a shorter or smaller block size will carry less ESD power. Therefore, larger-sized blocks 102 , 104 carry more latchup current and can induce neighboring blocks 102 , 104 into further mutual induction of latchup.

The underlying idea behind the above-described principles is to adjust or adapt the circuit design to the directions and characteristics of suspectable trigger sources, so as to minimize latchup caused by non-ESD events while encouraging latchup to occur when an ESD event occurs. In other words, the location, spacing and sizes of the N+ and P+ blocks 102 and 104 (and the pickups 106 and 108 described below) depend on whether and where latchup is desired, and on the tolerance to trigger latchup.

The above principles are illustrated in FIG. 5 . For example, the spacing S 4 between the N+ block 102 a and P+ block 104 a is smaller than the spacing S 5 between intermediate N+ blocks 102 b , 102 c and P+ blocks 104 b , 104 c , and the spacings S 4 and S 5 are smaller than the spacing S 6 between the N+ block 102 d and P+ block 104 d . Similarly, the sizes of the N+ block 102 a and P+ block 104 a are larger than the sizes of the intermediate N+ blocks 102 b , 102 c and P+ blocks 104 b , 104 c , and the sizes of blocks 102 a - 102 c and 104 a - 104 c are larger than the sizes of the N+ block 102 d and P+ block 104 d . Similarly, the spacing S 7 between the N+ blocks 102 a and 102 b , and P+ blocks 104 a and 104 b , is smaller than the spacing S 8 between the intermediate N+ blocks 102 b and 102 c and P+ blocks 104 b and 104 c , and the spacing S 8 is smaller than the spacing S 9 between the N+ blocks 102 c and 102 d , and P+ blocks 104 c and 104 d.

Each N+ block 102 a - 102 d has one or more corresponding Psub pickups 106 a - 106 d , respectively, and each P+ block 104 a - 104 d has one or more corresponding Nwell pickups 108 a - 108 d . For example, there are two pickups 106 a and 108 a for the N+ block 102 a and the P+ block 104 a , respectively. As with the N+ blocks 102 and P+ blocks 104 , similar principles can be applied to the pickups 106 and 108 :

7. The pickups 106 and 108 that are closer to the bonding pad are spaced further apart from their respective blocks 102 and 104 to enable latchup to occur more easily (i.e., it is desired to have the ESD protection turn on more easily).

8. The pickups 106 and 108 that are closer to the unwanted trigger sources are spaced closer to their respective blocks 102 and 104 to minimize latchup occuring due to non-ESD events from the internal circuit.

9. The pickups 106 and 108 that are closer to the bonding pad are sized smaller because this can allow the ESD protection to turn on more easily.

10. The pickups 106 and 108 that are closer to the unwanted trigger sources are sized larger because larger-sized pickups will reduce susceptibility to latchup.

11. The shape and configuration of the pickups 106 and 108 can be adjusted depending on the proximity to the unwanted trigger sources. For example, the pickups 106 d and 108 d are L-shaped to surround their corresponding N+ block 102 d and P+ block 104 d , respectively, to further protect against non-ESD noise.

12. The length of the pickups 106 and 108 should be longer for pickups 106 and 108 that are further from the bonding pad, and shorter for pickups 106 and 108 that are closer to the bonding pad.

13. The width of the pickups 106 and 108 should be wider for pickups 106 and 108 that are further from the bonding pad, and narrower for pickups 106 and 108 that are closer to the bonding pad.

The above principles 7 - 13 are also illustrated in FIG. 5 . For example, the spacing S 10 between the N+ block 102 a and P+ block 104 a and their respective pickups 106 a and 108 a is larger than the spacing S 11 between intermediate N+ blocks 102 b , 102 c and P+ blocks 104 b , 104 c and their respective pickups 106 b , 106 c and 108 b , 108 c , and the spacings S 10 and S 11 are larger than the spacing S 12 between the N+ block 102 d and P+ block 104 d and their respective pickups 106 d and 108 d . Similarly, the sizes of the pickups 106 a and 108 a closest to the bonding pad are smaller than the sizes of the intermediate pickups 106 b , 106 c , 108 b , 108 c , and the intermediate pickups 106 b , 106 c , 108 b , 108 c are smaller than the sizes of the pickups 106 d and 108 d that are closest to the trigger sources. Similarly, the length and width of the pickups 106 a and 108 a closest to the bonding pad are smaller than the length and width of the intermediate pickups 106 b , 106 c , 108 b , 108 c , and the intermediate pickups 106 b , 106 c , 108 b , 108 c have smaller lengths and widths than those of the pickups 106 d and 108 d that are closest to the trigger sources.

In addition to the possible adjustment of the spacing, sizes and locations of the N+ blocks 102 , P+ blocks 104 , pickups 106 , 108 , and the possible adjustment of the shapes of the pickups 106 , 108 , it is also possible to adjust the spacing between contact holes of the pickups 106 , 108 in each P+/N+ group. The spacing between contact holes of the pickups 106 , 108 can be smaller for P+/N+ blocks 102 , 104 closer to the trigger sources, and the spacing between contact holes can be larger for P+/N+ 102 , 104 blocks closer to the bonding pad. This is because a greater number or density of contact holes will reduce parasitic resistance which will make it more difficult for latchup to occur. Referring to FIG. 6, spacing S 13 between the contact holes 120 a and 122 a of the pickups 106 a and 108 a , respectively, is greater than the spacing S 14 between the contact holes 120 b and 122 b of the pickups 106 b and 108 b , respectively. Similarly, the spacings for the contacts 120 c , 120 d , 122 c and 122 d become progressively smaller as the pickups 106 c , 106 d , 108 c , 108 d are distanced progressively further from the bonding pad, and closer to the unwanted trigger sources.

FIGS. 7 and 8 illustrate other examples of SCR cell structures that embody the principles set forth hereinabove. FIG. 7 illustrates another SCR cell structure 200 that is similar to that illustrated in FIG. 5 in that the spacings, sizes and locations of the N+ blocks 202 a - 202 d and P+ blocks 204 a - 204 d are similar to those of the N+ blocks 102 a - 102 d and P+ blocks 104 a - 104 d in FIG. 5 . The primary difference between the SCR cell structures 100 and 200 is that the pickups 206 a - 206 d and 208 a - 208 d in FIG. 7 are configured differently from the pickups 16 a - 106 d and 108 a - 108 d of FIG. 5 . In FIG. 7, some of the pickups 206 b , 206 c , 208 b and 208 c encircle additional portions of their respective N+/P+ blocks 202 b , 202 c , 204 b , 204 c . In addition, the pickups 206 d and 208 d completely encircle their respective N+ block 202 d and P+ block 204 d . As a result, the pickups 206 b - 206 d and 208 b - 208 d provide additional protection against latchup caused by unwanted trigger sources.

FIG. 8 illustrates that the principles of the present invention can be applied to SCR cells having arbitrary shapes. For example, the SCR cell structure 300 in FIG. 8 can have an L-shaped configuration with N+ blocks 302 and P+ blocks 304 extending along two sides 340 and 342 of the structure 300 . One N+ block 302 c and one P+ block 304 c are L-shaped to accomodate the bend of the structure 300 , and the pickup 306 c corresponding to N+ block 302 c is also L-shaped. Otherwise, the principles relating to the spacings, sizes and locations (and related principles) of the N+ blocks 302 a - 302 e and P+ blocks 304 a - 304 e are similar to those of the N+ blocks 102 a - 102 d and P+ blocks 104 a - 104 d in FIG. 5, and the principles relating to the spacings, sizes and locations of the pickups 306 a - 306 e and 308 a - 308 e are similar to those of the pickup contacts 106 a - 106 d and 108 a - 108 d in FIG. 5 .

Thus, the principles set forth above allow the circuit designer to adjust and simultaneously optimize ESD protection performance and resistance (or immunity) to latchup. This ability to optimize provides the flexibility of designing the SCR cells 100 , 200 , 300 to be more compact, and to reduce unnecessary area. In contrast, the conventional SCR cell structure 10 in FIG. 4 provides fixed spacings between the P+/N+ groups, thereby making it difficult to simultaneously optimize ESD and latchup characteristics.

It will be recognized that the above described invention may be embodied in other specific forms without departing from the spirit or essential characteristics of the disclosure. Thus, it is understood that the invention is not to be limited by the foregoing illustrative details, but rather is to be defined by the appended claims.