Digital signal frame and interleaver synchronizer

The invention relates to Orthogonal Frequency Division Multiplexing (OFDM) systems, and is more particularly related to transmitting and receiving digital information within a Frequency Modulated (FM) signal band using OFDM.

As is well-known, the center frequencies of adjacent FM bands/channels are separated by 200 kHz. As is also well-known, analog signals within the audio band are typically frequency modulated onto a FM carrier for transmission to a receiver. It is now possible to also transmit information (e.g., analog/digital information) in the upper and lower side bands of a FM carrier signal. This is broadly illustrated in FIG. 1, in which transmitter 105 transmits via antenna 125 an analog host signal supplied by source 110 over a FM carrier (represented by signal a 1 ). It also transmits digital versions of signals supplied by source 115 in the upper and lower side bands (represented by side band signals b 1 and b 2 ), respectively, of the FM carrier. We have recognized that it is likely that the host signal, a 2 , as well as the first adjacent FM signals, c 1 and c 2 , will interfere with the side band signals (represented by the shaded portions of signals b 3 and b 4 ) during the transmission of the FM signal from antenna 125 to a receiver antenna 205 . Disadvantageously, such interference makes it extremely difficult for receiver 200 to recover the signal transmitted in the side bands, since the inference sorely corrupts the side band signal.

We have recognized that such interference may be sufficiently minimized by filtering the side band signal at the receiver to allow receiver processes to perform successfully frame synchronization and interleaver functions on the filtered signal. In accordance with an aspect of the invention, such filtering is done using a simple bandpass filter.

We have further recognized that, although such filtering renders the side band signal sufficiently clean to recover frame synchronization and interleaver signals, it nevertheless corrupts the information carried in that signal, thereby making it extremely difficult to recover the information. We deal with this problem by using the filtered version of the received side band signal for frame and interleaver synchronization functions and, after such functions have been performed using a shifted version of the received side band signal to recover such information, all in accordance with an aspect of the invention.

In accordance with another aspect of the invention, the extent of such shifting is determined as a function of the number of signal samples that the filtered signal had to be shifted to obtain frame synchronization, e.g., to locate the beginning of a frame.

These and other aspects of the invention are described in the following detailed description and ensuing claims.

In the drawing:

FIG. 1 broad is block diagram of a prior art FM transmission system;

FIG. 2 is a broad block diagram of the side band signal source of FIG. 1;

FIG. 3 is broad block diagram of a receiver of a signal transmitted by the transmitter of FIG. 1;

FIG. 4 is broad block diagram of the output processor of FIG. 3; and

FIG. 5 is a specification of the bandpass filter of FIG. 3 .

The claimed invention will be discussed in the context of a FM system employing an Orthogonal Frequency Division Multiplexing (OFDM) technique for the transmission of data symbols using mutually independent and separated radio frequency (RF) subcarriers. OFDM has several desirable properties; for example, it simplifies or even eliminates equalization problems considerably and has graceful performance degradation. The absence of equalization problems simplifies the implementation of an OFDM system.

Turning then to FIG. 2, Side-Band Signal (SBS) processor 120 , which is the source of the signal that transmitter 105 transmits in the aforementioned side bands, includes conventional source coder 120 - 5 which compresses an information signal that is received from a source 121 . The information signal may be, for example, a data signal characterizing particular information, or an analog signal, which has been converted, to a digital signal by a conventional analog-to-digital converter circuit (not shown). Such compression may be done in accordance with any one of a number of well-known signal compression schemes, e.g. Huffman encoding. The result of such compression is presented to convolutional encoder 120 - 10 which re-generates the encoded source information at a higher rate. The output from encoder 120 - 10 is supplied to conventional block interleaver processor 120 - 15 which writes the data samples that it receives into a memory buffer row-by-row to form a matrix having, for example, 414 rows and 320 columns of data bits. When it forms one such matrix it then outputs the matrix column by column to perform the bit interleaving function. It also starts the construction of a next matrix in parallel with the processing of the completed matrix. The interleaved data bits are presented to conventional DQPSK processor 120 - 20 , which converts a group of data bits, e.g., 2 bits, into a conventional complex DQPSK symbol. Processor 120 - 20 also builds a frame of such symbols using so-called zero padding for the insertion of the host signal. A frame of complex symbols is then presented to conventional IFFT processor 125 - 25 which runs a frame of symbols through an Inverse-Fast-Fourier Transform that converts each such symbol into a complex number formed by a predetermined number of bits, e.g., 16 or 32 bits. The frame of complex numbers is then presented to a conventional cyclic extension processor 120 - 30 .

Processor 120 - 30 , more particularly, performs a so-called cyclic extension function by prepending a predetermined number of the samples appearing at the end of a frame to the beginning of the frame and vice-versa. Processor 120 - 30 then marks predetermined ones of the frames in the matrix, e.g., frames 0 , 10 , 340 and 400 , as deinterleaver frames by inverting the sign of the cyclic extension prepended to those frames. Processor 120 - 30 then performs any filtering needed to put the frames in form for transmission over wireless media and supplies the filtered frames, in turn, to conventional digital to analog converter 120 - 35 . Transmitter 105 then combines each such converted frame with the host signal in a conventional manner, amplifies and filters the resulting signal in a conventional manner and then transmits the latter signal over wireless media 126 via antenna 125 for reception by a receiver, such as the receiver shown in FIG. 3 .

Receiver 300 , FIG. 3, more particularly, includes antenna 205 for receiving the transmitter signal and a conventional front-end receiver section that amplifies, filters, demodulates the received signal and outputs the host signal to a signal processing section 215 and outputs the side band signal to conventional analog-to-digital (A/D) converter circuit 225 which converts the analog signal to digital samples, which are supplied to digital bandpass filter 230 and M shift circuit 245 . In illustrative embodiment of the invention, bandpass filter 230 may be a conventional finite impulse response filter having a specification as shown in FIG. 5 . The filter removes various noise signals that mixed with the transmitted signal as it propagated through the wireless media. The filtered signal is then supplied to frame synchronization (FS) processor 235 that locates the beginning of a frame using a conventional correlation technique. (As mentioned above, we have recognized that such noise signals corrupt the transmitted signal making it very difficult to perform synchronization and deinterleaver functions successfully. Thus, in accord with an aspect of the invention, we filter the received side band signal to reduce the effect of such noise so that frame and interleaver synchronization functions may be performed successfully.)

FS processor 235 autocorrelates a frame of complex numbers so that a strong peak of energy appears at the beginning of each such frame. Processor 235 then shifts the frame by a predetermined number of samples and then multiplies the original version of the frame by the shifted version to complete the aforementioned autocorrelation process. FS processor 235 then locates the beginning of a frame by discarding any leading sample not having a strong peak of energy, and continues such discarding until it locates the sample containing the strong peak of energy. Processor 235 then marks the latter sample as the beginning of a frame. The number, M, of samples so discarded is supplied to M shift circuit 245 . FS processor 235 then supplies the detected frame and succeeding frames to IS processor 240 which locates the frames that had been marked as interleaver frames at the transmitter.

Processor 240 performs the interleaver synchronization function by accumulating a predetermined number of the frames, e.g., 414 frames, supplied by processor 235 . Processor 240 then scans the array of frames to locate the frames so marked at the transmitter as interleaver frames, e.g., frames 0 , 10 , 340 and 400 . Once processor 240 locates the marked frames, it then sends identifiers respectively noting the locations of the marked frames to conventional DSP processor 250 via path 241 .

As mentioned above, although the bandpass filtered signal may be used in performing the frame and interleaver synchronization functions, such filtering further corrupts the integrity of the transmitted data. We have recognized, however, that the unfiltered signal may still be used to retrieve the original information transmitted in the side bands. To do this, we shift the signal outputted by circuit 225 by M samples, i.e., the number of samples that FS processor shifted the filtered samples to locate the beginning of a frame. M shift circuit 245 then shifts the unfiltered samples by M samples discarding the latter samples, M samples, and supplies the succeeding samples to output processor 250 via path 246 .

A functional block diagram of output processor 250 is shown in FIG. 4 . In particular, cyclic extension extractor 250 - 5 removes the cyclic extension from each of the frames that output processor 250 receives via path 246 . That is, extractor 250 - 5 “reverses” the operation performed by processor 120 - 30 (FIG. 2 ). The revised frame is then supplied to conventional FFT processor 250 - 10 , which runs the revised frame through a Fast Fourier Transform (FFT) function. Processor 250 - 10 then passes the frame of symbols to conventional symbol converter 250 - 20 . Symbol converter 250 - 20 converts the frame of symbols into a frame of respective data bits (bytes) and supplies the result to de-interleaver process 250 - 25 .

De-interleaver 250 - 25 , more particularly, stores the frames that it receives in reverse order in an array buffer (i.e., column by column) to deinterleave the data. It then checks the array using the interleaver markers (identifier) received via path 241 to determine if the interleaver frames are at their expected locations. If not, then processor 245 moves its buffer pointers to include the next succeeding frame that it receives from converter 250 - 20 in the array and rechecks the array in the described manner for proper deinterleaving. Processor 245 repeats this process until the array is properly deinterleaved. At that point, processor 250 supplies each of the deinterleaved frames forming the array in sequence to decoder/expander 250 - 30 . Decoder/expander processor 250 - 30 first decodes each deinterleaved frame that it receives using a particular decoding technique, e.g., a so-called Viterbi decoder. Processor 250 - 30 then expands (decompresses) the decoded frame to re-generate the original source signal supplied to coder 120 - 5 (FIG. 2) and outputs the original source signal to a receiver via path 251 , all in accordance with the principles of the invention.

It will thus be appreciated that, although the invention illustrated herein is described in the context of a specific illustrative embodiment, those skilled in the art will be able to devise numerous alternative arrangement which, although, not explicitly shown or described herein, nevertheless, embody the principles of the invention and are within its spirit and scope. For example, although the principles of the invention were discussed in the context of an OFDM transmission system operating within the side bands of a FM carrier, such principles may be readily applied to other forms of transmission systems, wireless or wired, since they are also susceptible to signal interference.