USPatent applicationPatented

Power module with a circuit arrangement comprising active semiconductor components and passive components, and method for producing same

Granted 5 Feb 2002 · 2 office actions

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Abstract

The invention relates to a power module with a circuit arrangement provided with active semiconductor components and passive components and with a circuit substrate, whereby at least a portion of the active semiconductor components are soldered onto a DCB substrate and at least a portion of the passive components are printed in thick film technology on at least one ceramic substrate. The upper side of the DCB substrate is structured to form track conductors and connecting surfaces for receiving the active semiconductor components and passive components of the circuit arrangement. On the ceramic substrate, for each passive component, a first print layer is printed in thick film technology and at least one contact surface as additional print layer laterally adjoining the first print layer. The ceramic substrates for the passive components in thick film technology are connected via the at least one contact surface with the corresponding connecting surface(s) of the DCB substrate by means of a soldered connection.

Description

4 parts
›BACKGROUND OF THE INVENTION

Power modules are used in many application fields for various tasks, for example, to control the speed and power of electric motors. A circuit arrangement acting as power unit forms part of such power modules and typically has both active semiconductor components, such as power semiconductor components, and passive components, such as resistors (e.g., shunts for current measurement) and possibly capacitors. The power semiconductor components work in switched mode, which causes high rates of current change. These high rates of current change necessitate a low-inductance structure of the circuit arrangement to prevent overvoltages.

Consequently, and for reasons of adequate heat removal of their power dissipation, the carrier element used for the circuit arrangement's active semiconductor components (particularly the power semiconductor components) is typically a so-called DCB (direct copper bonding) substrate, which is made of a ceramic layer enclosed by two copper layers (e.g., made of aluminum oxide Al 2 O 3 ). The active semiconductor components (power semiconductor components) are soldered to the upper copper layer of the DCB substrate and contacted by means of bond wires. The upper copper layer of the DCB substrate is structured (interrupted) to form track conductors for connecting the power semiconductor components.

For mechanical stabilization and heat removal, the DCB substrate is mounted on a metal plate serving as circuit substrate, typically soldered. This metal plate transfers the heat loss to a cooling system.

The circuit arrangement's passive components (particularly the resistors) are advantageously realized in thick film technology (i.e., printed on a ceramic substrate). This ceramic substrate, in a separate manufacturing step, is bonded to the circuit substrate adjacent to the DCB substrate (e.g., by means of heat conductive bonding).

The inherent disadvantage is that

separate process steps and technologies are required for soldering the DCB substrate and bonding the ceramic substrate to the circuit substrate, which is time-consuming and costly;

Connection (contacting) between the circuit arrangement's passive components mounted on the ceramic substrates and the active semiconductor components mounted on the DCB substrates is problematic due to the spatial separation. This requires long connecting leads and connecting lugs, which as parasitic inductances have a negative effect on the properties of the circuit arrangement or power module (generation of overvoltages, EMV problems).

DE 35 38 933 A1 furthermore shows a power module in which the ceramic substrate carrying the passive components is soldered directly to the DCB substrate carrying the active semiconductor components. Here, the solder connection performs a pure fixation and heat conducting function. Although this eliminates the additional process step of bonding, a large number of bond wires continue to be required for electric contacting of the passive components with the track conductor structure arranged on the DCB substrate. Bond wires, however are costly and susceptible to mechanical stresses.

›SUMMARY OF THE INVENTION

The object of the invention is to define a power module in accordance with the preamble of claim 1 with a simple structure and manufacturing process, in which these disadvantages are obviated.

According to the invention, this object is attained by the features of claim 1 .

Advantageous further developments of the power module and a process for its manufacture are the subject of the additional claims.

In the inventive power module, at least a portion of the passive components is realized by means of thick film technology (e.g., by depositing on a ceramic substrate a first print layer as the actual component and at least one additional print layer laterally adjacent to the first print layer acting as contact surface). The ceramic substrate thus printed (the thick film circuit) is placed on the upper side of the DCB substrate (the upper copper layer) suitably structured to form track conductors and connecting surfaces and is connected with the DCB substrate by soldering the contact surface(s) to the corresponding connecting surfaces of the DCB substrate. Connection (contacting) with the other semiconductor components arranged on the DCB substrate can be suitably effected either directly via track conductors or via bond wires. The DCB substrate is suitably connected with the circuit substrate of the circuit arrangement, e.g., soldered to this circuit substrate (e.g., a metal plate). Power dissipation of the passive components (particularly resistors) arranged on the ceramic substrate is removed via the ceramic substrate and the DCB substrate to the circuit substrate. During production, the ceramic substrates with the passive components (the resistors) can be soldered to the circuit substrate simultaneously to soldering the active semiconductor components and/or simultaneously to soldering the DCB substrate to the circuit substrate so that no separate process step is required. In other words, soldering the thick film circuit (passive components on ceramic substrate) can be executed simultaneously with soldering the active semiconductor components to the DCB substrate or simultaneously with soldering the active semiconductor components to the DCB substrate and the DCB substrate to the circuit substrate.

In addition to the components realized in thick film technology, other components (e.g., SMD components) can be mounted on the ceramic substrate and connected with the rest of the circuit arrangement by means of contact surfaces.

The advantages of said for manufacturing a power module are that

production complexity and thus cost of the power module are reduced by the simultaneously performed soldering process required for the passive components (the resistors) onto the active semiconductor components;

a simpler and more compact structure results due to the low number of connecting leads of the circuit arrangement and the reduced lead length of the possibly still present connecting leads;

overvoltages, and thus impairment of the functioning of the power module, are prevented due to the shorter lengths of the connecting leads and the reduced parasitic inductances.

›BRIEF DESCRIPTION OF THE DRAWING

Below, the inventive power module is described by means of an exemplary embodiment in conjunction with the drawing. The FIGURE shows a schematic view of the structure of the power module in a sectional drawing.

›DETAILED DESCRIPTION OF THE INVENTION

The power module's circuit arrangement 1 disposed, for example, on a circuit substrate 2 with the dimensions 99 mm×57 mm×3 mm comprises, for example, a plurality of power semiconductor components 11 (power transistors and power diodes) and a plurality of resistors 10 as shunts for measuring the transistor currents.

The carrier element provided for the power semiconductor components 11 , which are implemented as semiconductor devices, and the resistors 10 , which are realized in thick film technology, is a DCB substrate 3 , which is composed of a first copper layer 32 (structured to form track conductors and connecting surfaces), a ceramic layer 31 formed as an oxide layer, and a second (unstructured) copper layer 33 . The power semiconductor components 11 , e.g., the power transistors and power diodes formed as semiconductor devices (semiconductor chips), are soldered to the connecting surfaces of the first copper layer 32 (i.e., to the upper side of the DCB substrate 3 ) by means of solder 15 and are mechanically connected by this soldering process with the DCB substrate 3 (of the first copper layer 32 ) (particularly for removal of their power dissipation) and are electrically conducted via bond wires 12 . The resistors 10 from the resistor track 13 , the two contact surfaces 14 laterally adjoining the resistor track 13 (metallizations), and a protective layer (passivation) (not depicted) are printed on a ceramic substrate 21 . This ceramic substrate 21 , using contact surfaces 14 , is soldered to the connecting surfaces provided for this purpose on the upper side of DCB substrate 3 (first copper layer 32 ) (by means of solder 15 ). In production, this soldering process is preferably carried out simultaneously to soldering the power semiconductor components 11 onto DCB substrate 3 and DCB substrate 3 with the mounted active semiconductor components 11 and passive components 10 is subsequently soldered to circuit substrate 2 , which is formed, for example, by a metallic copper plate.

Claims as granted

14 claims

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Classifications

18 codes
IPC · International Patent Classification
Section H — Electricity
  • H01L25/16
  • H05K1/03
  • H05K3/34
  • H01L25/07
  • H01L25/18
USPC · US Patent Classification
361/760361/793174/260338/307361/738174/255338/308361/765174/257361/763.766-174/256338/309361/807

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File wrapper

⤢ drag to zoomJan 1998Jul 1998Jan 1999Jul 1999Jan 2000Jul 2000Jan 2001Jul 2001Jan 2002USPTOApplicantNon-final rejectionNon-final rejectionNotice of allowance
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Pendency
4.1 y
1,483 days filing → grant
Office actions
2
non-final + final
Responses
3
no RCE
Examiner
Leo P. Picard
art unit 2841 · TC 2800
Citations: 12 back · 7 forward

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