Plasma display panel and driving method thereof

1. Field of the Invention

This invention relates to a plasma display panel used for a flat display device, and more particularly to a plasma display panel that is adapted to shorten an addressing time and a driving method thereof.

2. Description of the Related Art

The conventional alternating current plasma display panel has cells arranged in a matrix pattern. As shown in FIGS. 1A and 1B, the cells of the plasma display panel(PDP) includes an upper glass substrate 10 and a lower glass substrate 12 which are spaced, in parallel, with a barrier rib 14 . The barrier rib 14 provides a discharge space isolated between the upper glass substrate 10 and the lower glass substrate 12 . On the bottom surface of the upper glass substrate 10 is installed a sustaining electrode pair 16 which consists of a scanning/sustaining electrode 16 A, hereinafter referred to as “Y sustaining electrode”, and a sustaining electrode 16 B, hereinafter referred to as “Z sustaining-electrode”. An upper dielectric layer 18 and a protective film 20 is sequentially formed on the bottom surface of the upper glass substrate 10 under which the sustaining electrode pair 16 is installed. The upper dielectric layer 18 accumulates electric charges, and the protective film 20 protects the upper dielectric layer 18 from a sputtering of plasma particles. The protective film 20 permits a life of the upper dielectric layer 18 to be prolonged, an emission efficiency of secondary electrons to be enhanced, and a change in a discharge characteristic due to an oxide contamination of a refractory metal to be restrained. To this end, the protective film 20 is mainly made from MgO. Meanwhile, the lower glass substrate 12 has an address electrode 22 provided on the surface thereof. On the lower glass substrate 12 provided with the address electrode 22 is coated a lower dielectric layer 24 for accumulating electric charges and a fluorescent layer 26 for emitting visible rays with intrinsic colors. The fluorescent layer 26 is coated on the lower glass substrate 12 in such a manner to be extended into a wall surface of the barrier rib 14 . The fluorescent layer 26 is excited and transited by an ultraviolet with a short wavelength generated during the gas discharge to thereby emit red(R), green(G), and blue(B) visible lights. A mixture gas of Ne and Xe is filled in the discharge space provided by the barrier rib 14 so as to enhance the generation efficiency of an ultraviolet.

As shown in FIG. 2, an alternating current PDP having the cells with the structure as described above includes electrode lines arranged in a matrix pattern. In the alternating current(AC) PDP of FIG. 2, the Y sustaining electrode lines 16 A and the Z sustaining electrode lines 16 B is alternately arranged in the vertical direction. The Y and Z sustaining electrodes 16 A and 16 B are crossed with address electrode lines 22 arranged, in parallel, in the horizontal direction. For instance, to construct the conventional VGA-class color PDP with 640×480 pixels requires 480 Y and Z sustaining electrode line pairs(i.e., Y 1 to Y 480 and Z 1 to Z 480 ) and 1920 address electrode lines (i.e., X 1 to X 1920 ). To require 1920 in the number of address electrode lines is caused by a fact that a single pixel consists of red, green and blue color pixel. Each of the Y and Z sustaining electrode line pairs 16 A and 16 B making row lines allows the cells to be scanned in the line unit and, at the same time, the discharge to be kept continuously. The address electrode lines 22 making column lines are used to write a data into each cell of the PDP.

The AC PDP with such an electrode structure is driven in a sub-field system as shown in FIG. 3 so as to display a gray level of color picture. As shown in FIG. 3, a PDP driving method of sub-field system divides a frame interval for displaying a single picture into a plurality of sub-fields, for example, 8 sub-fields SF 1 to SF 8 . Each of the plurality of sub-fields has a radiation interval increasing gradually in such a manner to have a brightness value of 2 0, 2 1, 2 2, . . . 2 X−2, 2 X−1 . The gray level of a color picture is implemented by a combination of such sub-fields. For instance, when a single frame interval is divided into 8 sub-fields as shown in FIG. 3, the gray level from 0 to 256 is implemented. Each sub-field is divided into an address interval for selecting cells causing the discharge in the cells of the PDP and a sustaining interval for causing the radiation at each cell of the PDP. The address interval has a constant time width independently of the sub-fields while the sustaining interval has a different time width depending on the sub-fields. A wall charge is formed at the side of Y sustaining electrode in the address interval at each cell of the PDP to be discharged in the sustaining interval. In order to form a wall charge selectively at the cells of the PDP in this manner, the sustaining electrode lines Y 1 to Y 480 must sequentially be selected and, at the same time, the address electrodes X 1 to X 1920 is supplied with a data each time the sustaining electrode lines Y 1 to Y 480 are selected. More specifically, if a low voltage of scanning pulse is applied to the first sustaining electrode line Y 1 and, simultaneously, a data pulse is applied to the address electrode lines X 1 to X 1920 , then a discharge is selectively generated from cells positioned at an intersection of the first Y sustaining electrode line Y 1 and the address electrode lines X 1 to X 1920 . At this time, a discharge is generated only from the cells connected to the address electrode lines X applied with a high level of data pulse in the address electrode lines X 1 to X 1920 and, simultaneously, a wall charge is formed at the side of first Y sustaining electrode Y 1 only at the cells as mentioned above. In the similar manner, a discharge is selectively generated by applying a low voltage of sustaining pulse to the second Y sustaining electrode line Y 2 to the last Y sustaining electrode Y 480 sequentially and, at the same time, applying a data pulse to the address electrode lines X 1 to X 1920 repeatedly. When such an address operation has been completed, a sustaining discharge is generated only from the cells formed with a wall charge by applying a sustaining voltage to each of the Y and Z sustaining electrode lines Y 1 to Y 480 and Z 1 to Z 480 simultaneously.

As described above, the conventional PDP driving method must sequentially select the Y sustaining electrode lines Y 1 to Y 480 every sub-field so as to select cells to be discharged. Due to this, the conventional PDP driving method can not help avoiding a long address interval. Also, the quantity of wall charges formed at the cells provided on the first row line in the course of the address interval becomes smaller than that formed at the cells provided on the last row lines. Due to this wall charge difference, a sustaining discharge appears non-uniformly on the panel. Such a non-uniformity in the sustaining discharge becomes more and more serious as the PDP has a tendency to a high picture quality. In view of this, it is required to provide a scheme capable of reducing the address interval.

Accordingly, it is an object of the present invention to provide a PDP that is adapted to shorten an address interval.

Further object of the present invention is to provide a PDP driving method that is suitable for shortening an address interval.

In order to achieve these and other objects of the invention, a plasma display panel according to one aspect of the present invention includes first and second sustaining electrode lines making each row line; and first and second address electrode lines making each column line. The plasma display panel further includes insulating material patterns formed in such a manner to be alternately superposed on the first and second address electrode lines as the row lines are progressed.

In a method of driving a plasma display panel according to another aspect of the present invention, an address discharge is simultaneously generated at two row lines by a data pulse applied to the first and second address electrode lines simultaneously and a voltage pulse synchronized with the data pulse to be applied to any one of the first and second sustaining electrode lines.

These and other objects of the invention will be apparent from the following detailed description of the embodiments of the present invention with reference to the accompanying drawings, in which:

FIGS. 1A and 1B are sectional views showing the cell structure of the conventional AC-system PDP;

FIG. 2 is a schematic view showing the electrode structure of the convention PDP;

FIG. 3 is a view for explaining the conventional PDP driving method;

FIG. 4 is a schematic view showing the electrode structure of a PDP electrode according to an embodiment of the present invention;

FIG. 5 is a sectional view showing the cell structure of a PDP electrode according to an embodiment of the present invention;

FIG. 6 is a detailed view showing the electrode structure of a PDP electrode with the cells in FIG. 5 according to an embodiment of the present invention; and

FIG. 7 is a schematic view showing the electrode structure of a PDP electrode according to another embodiment of the present invention.

Referring to FIG. 4, there is shown the electrode structure of a PDP according to an embodiment of the present invention. The PDP 32 includes Y and Z sustaining electrode line pairs Y 1 to Y 480 and Z 1 to Z 480 arranged, in parallel, in the vertical direction, and address electrode line pairs Xa 1 to Xa 1920 and Xb 1 to Xb 1920 arranged in the horizontal direction. A single cell 34 is formed at each intersecting position of the sustaining electrode line pairs Y 1 to Y 480 and Z 1 to Z 480 with the address electrode lines Xa 1 to Xa 1920 and Xb 1 to Xb 1920 . In the case of forming a color PDP with 640×480 pixel number, generally, 480 Y and Z sustaining electrode line pairs Y 1 to Y 480 and Z 1 to Z 480 and 1920 address electrode line pairs Xa 1 to Xa 1920 and Xb 1 to Xb 1920 are required. The necessity of the 1920 address electrode line pairs Xa 1 to Xa 1920 and Xb 1 to Xb 1920 is caused by a fact that a single pixel consists of R, G and B pixels. The Y and Z sustaining electrode line pairs Y 1 to Y 480 and Z 1 to Z 480 making row lines allows pixels to be scanned in the line unit and, at the same time, a discharge generated from the pixels in the line unit to be maintained. The address electrode line pairs Xa 1 to Xa 1920 and Xb 1 to Xb 1920 making column lines is mainly used for the data input.

Referring now to FIG. 5, there is shown the structure of a cell included in a PDP according to an embodiment of the present invention. The cell of the PDP includes an upper glass substrate 36 and a lower glass substrate 38 which are spaced, in parallel, with a barrier rib 40 . The barrier rib 40 provides a discharge space isolated between the upper glass substrate 36 and the lower glass substrate 38 . On the bottom surface of the upper glass substrate 36 is installed a sustaining electrode pair 42 which consists of a Y sustaining electrode and a Z sustaining electrode. An upper dielectric layer 44 and a protective film 46 are sequentially formed on the bottom surface of the upper glass substrate 36 provided with the sustaining electrode pair 42 . The upper dielectric layer 44 accumulates electric charges, and the protective film 46 protects the upper dielectric layer 44 from a sputtering of plasma particles. The protective film 46 permits a life of the upper dielectric layer 44 to be prolonged, an emission efficiency of secondary electrons to be enhanced, and a change in a discharge characteristic due to an oxide contamination of a refractory metal to be restrained. To this end, the protective film 46 is mainly made from MgO. Meanwhile, the lower glass substrate 38 has first and second address electrodes 48 A and 48 B installed, in parallel, on the surface thereof. On the lower glass substrate 38 provided with the first and second address electrodes 48 A and 48 B is evenly formed a lower dielectric layer 50 for accumulating electric charges. An insulating material pattern 52 is formed on the lower dielectric layer 50 in such a manner to be overlapped with the second address electrode 48 B. The insulating material pattern 52 prevents a generation of discharge even when a data pulse is applied to the second address electrode 48 B. Such an insulating material pattern 52 is formed on the lower dielectric layer 50 in such a manner to be overlapped with the first address electrode 48 A instead of the second address electrode 48 B along the sustaining electrode line 42 . The barrier rib 40 and a fluorescent layer 54 for emitting visible rays with intrinsic colors are sequentially formed on the lower dielectric layer 50 provided with the insulating material pattern. The fluorescent layer 54 is coated on the lower glass substrate 50 in such a manner to be extended into a wall surface of the barrier rib 50 . The fluorescent layer 54 is excited and transited by an ultraviolet with a short wavelength generated during the gas discharge to thereby emit red(R), green(G), and blue(B) visible lights. A mixture gas of Ne and Xe is filled in the discharge space provided by the barrier rib 40 so as to enhance the generation efficiency of an ultraviolet. Such a structure of PDP cell permits a wall charge to be formed on the upper and lower dielectric layers 44 and 50 when an address discharge is generated between the first address electrode 48 A and any one of the sustaining electrode pair 42 . Then, when a sustaining voltage is applied to the sustaining electrode pair 42 , the PDP cell allows a sustaining discharge to be continuously generated, thereby producing a vacuum ultraviolet. At this time, a florescent body making the fluorescent layer 54 is excited and transited repeatedly by the vacuum ultraviolet to thereby emit visible rays.

Referring to FIG. 6, there is shown a layout of a PDP having the cells with the structure in FIG. 5 according to an embodiment of the present invention. In FIG. 6, each of the insulating material patterns 52 is overlapped with all the sustaining electrode pairs 40 and with any one of the first and second address electrodes 48 A and 48 B, more specifically, the insulating material patterns 52 overlapped with the odd-numbered sustaining electrode pair Y 1 and Z 1 are superposed on the second address electrode 48 B while the insulating material patterns 52 overlapped with the even-numbered sustaining electrode pair Y 2 and Z 2 are superposed on the first address electrode 48 A.

In the PDP according to the present invention having the structure as shown in FIG. 4 to FIG. 6, the cells is addressed for each two line. More specifically, during the address discharge, a low voltage of sustaining pulse is applied to the odd-numbered and even-numbered Y sustaining electrodes Y 1 and Y 2 and, at the same time, a data pulse is applied to the first and second address electrodes Xa 1 to Xa 1920 and Xb 1 to Xb 1920 . At this time, a data pulse for selecting cells at the odd-numbered lines is applied to the first address electrodes Xa 1 to Xa 1920 while a data pulse for selecting cells at the even-numbered lines is applied to the second address electrodes Xb 1 to Xb 1920 . In the cells at the odd-numbered lines, only an address discharge caused by the odd-numbered Y sustaining electrode Y 1 and the first address electrode Xa is selectively generated, whereas an address discharge caused by the odd-numbered Y sustaining electrode Y 1 and the second address electrode Xb is not generated. This results from the insulating material pattern 52 being overlapped with the second address electrode Xb. In the similar manner, in the cells at the even-numbered lines, only an address discharge caused by the even-numbered Y sustaining electrode Y 2 and the second address electrode Xb is selectively generated, whereas an address discharge caused by the even-numbered Y sustaining electrode Y 2 and the first address electrode Xa is not generated. This results from the insulating material pattern 52 being overlapped with the first address electrode Xa. In the PDP according to an embodiment of the present invention as described above, the cells are simultaneously addressed for each two line to shorten an addressing time into a half. In addition, a difference of a wall charge quantity accumulated on the cell at the last line from that accumulated on the cell at the first line can be reduced. Accordingly, the sustaining discharge appears uniformly on the panel.

Referring now to FIG. 7, there is shown an electrode structure of a PDP according to another embodiment of the present invention. The PDP 56 includes Y and Z sustaining electrode pairs Y 1 to Y 8 and Z 1 to Z 8 arranged, in parallel, in the vertical direction. Further, the PDP 56 includes first address electrodes Xa 1 to Xa 6 arranged, in parallel, in the horizontal direction at the upper half thereof, and third address electrodes Xc 1 to Xc 6 arranged, in parallel, in the horizontal direction at the lower half thereof. furthermore, the PDP 56 includes second address electrodes Xb 1 to Xb 6 arranged, in parallel, in the horizontal direction at the upper edge thereof, and fourth address electrodes Xd 1 to Xd 6 arranged, in parallel, in the horizontal direction at the lower edge thereof. The first address electrodes Xa 1 to Xa 6 are crossed with the first to fourth Y and Z sustaining electrode pairs Y 1 to Y 4 and Z 1 to Z 4 while the second address electrodes Xc 1 to Xc 6 are crossed with the fifth to eighth Y and Z sustaining pairs Y 5 to Y 8 and Z 5 and Z 8 . The second address electrodes Xb 1 to Xb 6 are crossed with the first and second Y and Z sustaining electrode pairs Y 1 , Y 2 , Z 1 and Z 2 while the fourth address electrodes Xd 1 to Xd 6 are crossed with the seventh and eighth Y and Z sustaining electrode pairs Y 7 , Y 8 , Z 7 and Z 8 . Each second address electrode Xb 1 to Xb 6 is installed in a single cell with making one set together with the first address electrodes Xa 1 to Xa 6 while each fourth address electrode Xd 1 to Xd 6 is installed in a single cell with making one set along with the third address electrodes Xc 1 to Xc 6 . Also, an insulating material pattern 52 is superposed on each of the first and third address electrodes Xa 1 to Xa 6 and Xc 1 to Xc 6 . The insulating material patterns 52 superposed on the first address electrodes Xa 1 to Xa 6 are formed in such a manner to be overlapped with the first and second sustaining electrodes Y 1 , Y 2 , Z 1 and Z 3 , thereby allowing cells at the third and fourth Y and Z sustaining electrode pairs Y 3 , Y 4 , Z 3 and Z 4 to be addressed with the first address electrodes Xa 1 to Xa 6 . The insulating material patterns 52 superposed on the third address electrodes Xc 1 to Xc 6 are formed in such a manner to be overlapped with the seventh and eighth Y and Z sustaining electrodes Y 7 , Y 8 , Z 7 and Z 8 , thereby allowing cells at the fifth and sixth Y and Z sustaining electrode pairs Y 5 , Y 6 , Z 5 and Z 6 to be addressed with the third address electrodes Xc 1 to Xc 6 .

In the PDP with the electrode structure as described above, the cells are addressed for each 4 line. More specifically, during the address discharge, a low voltage of sustaining pulse is applied to the odd-numbered Y sustaining electrodes Y 1 , Y 3 , Y 5 and Y 7 and, at the same time, a data pulse is applied to the first to fourth address electrodes Xa 1 to Xa 6 , Xb 1 to Xb 6 , Xc 1 to Xc 6 and Xd 1 to Xd 6 . At this time, a data pulse for selecting the cells at the third line is applied to the first address electrodes Xa 1 to Xa 6 ; a data pulse for selecting the cells at the first line to the second address electrodes Xb 1 to Xb 6 ; a data pulse for selecting the cells at the fifth line to the third address electrodes Xc 1 to Xc 6 ; and a data pulse for selecting the cells at the seventh line to the fourth address electrodes Xd 1 to Xd 6 . Only an address discharge caused by the first Y sustaining electrode Y 1 and the second address electrode Xb is selectively generated from the cells at the first line while an address discharge caused by the first Y sustaining electrode Y 1 and the first address electrode Xa is not generated. This results from the insulating material pattern 52 being superposed on the first address electrode Xa. In the similar manner, only an address discharge caused by the seventh Y sustaining electrode Y 7 and the fourth address electrode Xd is selectively generated from the cells at the seventh line while an address discharge caused by the seventh Y sustaining electrode Y 7 and the third address electrode Xc is not generated. This results from the insulating material pattern 52 being superposed on the third address electrode Xc. In addition, the cells at the third line selectively generate an address discharge, and the cells at the fifth line selectively generate an address discharge caused by the fifth Y sustaining electrode Y 5 and the third address electrode Xc.

In the PDP according to another embodiment of the present invention as described above, the cells are simultaneously addressed for each 4 line to shorten an address time into ¼. In addition, a difference between a wall charge quantity accumulated to the cell at the first line and a wall charge quantity accumulated to the cell at the last line. Accordingly, a sustaining discharge appears uniformly on the panel.

As described above, in the PDP and the driving method thereof according to the present invention, two address electrode lines are arranged in parallel every column, thereby addressing two row lines simultaneously. Accordingly, the PDP and the driving method thereof according to the present invention is capable of shortening the address time into a half in comparison to the prior art. Also, the PDP and the driving method thereof according to the present invention allows the address electrode lines to be separated into the upper and lower parts, thereby shortening the address time into ¼ in comparison to the prior art. As a result, the sustaining discharge can be uniformly generated on the panel by shortening the address time.

Although the present invention has been explained by the embodiments shown in the drawings described above, it should be understood to the ordinary skilled person in the art that the invention is not limited to the embodiments, but rather that various changes or modifications thereof are possible without departing from the spirit of the invention. Accordingly, the scope of the invention shall be determined only by the appended claims and their equivalents.