Software encoding using a combination of two types of encoding and encoding type identification information

The present invention relates to techniques for the encoding of data including character, voice, animation, still image, program, or other data, and to techniques for the decoding of these kinds of encoded data.

For software distribution, a method of encrypting character, voice, animation, still image, program or other data and storing this data on floppy disks, CD-ROMs, magneto-optical disks (MO), or other media, and selling these media, may be employed, or a method of encoding the data and delivering the data to users through a communications circuit, as well as other methods, may be employed.

In previous encoding methods of this kind, the provider has, for example, encoded a program with a single algorithm and provided it to the user, and the user has performed the decoding operation using a so-called “key” also provided to the user.

However, when the key possessed by the user is obtained by a wrongful user, there is a fear that a copy will be created based on the results of a decoding using the wrongfully obtained key. If a large amount of these copies are circulated, the provider will be forced to incur a substantial loss.

The present invention has been created bearing this problem in mind, by noting that many types of software have a special characteristic of under going an upgrade after only a brief period of time. The present invention provides an encoding combination method whereby the encoding algorithm may be changed periodically or for each software upgrade.

The present invention employs two or more basic encoding algorithms for encoding software. Conversely, for software decoding processing (the software encoding apparatus), basic decoding algorithms are prepared that correspond to these two or more encoding algorithms. Then, the software encoding apparatus transfers, along with the encoded software combination identification information identifying the encoded algorithms used for encoding to the software decoding means (the software decoding apparatus).

The above-mentioned basic encoding algorithm performs at a minimum the processing necessary to convert input data into random like data. For example, convert input data into rearranged data or replaced data. In addition, exclusive-OR of the input data and other random data can be output.

Based on the previously mentioned algorithm combination identification information, the software decoding means selects basic decoding algorithms from among those that it possesses, and decodes the previously mentioned encoded software.

Within the previously mentioned means, when the software is input into the software encoding apparatus, it is encoded with a selected basic algorithm combination (for example, A 1 and A 3 ). Software that has been encoded in this way is distributed to the user in the form of a CD-ROM or via a communications circuit. The user decodes this encoded software with a decoding apparatus that he or she possesses. At this time, the user decodes the relevant encoded software based on or responsive to the encoding combination identification information (for example, A 1 ¦ ¦A 3 ) used by the encoding apparatus. This combination information may be delivered to the user on the same medium as the encoded software, or on a different medium, or it may be communicated to the user along with non-illustrated key information (K).

Moreover, the combination identification information may be encoded by using an algorithm.

Each of the individual algorithms are relatively easy to analyze. However, the combining of these algorithms increases the difficulty of analysis. Therefore, even though each individual algorithm may easily be grasped on its own or separately, since there is an enormous amount of possible algorithm combinations, it would require significant time and effort to analyze a combination of algorithms, making such an analysis difficult in reality. Even if there were to be a possibility of such an analysis occurring, if for every software upgrade, the software is encoded with a new combination of algorithms, the most recent software upgrade cycle will be sufficient to cover for such a possibility.

In fact, if hackers should attempt to decode the combinations of the encoded algorithms has such a large number they will likely abandon the attempt.

FIG. 1 is a theoretical diagram of the present invention.

FIG. 2 is a configuration diagram of the hardware of a preferred embodiment of the present invention.

FIG. 3 is a functional block diagram of the system configuration of a preferred embodiment of the present invention.

FIG. 4 is an explanatory diagram showing an algorithm table of a preferred embodiment of the present invention.

FIG. 5 is an explanatory diagram showing a concrete example of a transposition type algorithm.

FIG. 6 is an explanatory diagram showing a concrete example of a character conversion type algorithm.

FIG. 7 is an explanatory diagram showing a concrete example of an exclusive-or algorithm.

FIG. 8 is an explanatory diagram showing a concrete example of a multiplication type algorithm.

FIG. 9 is an explanatory diagram showing a concrete example of DES type combination processing.

FIG. 10 is an explanatory diagram showing a concrete example of an ENIGMA combination.

FIG. 11 is an explanatory diagram showing a concrete example of a case where a transposition type algorithm (A 1 ) is combined with a character conversion type algorithm (A 3 ) for the performing of ENIGMA type combination processing.

FIG. 12 is an explanatory diagram showing a concrete example of a case where encoded software that has been encoded with the combination processing of FIG. 11 is decoded.

FIG. 13 is an explanatory diagram showing the hardware configuration of this invention.

Prior to an explanation of a preferred embodiment of the present invention, the basic theory behind the present invention will be explained.

As shown in FIG. 1, in the present invention, when software is to be encoded, two or more basic encoding algorithms are employed. Conversely, for software decoding processing (the software encoding apparatus), basic decoding algorithms are prepared that correspond to these two or more basic encoding algorithms. Furthermore, the software encoding apparatus transfers, along with the encoded software, combination information identifying the basic encoded algorithms used for the encoding to the software decoding means (the software decoding apparatus).

Based on the previously mentioned basic algorithm combination information, the software decoding means selects from among basic decoding algorithms that it possesses, and decodes the previously mentioned encoded software.

In this way, when the software is input into the software encoding apparatus, it is encoded with a selected basic algorithm combination (for example, A 1 and A 3 ). Software that has been encoded in this way is distributed to the user in the form of a CD-ROM or via a communications circuit. The user decodes this encoded software with a decoding apparatus that he or she possesses. At this time, the user decodes the relevant encoded software based on the encoding combination identification information (for example, A 1 ¦ ¦A 3 ) used by the encoding apparatus. This combination information may be delivered to the user on the same medium as the encoded software, or on a different medium, or it may be communicated to the user along with non-illustrated key information (K).

FIG. 2 and FIG. 13 show the hardware configuration of the software encoding apparatus that is a preferred embodiment of the present invention.

An IC card slot (ICR), a floppy disc drive (FD) and a hard disk drive (not shown in figures) are installed in a main body of the computer (BDY).

A modem (MDM) and a receiver (not shown in figures) can be built into the main body of the computer (BDY) and data maybe transmitted or received through cable or the wireless route through the ANT.

A keyboard (KEY) and a mouse (MOU) are connected with the main body of the computer (BDY) as input devices.

A display (CRT) and a printer (PRN) are connected with the main body of a computer (BDY) as output devices.

An optical disk drive (MOD) is connected with the main body of the computer (BDY) as an external storage device.

Within the diagram, BUS is the bus, indicating both the control bus and the data bus. CPU is the central processing unit, and a 32-bit or a 64-bit processor is used. MEM is the memory, which stores the encoding combination table, to be described below, and an address specified by the operation domain. KEY is the keyboard, which is used to perform the input of commands into this apparatus, and to input key information (K). FD is the floppy disk apparatus, which reads out the software for performing encoding processing.

Although only a floppy disk is shown as the software provision means, such means is not limited to this alone: a magneto-optical disk or a communications circuit may also be used. Moreover, the memory MEM or a buffer within the central processing unit CPU may also function as the software provision means.

ICR is the IC card reader, and it is possible to equip the system with a PCMCIA card that conforms to the JEIDA (Japan Electronic Industry Development Association) standard. In the present preferred embodiment, the algorithms A 1 , A 2 , A 3 . . . An to be discussed below are provided by being stored on the IC card. It is desirable to provide physical protection for this IC card; for example, the data thereon may be completely erased by a wrongful access of the card by a user, or card read-out may be prevented. Furthermore, the configuration of the multiple algorithms on this card may be changed following a prescribed fixed period. If the arrangement or contents of the algorithms stored in this card are renewed periodically, the decoding of the software may be limited to a certain period of time, enabling it to be used as demonstration software, or as specific-system software for limited uses.

MOD is the magneto-optical disk apparatus, which is able to read from and write onto a magneto-optical disk with a capacity of 100 megabytes or more. Also, IF is the communication interface, which is connected to an external communications circuit.

Besides the above apparatus configuration, a CD-ROM sampling apparatus, for example, may also be connected.

Although the above is an explanation of the software encoding apparatus of FIG. 2, the software decoding apparatus has the same configuration. However, when this apparatus is used as the software decoding apparatus, a CD-ROM drive may also be provided. In other words, as a medium for distributing voice, still image, animation, and other large amounts of data, the CD-ROM is appropriate.

FIG. 3 shows a functional block diagram of the system configuration of the present preferred embodiment. Within the diagram, the upper tier shows the functions of the software encoding apparatus, while the lower tier shows the functions of the software decoding apparatus.

To explain the relationship between the functions shown in FIG. 3 and the hardware explained with FIG. 2, the algorithm programs (A 1 , A 2 . . . An) shown in FIG. 3 is provided by being stored on the IC card. Also, selection processing, combination processing, and combination program processing are functions realized by using the central processing unit (CPU). Key information (K) is input using the keyboard (KEY). Also, the software storage file is input via the floppy disk apparatus (FD) or the magneto-optical disk apparatus (MOD), and is written into the memory (MEM).

Next, FIG. 3 will be used to explain the software encoding processing.

First, the basic algorithms to be used for software encoding processing are determined through selection processing by the central processing unit (CPU). Here, processing is performed whereby two or more encoding algorithm programs are selected. The selection of algorithms may be performed, for example, using algorithm tables, such as those shown in FIG. 4, which have been established within the memory (MEM).

As shown in the same diagram, n number (A 1 , A 2 . . . An) of algorithms are provided in a matrix form within the algorithm table. In this way, when n number of basic elements (algorithms) are used to form separate combinations of two algorithms, when overlapping is permitted, n 2 algorithm combinations can be formed.

Conversely, in a case where any desired number n of basic elements (algorithms) are combined in tandem, and when different combinations are performed for each element (algorithm), a maximum of n! algorithm combinations may be obtained. Furthermore, when overlapping combinations (exchanges) are permitted, a maximum n n algorithm combinations may be formed.

For example, algorithms A 1 and A 2 may be combined to form A 1 ¦ ¦A 2 , or a combination of three algorithms may be performed to form, for example, A 1 ¦ ¦A 2 ¦ ¦A 3 . Also, the same algorithm may be combined in L steps, such as A 1 ¦ ¦A 1 ¦ ¦ . . . ¦ ¦A 1 .

In this way, with the present preferred embodiment, since a multiple number of algorithm combinations may be formed, even if, for example, individual basic algorithms are easily analyzable on their own, by combining these basic algorithms together, an algorithm that is difficult to analyze may be obtained.

Next, a concrete algorithm example will be explained. FIG. 5 shows a concrete example of a transposition type basic algorithm. In other words, with this algorithm, a key linkage switching switch is provide as a program, and for every 8 bits of data, bit locations are transposed and then output. Key information (K) provided from an external source controls the transposition locations. Moreover, although input/output is shown as an 8-bit configuration in the diagram, the invention is not limited to such a configuration. This kind of transposition type algorithm may, for example, be registered or stored as “A 1 ” in the algorithm table described previously.

FIG. 6 shows a concrete example of a character conversion type basic algorithm. With this algorithm, output data corresponding to input data is placed in a table and saved. Moreover, although input/output is shown as a 3-bit configuration in the diagram, naturally, the invention is not limited to such a configuration. This kind of character conversion type algorithm may, for example, be registered or stored as “A 2 ” in the algorithm table described previously.

FIG. 7 shows a concrete example of an exclusive-or algorithm. With this algorithm for example, key information (K) may be used to control exclusive-or logic processing on each bit. Moreover, although input/output is shown in a 3-bit configuration in the diagram, naturally, the number of bits is not limited to three. This kind of exclusive-or algorithm may, for example, be listed as “A 3 ” in the algorithm table described previously.

FIG. 8 shows a concrete example of a multiplication type algorithm. In this diagram, when 8-bit data is input, after this input data is multiplied with the multiplier device using the key information (K), data that has been masked with the output masking circuit is output. This kind of multiplication type algorithm may, for example, be registered as “A 4 ” in the algorithm table described previously.

After algorithms from the multiple algorithms, such as those described above, are selected by the “selection processing” of the central processing unit (CPU), combination processing (encoding execution means) is performed. FIG. 9 and FIG. 10 show concrete examples of this combination processing.

FIG. 9 shows an example of a DES type combination.

Within the diagram, when software data is input, it is divided into groups of a prescribed number of bits (for example, after every 8 bits), and processing is performed on these groups. Here, the said 8-bit data is divided into left-half data (D 1 ) which comprises the 4 high-order bits, and right-half data (D 2 ) which comprises the 4 low-order bits.

Then, the right-half data (D 2 ) is processed with the A 1 algorithm, and is output as encoded data C 1 .

The left-half data (D 1 ) undergoes exclusive-or logic processing along with the previously mentioned encoded data (C 1 ), and is output as encoded data (D 1 +C 1 ).

Conversely, the exclusive-or logic processing of output data that includes the left-half data (D 1 ) and the A 1 algorithm output data (C 1 ) is processed with the A 2 algorithm, and is output as encoded data C 2 . This encoded data C 2 undergoes exclusive logic processing along with the right-half data (d 2 ), and is output as encoded data (D 2 +C 2 ).

Although the decoding processing for FIG. 9 is not shown in a diagram, it is sufficient to prepare a system whereby an A 1 decoding algorithm replaces the A 1 program, and an A 2 decoding algorithm replaces the A 2 program shown in FIG. 9 .

FIG. 10 shows an example of an ENIGMA combination. In this example, after input software is primarily changed with the A 1 algorithm, it undergoes a secondary change with the A 2 program.

Also, as shown in the left half of the diagram, in the case where this is to be decoded, it is first primarily decoded with the decode algorithm A 2 −1 of algorithm A 2 . By then performing a secondary decoding with the decode algorithm A 1 −1 of algorithm A 1 , the software can be returned to its original form.

Next, by using FIG. 11, an even more concrete preferred embodiment of an algorithm is explained. In this case, a transposition type algorithm (A 1 ) is combined with a character conversion type algorithm (A 2 ), and ENIGMA type combination processing is performed.

First, key information (K) is provided to the key linkage switching switch. This key information (K) is information that prescribes how each bit of input 8-bit data will be transposed for output. In the diagram, the following key information (K) settings are provided to the key linkage switching switch: #1 bit→#7 bit, #2 bit→#3 bit, #3 bit→#2 bit, #4 bit→#5 bit, #5 bit→#1 bit, #6 bit→#8 bit, #7 bit→#6 bit, #8 bit→#4 bit.

Here, when software data (ordinary character data) “OFh”—in other words, “00001111”—is provided, with the key linkage switching switch as prescribed with the previously described key information (K), the following transpositions occur: the #1 bit “0” becomes the #7 bit, the #2 bit “0” becomes the #3 bit, the #3 bit “0” becomes the #2 bit, the #4 bit “0” becomes the #5 bit, the #5 bit “1” becomes the #1 bit, the #6 bit “1” becomes the #8 bit, the #7 bit “1” becomes the #6 bit, and the #8 bit “1” becomes the #4 bit. As a result, the switching result with algorithm A 1 is “10010101”, in other words, “95h”.

Next, the primary encoded data “95h” that has been encoded with algorithm A 1 then undergoes secondary encoding with the character conversion algorithm A 2 .

Here, the input data (95h) is first divided into left-half data, which comprises the 4 high-order bits, and right-half data, which comprises the 4 low-order bits. Then, conversion is performed based on each conversion table. As a result, the secondary encoded output data becomes “00100000”, in other words, “20h”.

Next, as shown in FIG. 3, the above selection processing, combination processing, and combination program processing is performed, and encoded software is created. This encoded software is then saved on a medium such as an MO, a CD-ROM, or a floppy disk, etc., and is sent (delivered) to the user by the provider. Also, it may be transmitted to the user through an interface (I/O) via a communications circuit. Also, at this time, the algorithm selection order code (identification information)—for example, the previously mentioned code “A 1 ¦ ¦A 2 ”—is stored on the MO, the CD-ROM, the floppy disk, etc., that is the medium along with the encoded software. Also, in the case of communication transmission, this code may also be sent with the encoded software along the communications route. Furthermore, this selection order code may be communicated from the provider to the user along a separate delivery route than the previously mentioned encoded software; for example, it may be explained verbally over the telephone, etc. Moreover, the selection order code may be provided to the user together with the key information (K).

After the user has received the previously mentioned encoded software and selection order code, with the decoding apparatus on the user side, based on the previously mentioned selection order code information, decoding algorithms are selected, combination processing and combination program processing is performed, and decoded software is obtained.

FIG. 12 shows a concrete example of this decoding processing.

Within the diagram, for every 8 bits (20h) of encoded data from the encoded software, after dividing the 4 high-order bits into left half data, and the 4 low-order bits into the right half data, first character conversion is executed on these with algorithm A 2 −1 . The primary encoded data (95h) obtained with this character conversion further undergoes transposition conversion with the transposition type basic algorithm A 1 −1 , and decode data “00001111”—in other words, “0Fh”—is obtained.