Pixel circuit

This application claims the priority benefit of Taiwan application serial no. 112127431, filed on Jul. 21, 2023. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

The present disclosure relates to an electronic device, and in particular to a pixel circuit.

In current technical field, pixel circuits are able to control light-emitting elements to emit light in a multi-emission through pulse width modulation technology and pulse amplitude modulation technology, as well as adjust brightness and grayscale. However, generally speaking, pixel circuits normally adopt multiple transistors and capacitor elements. By simplifying the structure of the pixel circuit, it is possible to reduce layout difficulty and decrease power consumption. In addition, in display conditions with low grayscale values, due to the variations in the threshold voltage of the transistor in the pixel circuit, the current that drives the light-emitting element to emit light might not be able to reach the expected current value, resulting in insufficient luminous brightness and uneven brightness, which consequently affect display quality.

The present disclosure provides a pixel circuit that may effectively simplify the circuit structure of a pixel circuit for multi-emission.

The pixel circuit of the present disclosure includes a light-emitting element, a drive current generator, a pulse width signal generator and a multiple lighting controller. The light-emitting element is coupled to a power supply voltage. The drive current generator is coupled to the light-emitting element and provides a drive current through the drive current path to drive the light-emitting element. The pulse width signal generator provides the pulse width signal to the control terminal of the light-emitting control switch on the drive current path. The multiple lighting controller is coupled between the control terminal of the light-emitting control switch and the drive current generator, and adjusts the pulse width signal according to the multiple emission control signal to allow the light-emitting element to perform multi-emission.

Based on the above, the pulse width signal generator of the present disclosure may provide the pulse width signal to the control terminal of the light-emitting control switch on the drive current path of the drive current generator, and the multiple lighting controller may adjust the pulse width signal provided by the pulse width signal generator according to the multiple emission control signal to allow the light-emitting element to perform multi-emission. In this way, the multiple lighting controller is utilized to adjust the pulse width signal provided by the pulse width signal generator according to the multiple emission control signal to allow the light-emitting element to perform multi-emission, which may effectively simplify the circuit structure of the pixel circuit for multi-emission and reduce the number of switches on the drive current path, thereby decreasing power consumption.

FIG. 1 is a schematic diagram of a pixel circuit according to an embodiment of the present disclosure.

FIG. 2 is a schematic diagram of a pixel circuit according to another embodiment of the present disclosure.

FIG. 3 shows an operation waveform diagram of a pixel circuit according to an embodiment of the present disclosure.

FIG. 4 is a schematic diagram of a pixel circuit according to another embodiment of the present disclosure.

Please refer to FIG. 1 , which is a schematic diagram of a pixel circuit according to an embodiment of the present disclosure. A pixel circuit 100 includes a light-emitting element LD, a drive current generator 102 , a pulse width signal generator 104 and a multiple lighting controller 106 . The light-emitting element LD may be, for example, a light-emitting diode having an anode coupled to a power supply voltage VDD, a cathode of the light-emitting element LD is coupled to the drive current generator 102 , and the multiple lighting controller 106 is coupled to the drive current generator 102 and the pulse width signal generator 104 .

The drive current generator 102 may provide the drive current ILD 1 to drive the light-emitting element LD through the drive current path. A light-emitting control switch SW 1 is disposed on the drive current path. The pulse width signal generator 104 may provide the pulse width signal PWM 1 to the control terminal of the light-emitting control switch SW 1 on the drive current path through the multiple lighting controller 106 to control the light-emitting element LD to emit light. In addition, the multiple lighting controller 106 may adjust the pulse width signal PWM 1 according to the multiple emission control signal mEMn to allow the light-emitting element LD to perform multi-emission.

In this way, the multiple lighting controller 106 is utilized to adjust the pulse width signal PWM 1 provided by the pulse width signal generator 104 according to the multiple emission control signal mEMn to allow the light-emitting element LD to perform multi-emission. Accordingly, it is possible to effectively simplify the circuit structure of the pixel circuit 100 for multi-emission, reduce the number of switches on the drive current path, thereby decreasing power consumption.

Furthermore, the implementation of the pixel circuit 100 may be shown in FIG. 2 . In the embodiment of FIG. 2 , the drive current generator 102 includes transistors T 1 to T 7 and a capacitor C 1 , wherein the transistor T 3 is configured for implementation of the light-emitting control switch SW 1 . The transistor T 1 is coupled between the cathode of the light-emitting element LD and the reference voltage Vref 1 , the transistors T 2 and T 3 are connected in series between the cathode of the light-emitting element LD and the reference ground voltage VSS, and the transistors T 4 and T 6 are connected in series between the cathode of the light-emitting element LD and the data voltage Vdata 1 , wherein the data voltage Vdata 1 is configured to determine the current magnitude of the drive current ILD 1 . The capacitor C 1 is coupled between the common junction of transistors T 4 and T 6 and the control terminal of the transistor T 2 . The transistor T 5 is coupled between the common junction of the transistors T 2 and T 3 and the control terminal of the transistor T 2 . The transistor T 7 is coupled between the control terminal of the transistor T 2 and the reference voltage Vref 2 . The multiple lighting controller 106 may include a transistor T 8 and a capacitor C 2 . The transistor T 8 is coupled between the control terminal of the transistor T 3 and the reference voltage Vref 2 . The capacitor C 2 is coupled between the control terminal of the transistor T 3 and the reference voltage Vref 3 .

In addition, the pulse width signal generator 104 may include transistors T 9 to T 14 and a capacitor C 3 , wherein the first terminal of the transistor T 9 is coupled to the control terminal of the transistor T 3 , and the transistor T 10 and the transistor T 12 are connected in series between the reference voltage Vref 3 and the second terminal of the transistor T 9 . The transistor T 11 is coupled between the common junction of the transistors T 10 and T 12 and the data voltage Vdata 2 , wherein the data voltage Vdata 2 is utilized to determine the pulse width of the pulse width signal PWM 1 provided by the pulse width signal generator 104 . The capacitor C 3 is coupled between the control terminal of the transistor T 12 and the sweep voltage VSPn. The transistors T 13 and T 14 are coupled between the second terminal of the transistor T 9 and the reference voltage Vref 2 . The common junction of the transistors T 13 and T 14 are coupled to the control terminal of the transistor T 12 .

The operation waveform of the pixel circuit 100 in the embodiment of FIG. 2 may be as shown in FIG. 3 , for example. During the reset period P 1 , the transistors T 7 and T 14 are turned on under the control of the previous-stage scan signal S 1 n - 1 , the transistors T 1 , T 5 , T 11 , and T 13 are turned off under the control of the scan signal S 1 n , the transistors T 4 , T 9 and T 10 are turned off under the control of the emission control signal EMn, the transistor T 6 is turned on under the control of the emission control signal EMn, and the transistor T 8 is turned on under the control of the multiple emission control signal mEMn. In addition, the transistor T 2 is turned on (conducted) by the reference voltage Vref 2 due to the conduction of the transistor T 7 , the transistor T 3 is turned off (disconnected) by the reference voltage Vref 2 due to the conduction of the transistor T 8 , and the transistor T 12 is turned on by the reference voltage Vref 2 due to the conduction of the transistor T 14 . Therefore, during the reset period P 1 , the voltages VA, VD, and VG of nodes A, D, and G shown in FIG. 2 are equal to the reference voltage Vref 2 , and the voltage VB of node B is equal to the power supply voltage VDD minus the cross voltage on the light-emitting element LD. The voltage VC of the node C is equal to the data voltage Vdata 1 , and the voltages VE and VF of the nodes E and F are equal to the reference voltage Vref 3 . In this embodiment, the relationship between the magnitudes of voltages is data voltage Vdata 1 >reference voltage Vref 1 >power supply voltage VDD>reference voltage Vref 2 >reference ground voltage VSS>reference voltage Vref 3 .

During the compensation and data input period P 2 , the previous-stage scan signal S 1 n - 1 changes from a low voltage level to a high voltage level, the scan signal S 1 n changes from a high voltage level to a low voltage level. Accordingly, the transistors T 7 and T 14 change from conduction to disconnection, and the transistors T 1 , T 5 , T 11 , and T 13 change from disconnection to conduction. Under the circumstances, the voltage VA of the node A shown in FIG. 2 is equal to the reference voltage Vref 1 minus the threshold voltage VTH 2 of the transistor T 2 , the voltage VB of the node B is equal to the reference voltage Vref 1 , the voltage VC of the node C is equal to the data voltage Vdata 1 , the voltages VD and VF of the nodes D and F are equal to the data voltage Vdata 2 minus the threshold voltage VTH 12 of the transistor T 12 , the voltage VE of the node E is equal to the data voltage Vdata 2 , and the voltage VG of the node G is equal to the reference voltage Vref 2 .

During the light-emission period P 3 , the emission control signal EMn changes from a low voltage level to a high voltage level, the multiple emission control signal mEMn changes from a high voltage level to a low voltage level, and the sweep voltage VSPn gradually changes from a high voltage level to a low voltage level. Therefore, the transistors T 4 , T 9 , and T 10 change from disconnection to conduction, the transistor T 6 changes from conduction to disconnection, the transistor T 8 changes from conduction to disconnection, and the transistor T 12 changes from disconnection to conduction. Under the circumstances, the voltage VA of the node A shown in FIG. 2 is equal to the reference voltage Vref 1 minus the threshold voltage VTH 2 of the transistor T 2 , the voltages VB and VC of the nodes B and C are equal to the data voltage Vdata 1 , and the voltage VD of the node D is equal to the data voltage Vdata 2 minus the threshold voltage VTH 12 of the transistor T 2 and the voltage difference ΔV caused by the drop of the sweep voltage VSPn, that is, Vdata 2 −VTH 12 −ΔV. The voltage VE of the node E is equal to the reference voltage Vref 3 , and the voltages VF and VG of the nodes F and G are equal to the reference voltage Vref 2 . The condition for the transistor T 12 to be turned on is VE−VD>VTH 12 , which may be expressed as Vref 2 −(Vdata 2 −VTH 12 −ΔV)>VTH 12 , that is, Vref 2 −Vdata 2 +ΔV>0. It may be seen that the conduction condition of the transistor T 12 is irrelevant to the threshold voltage VTH 12 of the transistor T 12 . Therefore, it is possible to effectively prevent the variation of the threshold voltage VTH 12 of the transistor T 12 from affecting the brightness of the light-emitting element LD, and the grayscale accuracy may be increased. Under low grayscale display conditions, there will be no insufficient light brightness or uneven brightness, and the display quality may be improved significantly.

In addition, during the light-emission period P 3 , when the sweep voltage VSPn decreases and the transistor T 12 is turned on, the transistor T 3 will be turned on by the reference voltage Vref 3 as the transistor T 12 is turned on. Under the circumstances, the voltages VF and VG of the nodes F and G are changed to the reference voltage Vref 3 , the voltages VB and VC of the nodes B and C are equal to VDD-VLD, and the voltage VA of the node A is equal to VDD-VLD-Vdata 1 +Vref 1 −VTH 2 . Therefore, the drive current ILD 1 may be expressed as:

That is to say, the drive current ILD 1 will not be affected by the voltage drop (VDD I-R drop) of the power supply voltage VDD and the variation of the threshold voltage VTH 2 of the transistor T 2 , thereby improving the uniformity of the drive current ILD 1 and enhancing the display quality. In addition, the embodiment uses only 14 transistors and 3 capacitors, which has a simpler structure than the related art, so it is possible to reduce layout difficulty. Only two transistors T 2 and T 3 are included in the drive current path with the drive current ILD 1 , so it is possible to effectively reduce power consumption.

During the stable period P 4 , the multiple emission control signal mEMn changes from a low voltage level to a high voltage level, and the sweep voltage VSPn changes from a low voltage level to a high voltage level. The transistor T 8 therefore switches from disconnection to conduction, causing the transistor T 3 to turn off. Under the circumstances, the voltages VF and VG of the nodes F and G are changed to the reference voltage Vref 2 . In addition, the transistor T 12 is changed to disconnection in response to the change of the sweep voltage VSPn.

In addition, during the off period POFF, the transistors T 7 and T 14 are turn off under the control of the previous-stage scan signal S 1 n - 1 , the transistors T 1 , T 5 , T 11 , and T 13 are turn off under the control of the scan signal S 1 n , the transistors T 4 , T 9 and T 10 are turn off under the control of the emission control signal EMn, the transistor T 6 is turned on under the control of the emission control signal EMn, and the transistor T 8 is turned on under the control of the multiple emission control signal mEMn. In addition, the transistor T 2 is turned off (disconnected) by the reference voltage Vref 1 due to the conduction of the transistor T 6 , the transistor T 3 is turned off (disconnected) by the reference voltage Vref 2 due to the conduction of the transistor T 8 , and the transistor T 12 is turned off due to the disconnection of the transistor T 14 .

During the off period POFF, the voltage VA of the node A shown in FIG. 2 is equal to the reference voltage Vref 1 minus the threshold voltage VTH 2 of the transistor T 2 , the voltage VB of the node B is equal to the power supply voltage VDD minus the cross voltage VLD on the light-emitting element LD, the voltage VC the of node C is equal to the data voltage Vdata 1 , the voltage VD of the node D is equal to the data voltage Vdata 2 minus the threshold voltage VTH 12 of the transistor T 12 , the voltages VE and VF of the nodes E and F are equal to the reference voltage Vref 3 , and the voltage VG of the node G is equal to the reference voltage Vref 2 .

FIG. 4 is a schematic diagram of a pixel circuit according to another embodiment of the present disclosure. Compared with the embodiments of FIG. 1 and FIG. 2 , this embodiment further includes an activation accelerator 402 , which is coupled between the pulse width signal generator 104 and the multiple lighting controller 106 . The activation accelerator 402 may accelerate the conduction speed of the light-emitting control switch SW 1 according to the pulse width signal PWM 1 provided by the pulse width signal generator 104 . As shown in FIG. 4 , the activation accelerator 402 may include the transistors T 15 and T 16 and the capacitor C 3 . The transistor T 15 is coupled between the control terminal of the transistor T 3 and the reference voltage Vref 4 . The control terminal of the transistor T 15 is coupled to one end of the transistor T 9 (the output terminal of the pulse width signal generator 104 ), the transistor T 16 is coupled between the control terminal of the transistor T 15 and the reference voltage Vref 3 , the control terminal of the transistor T 15 receives the multiple emission control signal mEMn, and the capacitor C 4 is coupled between the control terminal of the transistor T 15 and the reference voltage Vref 2 .

Additionally, compared with the embodiment of FIG. 2 , the capacitor C 2 of this embodiment is changed to be coupled to the reference voltage Vref 2 , the transistor T 10 is changed to be coupled to the sweep voltage VSPn, the control terminal of the transistor T 10 is changed to receive the multiple emission control signal mEMn, the capacitor C 2 is changed to be coupled to the reference voltage Vref 2 , the transistor T 14 is changed to be coupled to the reference voltage Vref 3 , and the control terminal of the transistor T 9 is changed to receive the multiple emission control signal mEMn. In addition, unlike the embodiment of FIG. 2 , in the embodiment of FIG. 4 , the transistors T 9 , T 10 , and T 12 are implemented as P-type transistors. Moreover, in the embodiment of FIG. 4 , the relationship between voltage magnitudes is reference voltage Vref 3 >data voltage Vdata 1 >reference voltage Vref 4 >power supply voltage VDD>reference voltage Vref 1 >reference ground voltage VSS>reference voltage Vref 2 .

The pixel circuit 200 in the embodiment of FIG. 4 also adopts the operation waveform diagram shown in FIG. 2 . During the reset period P 1 , the transistors T 7 and T 14 are turned on under the control of the previous-stage scan signal S 1 n −1, the transistors T 1 , T 5 , T 11 , and T 13 are turned off under the control of the scan signal SIn, the transistor T 4 is turned off under the control of the emission control signal EMn, the transistor T 6 is turned on under the control of the emission control signal EMn, the transistors T 8 and T 16 are turned on under the control of the multiple emission control signal mEMn, and the transistors T 9 and T 10 are turned off under the control of the multiple emission control signal mEMn. Furthermore, the transistor T 2 is turned on (conducted) by the reference voltage Vref 2 due to the conduction of the transistor T 7 , the transistor T 3 is turned off (disconnected) by the reference voltage Vref 2 due to the conduction of the transistor T 8 , the transistor T 12 is turned on by the reference voltage Vref 3 due to the conduction of the transistor T 14 , and the transistor T 15 is turned off by the reference voltage Vref 3 due to the conduction of the transistor T 16 . Therefore, during the reset period P 1 , the voltages VA and VG of the nodes A and G shown in FIG. 2 are equal to the reference voltage Vref 2 , the voltage VB of the node B is equal to the power supply voltage VDD minus the cross voltage VLD on the light-emitting element LD, the voltage VC of the node D is equal to the data voltage Vdata 1 , the voltages VD and VH of the nodes D and H are equal to the reference voltage Vref 3 , and the voltages VE and VF of the nodes E and F are equal to the sweep voltage VSPn.

During the compensation and data input period P 2 , the previous-stage scan signal S 1 n - 1 is changed from a low voltage level to a high voltage level, the scan signal S 1 n is changed from a high voltage level to a low voltage level, and accordingly the transistors T 7 and T 14 are changed from conduction to disconnection, and the transistors T 1 , T 5 , T 11 , and T 13 are changed from disconnection to conduction. Under the circumstances, the voltage VA of the node A shown in FIG. 2 is equal to the reference voltage Vref 1 minus the threshold voltage VTH 2 of the transistor T 2 , the voltage VB of the node B is equal to the reference voltage Vref 1 , the voltage VC of the node C is equal to the data voltage Vdata 1 , the voltages VD and VF of the nodes D and F are equal to the data voltage Vdata 2 plus the threshold voltage VTH 12 of the transistor T 12 , the voltage VE of the node E is equal to the data voltage Vdata 2 , the voltage VG of the node G is equal to the reference voltage Vref 2 , and the voltage VH of the node H is equal to the reference voltage Vref 3 .

During the light-emission period P 3 , the multiple emission control signal mEMn is changed from a low voltage level to a high voltage level, the emission control signal EMn is changed from a high voltage level to a low voltage level, and the sweep voltage VSPn is gradually changed from a high voltage level to a low voltage level. Therefore, the transistor T 4 is changed from disconnection to conduction, the transistor T 6 is changed from conduction to disconnection, the transistors T 8 and T 16 are changed from conduction to disconnection, the transistors T 9 and T 10 are changed from disconnection to conduction, and the transistor T 12 is changed from disconnection to conduction. Under the circumstances, the voltage VA of the node A shown in FIG. 2 is equal to the reference voltage Vref 1 minus the threshold voltage VTH 2 of the transistor T 2 , the voltages VB and VC of the nodes B and C are equal to the data voltage Vdata 1 , the voltage VD of the node D is equal to the data voltage Vdata 2 plus the threshold voltage VTH 12 of the transistor T 12 , the voltage VE of the node E is equal to the voltage VSPH (when the sweep voltage VSPn is at the high voltage level) minus the voltage difference ΔV caused by the drop of the sweep voltage VSPn, that is, VSPH−ΔV, the voltages VF and VH of the nodes F and H are equal to the reference voltage Vref 3 , and the voltage VG of the node G is equal to the reference voltage Vref 2 . The condition for the transistor T 12 to be turned on is VD−VE>VTH 12 , which may be expressed as Vdata 2 +VTH 12 −(VSPH−ΔV)>VTH 12 , that is, Vdata 2 −VSPH+ΔV>0. It may be seen that the condition for the transistor T 12 to be turned on is irrelevant to the threshold voltage VTH 12 of the transistor T 12 . Therefore, it is possible to effectively prevent the variation of the threshold voltage VTH 12 of the transistor T 12 from affecting the brightness of the light-emitting element LD, and the grayscale accuracy may be increased. Under low grayscale display conditions, there will be no insufficient light brightness or uneven brightness, thereby significantly improving the display quality.

In addition, during the light-emission period P 3 , when the sweep voltage VSPn decreases and the transistor T 12 is turned on, the transistor T 15 will be turned on by the sweep voltage VSPn as the transistor T 12 is turned on. The conduction of the transistor T 15 may further cause the transistor T 3 to be quickly turned on by the reference voltage Vref 4 . Under the circumstances, the voltage VG of the node G is changed to the reference voltage Vref 4 , the voltages VB and VC of the nodes B and C are equal to VDD−VLD, the voltage VD of the node D is equal to Vdata 2 +VTH 12 , the voltages VE, VF and VH of the nodes E, F and H are equal to VSPH−ΔV, and the voltage VA of the node A is equal to VDD−VLD−Vdata 1 +Vref 1 −VTH 2 . Therefore, the drive current ILD 1 may be expressed as the result shown in the above Equation (1), that is, ½k(Vdata 1 −Vref 1 ) 2 .

That is to say, the drive current ILD 1 will not be affected by the voltage drop of the power supply voltage VDD and the variation of the threshold voltage VTH 2 of the transistor T 2 , and the uniformity of the drive current ILD 1 may be improved to enhance the display quality. In addition, this embodiment provides the reference voltage Vref 4 to the control terminal of the transistor T 3 through the activation accelerator 402 , which may effectively accelerate the activation of the transistor T 3 , improve the grayscale control accuracy, and further optimize the display effect of the pixel circuit 200 .

During the stable period P 4 , the multiple emission control signal mEMn is changed from a low voltage level to a high voltage level, and the sweep voltage VSPn is changed from a low voltage level to a high voltage level. Accordingly, the transistor T 9 switches from conduction to disconnection, and the transistors T 8 and T 16 switch from disconnection to conduction, thereby causing the transistor T 3 to disconnect. Under the circumstances, the voltages VE and VH of the nodes E and H are respectively changed to the voltage VSPH (when the sweep voltage VSPn is at the high voltage level) and the reference voltage Vref 3 . Moreover, the transistor T 12 is changed to disconnection in response to the change of the sweep voltage VSPn.

During the off period POFF, the transistors T 7 and T 14 are turned off under the control of the previous-stage scan signal S 1 n - 1 , the transistors T 1 , T 5 , T 11 , and T 13 are turned off under the control of the scan signal SIn, the transistor T 4 is turned off under the control of the emission control signal EMn, the transistor T 6 is turned on under the control of the emission control signal EMn, and the transistors T 8 and T 16 are turned on under the control of the multiple emission control signal mEMn. Additionally, the transistor T 2 is turned off (disconnected) by the reference voltage Vref 1 due to the conduction of the transistor T 6 , the transistor T 3 is turned off (disconnected) by the reference voltage Vref 2 due to the conduction of the transistor T 8 , and the transistor T 12 is turned off due to the disconnection of the transistor T 14 .

During the off period POFF, the voltage VA of the node A shown in FIG. 4 is equal to the reference voltage Vref 1 minus the threshold voltage VTH 2 of the transistor T 2 , the voltage VB of the node B is equal to the power supply voltage VDD minus the cross voltage on the light-emitting element LD, the voltage VC of the node C is equal to the data voltage Vdata 1 , the voltage VD of the node D is equal to the data voltage Vdata 2 plus the threshold voltage VTH 12 of transistor T 12 , the voltage VE of the node E is the voltage VSPH (when the sweep voltage VSPn is at the high voltage level), the voltage VF of the node F is equal to the voltage VSPH (when the sweep voltage VSPn is at the high voltage level) minus the voltage difference ΔV caused by the drop of the sweep voltage VSPn, the voltage VG of the node G is equal to the reference voltage Vref 2 , and the voltage VG of the node H is equal to the reference voltage Vref 3 .

In summary, the pulse width signal generator of the present disclosure may provide a pulse width signal to the control terminal of the light-emitting control switch on the drive current path of the drive current generator, and the multiple lighting controller may adjust the pulse width signal provided by the pulse width signal generator according to the multiple emission control signal to allow the light-emitting element to perform multi-emission. In this way, the multiple lighting controller is utilized to adjust the pulse width signal provided by the pulse width signal generator according to the multiple emission control signal to allow the light-emitting element to perform multi-emission, which may effectively simplify the circuit structure of the pixel circuit for multi-emission and reduce the number of switches on the drive current path, thereby decreasing power consumption. In some embodiments, an activation accelerator may also be used to accelerate the conduction speed of the light-emitting control switch to improve grayscale control accuracy and further optimize the display effect of the pixel circuit.