Memory device and in-memory search method thereof

This application claims the priority benefit of U.S. provisional application Ser. No. 63/435,555, filed on Dec. 28, 2022. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

The disclosure relates to a memory device and an in-memory search method thereof, and more particularly, to a memory device and an in-memory search method thereof which may increase a search data length.

With the rise of big data and AI hardware accelerators, data comparing/searching has become an indispensable function. In the existing technology, the so-called ternary content addressable memory (TCAM) may achieve highly parallel data search. In the conventional technology, the ternary content addressable memory is typically formed by static memory. Therefore, it often has issues of insufficient memory density and high power consumption.

Accordingly, in the conventional technology, it is proposed to use non-volatile memory to implement the ternary content addressable memory. However, in the conventional technology, two non-volatile memory cells are always required to store a piece of storage data. When search operation is performed, the two non-volatile memory cells are required to occupy two word lines, which reduces a data length of searched data during the search operation.

The disclosure provides a memory device and an in-memory search method thereof, which may increase a data length of searched data and improve efficiency of search operation.

A memory device in the disclosure is configured to perform internal search operation. The memory device includes a first memory cell block, a second memory cell block, at least one search memory cell pair, and a sense amplifier. The search memory cell pair includes a first search memory cell and a second search memory cell. The first search memory cell and the second search memory cell are respectively disposed in the first memory block and the second memory block, and the first search memory cell and the second search memory cell respectively receive a first search voltage and a second search voltage. The first search voltage and the second search voltage are generated according to searched data. The sense amplifier is respectively coupled to the first search memory cell and the second search memory cell through a first bit line and a second bit line and generates a search result according to signals on the first bit line and the second bit line.

An in-memory search method in the disclosure includes the following. A first search memory cell and a second memory cell are respectively disposed in a first memory block and a second memory block. A search cell pair is formed by combining the first search memory cell and the second memory cell. The first search memory cell and the second search memory cell respectively receive a first search voltage and a second search voltage, and the first search voltage and the second search voltage are generated according to searched data. A sense amplifier is provided to generate a search result according to signals respectively provided by the first search memory cell and the second search memory cell through a first bit line and a second bit line respectively.

Based on the above, in the memory device of the disclosure, the first search memory cell and the second search memory cell in the search memory cell pair are respectively disposed in the different memory cell blocks. In this way, the number of bits of the searched data that may be received by word lines of the memory cell blocks may be doubled, effectively increasing the data length of the searched data in the in-memory search operation, and improving the efficiency of the search operation.

FIG. 1 is a schematic view of a memory device according to an embodiment of the disclosure.

FIG. 2 A is a schematic view of an implementation of in-memory search operation according to an embodiment of the disclosure.

FIG. 2 B is a schematic view of a distribution state of a voltage value of a search voltage and a threshold voltage of a search memory cell.

FIGS. 3 A and 3 B are schematic views of another implementation of in-memory search operation according to an embodiment of the disclosure.

FIGS. 4 A and 4 B are schematic views of another implementation of in-memory search operation according to an embodiment of the disclosure.

FIG. 5 is a schematic view of a memory device according to another embodiment of the disclosure.

FIG. 6 is a flowchart of an in-memory search method according to an embodiment of the disclosure.

Referring to FIG. 1 , FIG. 1 is a schematic view of a memory device according to an embodiment of the disclosure. A memory device 100 is configured to perform internal search operation. The memory device 100 has memory cell blocks 110 and 120 . The memory cell block 110 includes multiple search memory cells CA 1 to CA 8 , and the memory cell block 120 includes multiple search memory cells CB 1 to CB 8 . The search memory cells CA 1 to CA 4 are coupled to a same bit line BLA 1 , and the search memory cells CA 5 to CA 8 are coupled to a same bit line BLA 2 . The search memory cells CA 1 and CA 5 are coupled to a same word line WLA 1 . The search memory cells CA 2 and CA 6 are coupled to a same word line WLA 2 . The search memory cells CA 3 and CA 7 are coupled to a same word line WLA 3 . The search memory cells CA 4 and CA 8 are coupled to a same word line WLA 4 . The search memory cells CA 1 , CA 2 , CA 5 , and CA 6 share a same source line SLA 1 , and the search memory cells CA 3 , CA 4 , CA 7 , and CA 8 share a same source line SLA 2 .

In addition, the search memory cells CB 1 to CB 4 are coupled to a same bit line BLB 1 , and the search memory cells CB 5 to CB 8 are coupled to a same bit line BLB 2 . The search memory cells CB 1 and CB 5 are coupled to a same word line WLB 1 . The search memory cells CB 2 and CB 6 are coupled to a same word line WLB 2 . The search memory cells CB 3 and CB 7 are coupled to a same word line WLB 3 . The search memory cells CB 4 and CB 8 are coupled to a same word line WLB 4 . The search memory cells CB 1 , CB 2 , CB 5 , and CB 6 share a same source line SLB 1 , and the search memory cells CB 3 , CB 4 , CB 7 , and CB 8 share a same source line SLB 2 .

In this embodiment, the memory device 100 may be a NOR flash memory.

In this embodiment, the two search memory cells disposed in the different memory cell blocks 110 and 120 may form a search memory cell pair. For example, the search memory cells CA 1 and CB 1 may form a search memory cell pair, the search memory cells CA 2 and CB 2 may form a search memory cell pair, . . . , the search memory cells CA 8 and CB 8 may form a search memory cell pair. Taking the paired search memory cells CA 1 and CB 1 as an example, the search memory cells CA 1 and CB 1 may respectively receive a first search voltage and a second search voltage through the word lines WLA 1 and WLB 1 . The first search voltage and the second search voltage may be generated according to searched data. In addition, the search memory cells CA 1 and CB 1 may determine whether to generate currents according to the received first search voltage and second search voltage respectively.

The memory device 100 further includes sense amplifiers SA 1 and SA 2 . The sense amplifier SA 1 is coupled to the bit lines BLA 1 and BLB 1 , and generates a search result R 1 by sensing currents on the bit lines BLA 1 and BLB 1 . The sense amplifier SA 2 is coupled to the bit lines BLA 2 and the BLB 2 , and generates a search result R 2 by sensing currents on the bit lines BLA 2 and the BLB 2 .

Referring to FIG. 2 A , FIG. 2 A is a schematic view of an implementation of in-memory search operation according to an embodiment of the disclosure. In FIG. 2 A , a memory device 200 includes memory cell blocks 210 and 220 . The memory cell block 210 has bit lines BLA 1 to BLA 3 , and each of the bit lines BLA 1 to BLA 3 is coupled to multiple search memory cells. The memory cell block 220 has bit lines BLB 1 to BLB 3 , and each of the bit lines BLB 1 to BLB 3 is coupled to the search memory cells. The search memory cells in the memory cell block 210 are paired with the search memory cells in the memory cell block 220 to form a search memory cell pair. A pairing method has been described in detail in the embodiment of FIG. 1 . Therefore, the same details will not be repeated in the following.

In this embodiment, the memory device 200 further includes sense amplifiers SA 1 to SA 3 . The sense amplifier SA 1 is coupled to the bit lines BLA 1 and BLB 1 . The sense amplifier SA 2 is coupled to the bit lines BLA 2 and BLB 2 . The sense amplifier SA 3 is coupled to the bit lines BLA 3 and BLB 3 .

In this embodiment, each of the search memory cell pairs in the memory device 200 may record single-bit data. In the memory cell block 210 , when storage data of the search memory cell is a logic value of 1, the search memory cell may be set to have a first threshold voltage. In contrast, when the storage data of the search memory cell is a logic value of 0, the search memory cell may be set to have a second threshold voltage. The first threshold voltage is greater than the second threshold voltage. In the memory cell block 220 , when the storage data of the search memory cell is the logic value of 1, the search memory cell may be set to have the second threshold voltage. In contrast, when the storage data of the search memory cell is the logic value of 0, the search memory cell may be set to have the first threshold voltage. It is worth mentioning that when the storage data of the search memory cell is don't care (or referred to as wild card), the search memory cells in the search memory cell pair all have a relatively high first threshold voltage. When the storage data of the search memory cell is invalid, the search memory cells in the search memory cell pair all have a relatively low second threshold voltage. A state of the threshold voltage of the search memory cell in the storage data and the search memory cell pair may be seen in the following truth table.

Search memory cells in the Search memory cells in the Storage data memory cell block 210 memory cell block 220 0 LVT HVT 1 HVT LVT Don't care “X” HVT HVT Invalid “—” LVT LVT

HVT is the relatively high first threshold voltage, and LVT is the relatively low second threshold voltage.

In this embodiment, the storage data that the search memory cells on the bit lines BLA 1 and BLB 1 may respectively store in sequence from the top to the bottom of the figure are logic values of 1, 0, 1, 1, 0, 1, 0, and 1. Therefore, the threshold voltages of the search memory cells on the bit line BLA 1 may be HVT, LVT, HVT, HVT, LVT, HVT, LVT, and HVT in sequence from the top to the bottom of the figure. The threshold voltages of the search memory cells on the bit line BLB 1 are complementary to the threshold voltages of the search memory cells on the bit line BLA 1 , which are LVT, HVT, LVT, LVT, HVT, LVT, HVT, and LVT respectively.

In addition, the storage data that the search memory cells on the bit lines BLA 2 and BLB 2 may respectively store in sequence from the top to the bottom of the figure are logic values 1, 0, 0, 0, 0, 1, 0, and 1. Therefore, the threshold voltages of the search memory cells on the bit lines BLA 2 may be HVT, LVT, LVT, LVT, LVT, HVT, LVT, and HVT in sequence from the top to the bottom of the figure. The threshold voltages of the search memory cells on the bit line BLB 2 are complementary to the threshold voltages of the search memory cells on the bit line BLA 2 , which are LVT, HVT, HVT, HVT, HVT, LVT, HVT, and LVT respectively. The storage data that the search memory cells on bit lines BLA 3 and BLB 3 may respectively store in sequence from the top to the bottom of the figure are logic values of X, −, 0, 1, 0, 1, 0, and 1. Therefore, the threshold voltages of the search memory cells on the bit line BLA 3 may be HVT, LVT, LVT, HVT, LVT, HVT, LVT, and HVT in sequence from the top to the bottom of the figure. The threshold voltages of the search memory cells on the bit line BLB 3 are complementary to the threshold voltages of the search memory cells on the bit line BLA 3 , which are HVT, LVT, HVT, LVT, HVT, LVT, HVT, and LVT respectively.

When the in-memory search operation is about to be performed, taking searched data SD as 1, 0, 0, 0, 0, 1, −, and X as an example, the memory device 200 may generate corresponding search voltages SS 1 and SS 2 according to a state of each of bits of the searched data SD. In this embodiment, the search voltage SS 1 may be voltages VH, VL, VL, VL, VL, VH, VH, VL in sequence from the top to the bottom of the figure. The voltage VH is greater than the voltage VL. The voltage VH is between a distribution range of the threshold voltages VHT and VLT, and the voltage VL is lower than a distribution range of the threshold voltage VLT, as shown in a schematic view of a distribution state of a voltage value of the search voltage and the threshold voltage of the search memory cell in FIG. 2 B . Correspondingly, when the search voltage SS 2 may be the voltages VL, VH, VH, VH, VH, VL, VH, and VL in sequence from the top to the bottom of the figure.

In this embodiment, when the searched data SD is not don't care and invalid, the correspondingly generated search voltages SS 1 and SS 2 are complementary. When the searched data SD is don't care, the corresponding search voltages SS 1 and SS 2 are both the voltages VL. When the searched data SD is invalid, the corresponding search voltages SS 1 and SS 2 are both the voltages VH. In addition, when the searched data SD is don't care, the corresponding search result is required to be consistent, and when the searched data SD is invalid, the corresponding search result is required to be inconsistent.

A logic status of the voltage of the search voltage and the corresponding searched data may be shown in the following table.

When the in-memory search operation is performed, the search memory cell may be turned on and generate the current when the search memory cell has the threshold voltage LVT and receives the search voltage of the voltage VH. In other conditions, the search memory cell may be turned off. In detail, when the storage data of the search memory cell pair matches the searched data SD, the two search memory cells in the search memory cell pair are turned off without generating the current. When the storage data of the search memory cell pair does not match the searched data SD, at least one of the two search memory cells in the search memory cell pair may be turned on and generate the current.

In this embodiment, the search memory cells CA 1 to CA 3 may be turned on and generate a current I, and the search memory cells CB 1 to CB 4 may be turned on and generate the current I. Therefore, the sense amplifier SA 1 may receive a current equal to 3I on the bit lines BLA 1 and BLB 1 . The sense amplifier SA 2 may receive a current equal to 1I on the bit lines BLA 2 and BLB 2 . The sense amplifier SA 3 may receive a current equal to 2I on the bit lines BLA 3 and BLB 3 . The sense amplifier SA 1 to SA 3 may generate search results R 1 to R 3 respectively. The search result R 1 indicates that a similarity level between the storage data of the search memory cells on the bit lines BLA 1 and BLB 1 and the searched data SD is same as a similarity level indicated by the search result R 3 between the storage data of the search memory cells on the bit lines BLA 3 and BLB 3 and the searched data SD, where the similarity level indicated by the search results R 3 and R 1 is lower than a similarity level indicated by the search result R 2 . The search result R 2 indicates that a similarity level between the storage data of the search memory cells on the bit lines BLA 2 and BLB 2 and the searched data SD is the highest. The search result R 3 indicates that a similarity level between the storage data of the search memory cells on the bit lines BLA 3 and BLB 3 and the searched data SD is the highest. That is to say, the similarity level between the storage data of the search memory cells and the searched data SD is negatively correlated to magnitude of the current provided on the bit lines.

Referring to FIGS. 3 A and 3 B , FIGS. 3 A and 3 B are schematic views of another implementation of in-memory search operation according to an embodiment of the disclosure. In FIG. 3 B , a memory device 300 includes memory cell blocks 310 and 320 . The memory cell block 310 has the bit lines BLA 1 to BLA 3 , and each of the bit lines BLA 1 to BLA 3 is coupled to the search memory cells. The memory cell block 320 has the bit lines BLB 1 to BLB 3 , and each of the bit lines BLB 1 to BLB 3 is coupled to the search memory cells. The search memory cells in the memory cell block 310 are paired with the search memory cells in the memory cell block 320 to form a search memory cell pair. The pairing method has been described in detail in the embodiment of FIG. 1 . Therefore, the same details will not be repeated in the following.

When the storage data of the search memory cell pair is multi-bit data, multiple voltages may be set to correspond to multiple possible logic values of the storage data. Corresponding to the storage data of the search memory cell pair, a threshold voltage of a first search memory cell in the search memory cell pair is set to one of the voltages, and a threshold voltage of a second search memory cell in the search memory cell pair is set to another one of the voltages.

In detail, the voltages may be a first voltage to an Nth voltage. The first voltage to the Nth voltage may be arranged in order from small to large. In this embodiment, the threshold voltage of the first search memory cell and the threshold voltage of the second search memory cell may be complementary, and may be shown in the following table.

Threshold voltage of the Threshold voltage of the Storage data first search memory cell second search memory cell 0 Vt 0 Vt 7 1 Vt 1 Vt 6 2 Vt 2 Vt 5 3 Vt 3 Vt 4 4 Vt 4 Vt 3 5 Vt 5 Vt 2 6 Vt 6 Vt 1 7 Vt 7 Vt 0

In the above table, taking N equal to 8 as an example, the first voltage to the eighth voltage are threshold voltages Vt 0 to Vt 7 respectively, where the threshold voltages are Vt 0 <Vt 1 <Vt 2 < . . . <Vt 7 .

On the other hand, corresponding to the possible logic values of the searched data, the first search voltage applied to the memory cell block 310 may be one of a first set voltage to an Nth set voltage, and a second search voltage applied to the memory cell block 320 may be another one of the first set voltage to the Nth set voltage. The first set voltage to the Nth set voltage may be arranged in order from small to large. In this embodiment, corresponding to the same logic value of the searched data, the first search voltage and the second search voltage may be complementary, and may be shown in the following table.

Searched data First search voltage Second search voltage 0 V 0 V 7 1 V 1 V 6 2 V 2 V 5 3 V 3 V 4 4 V 4 V 3 5 V 5 V 2 6 V 6 V 1 7 V 7 V 0

In the above table, taking N equal to 8 as an example, the first search voltage to the eighth search voltage are set voltages V 0 to V 7 respectively, where the set voltages are V 0 <V 1 <V 2 < . . . <V 7 .

In FIG. 3 A , a threshold voltage Vtx of the search memory cell, received search voltages Vx to Vx+7, and magnitude of the current that may be generated by the search memory cell are shown. Taking x=0 as an example, when the search memory cell has the threshold voltage Vt 0 , and the received search voltages are the set voltages V 0 to Vx, the search memory cell may generate currents I 0 , I 0 , I 1 , I 2 , I 3 , I 4 , I 5 , I 6 , and I 7 , where the current I 0 is substantially equal to 0.

It is worth mentioning that FIG. 3 A only shows a transfer curve of the search memory cell, and it does not mean that all the search voltages Vx to Vx+7 in FIG. 3 A are required to be generated when the in-memory search operation is performed.

In FIG. 3 B , the search memory cell pairs on the bit lines BLA 1 and BLB 1 respectively store the storage data of logic values 0, 1, 2, 3, 4, 5, 6, and 7 in sequence from the top to the bottom of FIG. 3 B . Therefore, the search memory cells on the bit line BLA 1 have the threshold voltages Vt 0 , Vt 1 , Vt 2 , Vt 3 , Vt 4 , Vt 5 , Vt 6 , and Vt 7 in sequence from the top to the bottom of FIG. 3 B . The search memory cells on the bit line BLB 1 have the threshold voltages Vt 7 , Vt 6 , Vt 5 , Vt 4 , Vt 3 , Vt 2 , Vt 1 , and Vt 0 in sequence from the top to the bottom of FIG. 3 B .

The search memory cell pairs on the bit lines BLA 2 and BLB 2 respectively store the storage data of logic values 1, 2, 3, 4, 5, 6, 7, and 6 in sequence from the top to the bottom of FIG. 3 B . Therefore, the search memory cells on the bit line BLA 2 have the threshold voltages Vt 1 , Vt 2 , Vt 3 , Vt 4 , Vt 5 , Vt 6 , Vt 7 , and Vt 6 in sequence from the top to the bottom of FIG. 3 B . The search memory cells on the bit line BLB 2 have the threshold voltages Vt 6 , Vt 5 , Vt 4 , Vt 3 , Vt 2 , Vt 1 , Vt 0 , and Vt 1 in sequence from the top to the bottom of FIG. 3 B .

In addition, the search memory cell pairs on bit lines BLA 3 and BLB 3 respectively store the storage data of logic values 7, 6, 5, 4, 3, 2, 1, and 0 in sequence from the top to the bottom of FIG. 3 B . Therefore, the search memory cells on the bit line BLA 3 have the threshold voltages Vt 7 , Vt 6 , Vt 5 , Vt 4 , Vt 3 , Vt 2 , Vt 1 , and Vt 0 in sequence from the top to the bottom of FIG. 3 B . The search memory cells on the bit line BLB 3 have the threshold voltages Vt 0 , Vt 1 , Vt 2 , Vt 3 , Vt 4 , Vt 5 , Vt 6 , and Vt 7 in sequence from the top to the bottom of FIG. 3 B .

On the other hand, logic values of the searched data SD may be 0, 1, 2, 3, 4, 5, 6, and 7 in sequence from the top to the bottom of FIG. 3 B . The search voltage SS 1 generated corresponding to the searched data SD may be the search voltages V 0 , V 1 , V 2 , V 3 , V 4 , V 5 , V 6 , and V 7 in sequence from the top to the bottom of FIG. 3 B . in addition, the voltage search SS 2 may be the search voltages V 7 , V 6 , V 5 , V 4 , V 3 , V 2 , V 1 , and V 0 in sequence from the top to the bottom of FIG. 3 B .

According to the transfer curve in FIG. 3 A , in the embodiment of FIG. 3 B , in the memory cell block 310 , the search memory cell CA 1 may generate the current I 1 . The search memory cell CA 2 may generate the current I 1 . The search memory cell CA 3 may generate the current I 3 . The search memory cell CA 4 may generate the current I 5 . The search memory cell CA 5 may generate the current I 7 . In memory cell block 320 , each of the search memory cells CB 1 to CB 7 and CB 11 may generate the current I 1 . The search memory cell CB 10 may generate the current I 3 . The search memory cell CB 9 may generate the current I 5 . The search memory cell CB 8 may generate the current I 7 . The rest of the search memory cells may be turned off and provide a current close to 0 (e.g. the current I 0 ).

The sense amplifier SA 1 may receive the currents (close to 0) on the bit lines BLA 1 and BLB 1 . The sense amplifier SA 2 may receive the currents (=8*I 1 ) on the bit lines BLA 2 and BLB 2 . The sense amplifier SA 3 may receive the currents (=2*I 1 +2*I 5 +2*I 7 ) on the bit lines BLA 3 and BLB 3 . In this way, the similarity level indicated by the search result R 1 generated by the sense amplifier SA 1 is higher than the similarity level indicated by the search result R 2 generated by the sense amplifier SA 2 . In addition, the similarity level indicated by the search result R 2 generated by the sense amplifier SA 2 is higher than the similarity level indicated by the search result R 3 generated by the sense amplifier SA 3 .

Referring to FIGS. 4 A and 4 B , FIGS. 4 A and 4 B are schematic views of another implementation of in-memory search operation according to an embodiment of the disclosure. In FIG. 4 B , a memory device 400 includes memory cell blocks 410 and 420 . The memory cell block 410 has the bit lines BLA 1 to BLA 3 , and each of the bit lines BLA 1 to BLA 3 is coupled to the search memory cells. The memory cell block 420 has the bit lines BLB 1 to BLB 3 , and each of the bit lines BLB 1 to BLB 3 is coupled to the search memory cells. The search memory cells in the memory cell block 410 are paired with the search memory cells in the memory cell block 420 to form a search memory cell pair. The pairing method has been described in detail in the embodiment of FIG. 1 . Therefore, the same details will not be repeated in the following.

In FIG. 4 A , a transfer curve 401 is a transfer curve of a first search memory cell in the memory cell block 410 , and a transfer curve 402 is a transfer curve of a second search memory cell in the memory cell block 420 . In FIG. 4 A , the transfer curve 401 corresponds to a horizontal axis of a dash line, and the transfer curve 402 corresponds to a horizontal axis of a solid line. In addition, a vertical axis is a current IA generated by the first search memory cell or a current IB generated by the second search memory cell. In this embodiment, the search memory cell pair is configured to store analog storage data. The first search memory cell and the second search memory cell may be changed between a minimum voltage Vm and a maximum voltage VM respectively according to the corresponding storage data.

Regarding the setting of the search voltage, a first search voltage VA provided to the memory cell block 410 may be generated according to the searched data, and a second search voltage VB provided to the memory cell block 420 may be equal to a sum of the minimum voltage Vm and the maximum voltage VM minus the first search voltage VA (VB=Vm+VM−VA).

In this embodiment, when a search voltage VA′ is located in a turn-off region of the search memory cell, the search memory cell does not generate the current and indicates that the search result is consistent. When a search voltage VA″ is not located in the turn-off region of the search memory cell, at least one of the search memory cells in the search memory cell pair may generate the current and indicates that the search result is inconsistent.

In FIG. 4 B , the threshold voltages of the search memory cells in the memory cell block 410 may be adjusted correspondingly according to the storage data, and have characteristics of a transfer curve TC 1 . The threshold voltages of the search memory cells in the memory cell block 420 may also be adjusted correspondingly according to the storage data, and have characteristics of a transfer curve TC 2 .

Corresponding to the searched data, the search voltage SS 1 may be equal to voltages VA 1 to VA 8 in sequence from the top to the bottom of FIG. 4 B . The search voltage SS 2 may be calculated and obtained according to the voltages VA 1 to VA 8 , the maximum voltage VM, and the minimum voltage Vm, and be equal to voltages VB 1 to VB 8 in sequence from the top to the bottom of FIG. 4 B . It is worth noting that when the first search voltage is large enough, the second search voltage is at least equal to the minimum voltage Vm. When the first search voltage is small enough, the second search voltage is at most equal to the maximum voltage VM.

The sense amplifier SA 1 is coupled to the bit lines BLA 1 and BLB 1 . The sense amplifier SA 2 is coupled to the bit lines BLA 2 and BLB 2 . The sense amplifier SA 3 is coupled to the bit lines BLA 3 and BLB 3 . The sense amplifiers SA 1 to SA 3 respectively generate the search results R 1 , R 2 , and R 3 according to the currents on the coupled bit lines BLA 1 , BLB 1 , BLA 2 , BLB 2 , BLA 3 , and BLB 3 . The similarity level indicated by the search results R 1 , R 2 , and R 3 are negatively correlated to the currents on the bit lines BLA 1 , BLB 1 , BLA 2 , BLB 2 , BLA 3 , and BLB 3 respectively received by the sense amplifiers SA 1 to SA 3 .

Referring to FIG. 5 , FIG. 5 is a schematic view of a memory device according to another embodiment of the disclosure. A memory device 500 is configured to perform the internal search operation. The memory device 500 has memory cell blocks 510 and 520 . The memory cell block 510 includes the search memory cells CA 1 to CA 8 , and the memory cell block 520 includes the search memory cells CB 1 to CB 8 . The search memory cells CA 1 to CA 4 are coupled to the same bit line BLA 1 , and the search memory cells CA 5 to CA 8 are coupled to the same bit line BLA 2 .

The search memory cells CA 1 and CA 5 are coupled to the same word line WLA 1 . The search memory cells CA 2 and CA 6 are coupled to the same word line WLA 2 . The search memory cells CA 3 and CA 7 are coupled to the same word line WLA 3 . The search memory cells CA 4 and CA 8 are coupled to the same word line WLA 4 . The search memory cells CA 1 , CA 2 , CA 3 , and CA 4 share the same source line SLA 1 , and the search memory cells CA 5 , CA 6 , CA 7 , and CA 8 share the same source line SLA 2 .

In addition, the search memory cells CB 1 to CB 4 are coupled to the same bit line BLB 1 , and the search memory cells CB 5 to CB 8 are coupled to the same bit line BLB 2 . The search memory cells CB 1 and CB 5 are coupled to the same word line WLB 1 . The search memory cells CB 2 and CB 6 are coupled to the same word line WLB 2 . The search memory cells CB 3 and CB 7 are coupled to the same word line WLB 3 . The search memory cells CB 4 and CB 8 are coupled to the same word line WLB 4 . The search memory cells CB 1 , CB 2 , CB 3 , and CB 4 share the same source line SLB 1 , and the search memory cells CB 5 , CB 6 , CB 7 , and CB 8 share the same source line SLB 2 .

In this embodiment, the memory device 500 may be the NOR flash memory.

Hereinafter referring to FIG. 6 , FIG. 6 is a flowchart of an in-memory search method according to an embodiment of the disclosure. In step S 610 , the first search memory cell and the second search memory cell are respectively disposed in the first memory cell block and the second memory cell block. In step S 620 , the first search memory cell and the second search memory cell form the search memory cell pair. The first search memory cell and the second search memory cell respectively receive the first search voltage and the second search voltage, and the second search voltage is generated according to the searched data. In step S 630 , the sense amplifiers are provided to generate the search results according to the signals respectively provided by the first search memory cell and the second search memory cell through a first bit line and a second bit line respectively.

Implementation details of the above steps have been described in detail in the foregoing embodiments and implementations. Therefore, the same details will not be repeated in the following.

Based on the above, in the disclosure, the two search memory cells in the different memory cell blocks are used to form the search memory cell pair, and the search memory cell pair is used to store the storage data. In this way, when the search operation is performed, all the word lines in the memory cell block may receive the search voltage generated according to the searched data. That is to say, in one search operation, the search data length provided by the memory device in the disclosure may be increased, effectively improving the efficiency of the in-memory search operation.