Light emitting apparatus and display device

This application claims the priority benefits of U.S. provisional application Ser. No. 62/888,583, filed on Aug. 19, 2019, and China application serial no. 202010537580.3, filed on Jun. 12, 2020. The entirety of each of the above-mentioned patent applications is hereby incorporated by reference herein and made a part of this specification.

1. Field of the Invention

The invention relates to a light emitting apparatus and a display device, and more particularly, to a light emitting apparatus having a pixel circuit, and a display device having a light emitting apparatus.

2. Description of Related Art

A pixel circuit in a light emitting apparatus generally includes a driving transistor and a compensating circuit. The driving transistor is a current amplifier configured to convert a data voltage into a driving current that drives a pixel to emit light. However, due to variations in a manufacturing process, the driving transistors of each pixel circuit may have different critical voltage values, so that generated driving currents are inconsistent, resulting in uneven brightness of the light emitting apparatus.

According to an embodiment, a light emitting apparatus is provided. The light emitting apparatus includes a light emitting unit and a pixel circuit. The pixel circuit is electrically connected to the light emitting unit. The pixel circuit includes a first driving transistor and a second driving transistor. The first driving transistor and the second driving transistor are configured to provide a first driving current and a second driving current to the light emitting unit at the same time, respectively. The first driving transistor includes a first gate terminal. The second driving transistor includes a second gate terminal. The first gate terminal and the second gate terminal are electrically connected to different nodes.

According to an embodiment, a display device is provided. The display device includes a light emitting apparatus.

To make the features and advantages of the invention clear and easy to understand, the following gives a detailed description of embodiments with reference to accompanying drawings.

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

FIG. 1 illustrates a schematic diagram of a light emitting apparatus according to an embodiment of the invention.

FIG. 2 illustrates a schematic diagram of a light emitting apparatus according to another embodiment of the invention.

FIG. 3 illustrates a schematic diagram of a light emitting apparatus according to another embodiment of the invention.

FIG. 4 illustrates a schematic diagram of a light emitting apparatus according to another embodiment of the invention.

FIG. 5 illustrates a schematic diagram of a display device according to an embodiment of the invention.

It should be understood that other embodiments can be utilized and structural changes can be made without departing from the scope of the present invention. Similarly, it should be understood that the word and term used herein are used for description purposes rather than limiting. The use of “comprising”, “including” or “having” and variations thereof herein is intended to cover the items listed thereafter and equivalents thereof as well as additional items. Unless otherwise limited, the terms “connected”, “coupled” and their variations herein are used broadly and cover direct and indirect connections and couplings.

Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used for referring to the same or like parts.

FIG. 1 illustrates a schematic diagram of a light emitting apparatus according to an embodiment of the invention. Referring to FIG. 1 , a light emitting apparatus 100 of the present embodiment includes a light emitting unit 110 and a pixel circuit 120 . The pixel circuit 120 is electrically connected to the light emitting unit 110 . The light emitting apparatus 100 operates between operating voltages ARVDD and ARVSS. According to some embodiments, the light emitting apparatus 100 itself may be used as a display device 100 D. The display device may be a self-luminous display device, such as an organic light emitting diode (OLED) display device, a mini light emitting diode (LED) display device, a micro LED display device, or a quantum dot (QD) LED (for example, QLED or QDLED) display device.

Or, according to some embodiments, as shown in FIG. 5 , the display device 100 D may include the light emitting apparatus 100 and a display panel 100 P. The light emitting apparatus 100 may serve as a light source of the display panel 100 P, and may provide a light source to the display panel 100 P. For example, the display panel 100 P may be a liquid crystal display panel, the light emitting apparatus 100 may provide a backlight to the display panel 100 P, and the display device 100 D may be a liquid crystal display device. The type of the light emitting apparatus 100 is not limited in the invention.

The light emitting unit 110 includes an LED chip or an LED package. For example, the light emitting unit 110 may be one or more series or parallel LEDs, or one or more series or parallel LED strings. The LED may include, for example but not limited to, an OLED, a mini LED, a micro LED, or a QD LED (for example, QLED or QDLED), fluorescence, phosphor or other suitable materials which may be arranged and combined arbitrarily. The pixel circuit 120 includes a switch transistor T 1 , a compensating circuit 122 , a storage capacitor Cst, and driving transistors T 21 , T 22 , and T 23 . The driving transistors T 21 , T 22 , T 23 may have the same size, or may have different sizes. For example, the transistors have the same gate width, or the transistors have the same gate length. The switch transistor T 1 is electrically connected to the compensating circuit 122 . A gate terminal of the switch transistor T 1 is coupled to a scanning line 130 of the light emitting apparatus 100 . A first source/drain terminal of the switch transistor T 1 is coupled to a data line 140 of the light emitting apparatus 100 . A second source/drain terminal of the switch transistor T 1 is coupled to the compensating circuit 122 of the light emitting apparatus 100 . When the switch transistor T 1 is turned on, a data voltage is input to the pixel circuit 120 through the data line 140 . The driving transistors T 21 , T 22 , T 23 are configured to provide driving currents I 21 , I 22 , I 23 to the light emitting unit 110 at the same time, respectively. The sum of the driving currents I 21 , I 22 , and I 23 is used as a larger driving current to drive the light emitting unit 110 to emit light. The gate terminals of the driving transistors T 21 , T 22 , T 23 are electrically connected to a node M. The compensating circuit 122 is electrically connected to the gate terminals of the driving transistors T 21 , T 22 , T 23 .

In the present embodiment, the driving transistors T 21 , T 22 , T 23 may have different critical voltage values due to variations in a manufacturing process. The compensating circuit 122 is configured to compensate the different critical voltage values to solve the problem of uneven display brightness.

FIG. 2 illustrates a schematic diagram of a light emitting apparatus according to another embodiment of the invention. Referring to FIG. 2 , a display device 200 D of the present embodiment includes a light emitting apparatus 200 . The light emitting apparatus 200 includes a light emitting unit 110 and a pixel circuit 220 . The pixel circuit 220 is electrically connected to the light emitting unit 110 . The pixel circuit 220 includes a plurality of repeated blocks 224 _ 1 , a second repeated block 224 _ 2 , and a third repeated block 224 _ 3 . The number of repeated blocks is not used to limit the invention.

The first repeated block 224 _ 1 includes a first switch transistor T 1 A, a first compensating circuit 122 _ 1 , a storage capacitor Cst, and a first driving transistor T 21 . The first driving transistor T 21 includes a first gate terminal G 1 . The first compensating circuit 122 _ 1 is electrically connected to the first gate terminal G 1 . The first switch transistor T 1 A is electrically connected to the first compensating circuit 122 _ 1 . The second repeated block 224 _ 2 includes a second switch transistor T 1 B, a second compensating circuit 122 _ 2 , a storage capacitor Cst, and a second driving transistor T 22 . The second driving transistor T 22 includes a first gate terminal G 2 . The second compensating circuit 122 _ 2 is electrically connected to the second gate terminal G 2 . The second switch transistor T 1 B is electrically connected to the second compensating circuit 122 _ 2 . The third repeated block 224 _ 3 includes a third switch transistor T 1 C, a third compensating circuit 122 _ 3 , a storage capacitor Cst, and a third driving transistor T 23 . The third driving transistor T 23 includes a first gate terminal G 2 . The third compensating circuit 122 _ 3 is electrically connected to a third gate terminal G 3 . The third switch transistor T 1 C is electrically connected to the third compensating circuit 122 _ 3 . The first driving transistor T 21 , the second driving transistor T 22 , and the third driving transistor T 23 are configured to provide a first driving current I 21 , a second driving current I 22 , and a third driving current I 23 to the light emitting unit 110 at the same time, respectively. The first gate terminal G 1 , the second gate terminal G 2 , and the third gate terminal G 3 are electrically connected to different nodes. That is, in FIG. 2 , the first gate terminal G 1 , the second gate terminal G 2 , and the third gate terminal G 3 are different nodes in the pixel circuit 220 . The sum of the first driving current I 21 , the second driving current I 22 , and the third driving current I 23 is used as a larger driving current to drive the light emitting unit 110 to emit light.

In the present embodiment, the driving transistors T 21 , T 22 , T 23 may have different critical voltage values due to variations in a manufacturing process. The pixel circuit 220 includes a plurality of compensating circuits 122 _ 1 , 122 _ 2 , and 122 _ 3 . The compensating circuit 122 _ 1 may be configured to compensate a voltage value of the first gate terminal G 1 , the compensating circuit 122 _ 2 may be configured to compensate a voltage value of the second gate terminal G 2 , and the compensating circuit 122 _ 3 may be configured to compensate a voltage value of the third gate terminal G 3 . Specifically, the compensating circuits 122 _ 1 , 122 _ 2 , 122 _ 3 receive a reset voltage and a reference voltage. The compensating circuits 122 _ 1 , 122 _ 2 , and 122 _ 3 are configured to reset the voltage values of the first gate terminal G 1 , the second gate terminal G 2 , and the third gate terminal G 3 according to the reset voltage, and reduce the dependence of critical voltage values and driving currents of their corresponding driving transistors T 21 , T 22 , and T 23 according to an operating voltage ARVDD and the reference voltage. That is, the compensating circuits 122 _ 1 , 122 _ 2 , and 122 _ 3 may be configured to compensate the critical voltage values of their corresponding driving transistors T 21 , T 22 , and T 23 to solve the problem of uneven display brightness.

FIG. 3 illustrates a schematic diagram of a light emitting apparatus according to another embodiment of the invention. Referring to FIG. 3 , a display device 300 D of the present embodiment includes a light emitting apparatus 300 . The light emitting apparatus 300 includes a light emitting unit 110 and a pixel circuit 320 . The pixel circuit 320 is electrically connected to the light emitting unit 110 . The pixel circuit 320 includes a shared block 326 , a first repeated block 324 _ 1 , a second repeated block 324 _ 2 to an N th repeated block 324 _N, where N is a positive integer. The number of shared blocks and repeated blocks is not used to limit the invention.

The first repeated block 324 _ 1 includes a first compensating circuit 122 _ 1 , a storage capacitor Cst, and a first driving transistor T 21 . The first driving transistor T 21 includes a first gate terminal G 1 . The first compensating circuit 122 _ 1 is electrically connected to the first gate terminal G 1 . The second repeated block 324 _ 2 includes a second compensating circuit 122 _ 2 , a storage capacitor Cst, and a second driving transistor T 22 . The second driving transistor T 22 includes a first gate terminal G 2 . The second compensating circuit 122 _ 2 is electrically connected to the second gate terminal G 2 . The N th repeated block 324 _N includes an N th compensating circuit 122 _N, a storage capacitor Cst, and an N th driving transistor T 2 N. The N th driving transistor T 2 N includes a first gate terminal GN. The N th compensating circuit 122 _N is electrically connected to a third gate terminal GN. The first driving transistor T 21 , the second driving transistor T 22 to the N th driving transistor T 2 N are configured to provide a first driving current I 21 , a second driving current I 22 to an N th driving current I 2 N to the light emitting unit 110 at the same time, respectively. The first gate terminal G 1 , the second gate terminal G 2 to the N th gate terminal GN are electrically connected to different nodes. That is, in FIG. 3 , the first gate terminal G 1 , the second gate terminal G 2 to the N th gate terminal GN are different nodes in the pixel circuit 320 . The sum of the first driving current I 21 , the second driving current I 22 to the N th driving current I 2 N is used as a larger driving current to drive the light emitting unit 110 to emit light.

The shared block 326 includes a terminal point of the switch transistor T 1 electrically connected to the first compensating circuit 122 _ 1 , the second compensating circuit 122 _ 2 to the N th compensating circuit 122 _N.

In the present embodiment, the driving transistors T 21 , T 22 to T 2 N may have different critical voltage values due to variations in a manufacturing process. The pixel circuit 320 includes a plurality of compensating circuits 122 _ 1 , 122 _ 2 to 122 _N. The compensating circuit 122 _ 1 may be configured to compensate a voltage value of the first gate terminal G 1 , the compensating circuit 122 _ 2 may be configured to compensate a voltage value of the second gate terminal G 2 , and the compensating circuit 122 _ 3 may be configured to compensate a voltage value of the third gate terminal G 3 . That is, the compensating circuits 122 _ 1 , 122 _ 2 to 122 _N may be configured to compensate the critical voltage values of their corresponding driving transistors T 21 , T 22 to T 2 N to solve the problem of uneven display brightness.

FIG. 4 illustrates a schematic diagram of a light emitting apparatus according to another embodiment of the invention. Referring to FIG. 4 , a display device 400 D of the present embodiment includes a light emitting apparatus 400 . The light emitting apparatus 400 includes a light emitting unit 110 and a pixel circuit 420 . The pixel circuit 420 is electrically connected to the light emitting unit 110 . The pixel circuit 420 includes a switch transistor T 1 , a first driving transistor T 21 , a second driving transistor T 22 to an N th driving transistor T 2 N, and a compensating circuit 422 , where N is a positive integer.

A gate terminal of the switch transistor T 1 is coupled to a scanning line of the light emitting apparatus 400 through a contact Sn. A first source/drain terminal of the switch transistor T 1 is coupled to a data line of the light emitting apparatus 400 through a contact Dn. A second source/drain terminal of the switch transistor T 1 is coupled to the compensating circuit 422 of the light emitting apparatus 400 . When the switch transistor T 1 is turned on, a data voltage is input to the pixel circuit 420 through the contact Dn.

The first driving transistor T 21 includes a first gate terminal G 1 , the second driving transistor T 22 includes a second gate terminal G 2 , and the N th driving transistor T 2 N includes an N th gate terminal GN. The first gate terminal G 1 , the second gate terminal G 2 to the N th gate terminal GN are electrically connected to different nodes, respectively. That is, in FIG. 4 , the first gate terminal G 1 , the second gate terminal G 2 to the N th gate terminal GN are different nodes in the pixel circuit 420 . The first driving transistor T 21 , the second driving transistor T 22 to the N th driving transistor T 2 N may have the same size, and may be configured to provide a first driving current I 21 , a second driving current I 22 to an N th driving current I 2 N to the light emitting unit 110 at the same time, respectively. The sum of the first driving current I 21 , the second driving current I 22 to the N th driving current I 2 N is used as a larger driving current to drive the light emitting unit 110 to emit light. Or, according to other embodiments, the first driving transistor T 21 , the second driving transistor T 22 to the N th driving transistor T 2 N may have different sizes.

The pixel circuit 422 includes a shared unit 422 _ 0 , a first repeated unit 422 _ 1 , a second repeated unit 422 _ 2 to an N th repeated unit 422 _N. The number of shared units and repeated units is not used to limit the invention. The first repeated unit 422 _ 1 is electrically connected to the shared unit 422 _ 0 and the first gate terminal G 1 , the second repeated unit 422 _ 2 is electrically connected to the shared unit 422 _ 0 and the second gate terminal G 2 , and the N th repeated unit 422 _N is electrically connected to the shared unit 422 _ 0 and the N th gate terminal GN. The connection manner of other repeated units to the shared units and the gate terminals may be deduced by analogy.

The operation manner of the compensating circuit 422 compensating a critical voltage value of a driving transistor is described below. The operation manner of the compensating circuit 422 compensating a critical voltage value of a driving transistor may be mainly divided into three stages, namely a reset stage, a compensation stage, and a light emitting stage. The shared unit 422 _ 0 and the first repeated unit 422 _ 1 are taken as an example. In the reset stage, the node M and the gate terminal G 1 are reset to a voltage VREF and a voltage VRST, respectively. In the compensation stage, a data voltage is written to the node M through the contact Dn. At this moment, a voltage value of the gate terminal G 1 is ARVDD−|Vth 1 |, where ARVDD is a voltage value of an operating voltage ARVDD, and |Vth 1 | is an absolute value of a critical voltage value of the first driving transistor T 21 . Then, in the light emitting stage, the node M is set to the voltage VREF again. At this moment, the voltage value of the gate terminal G 1 is ARVDD-|Vth 1 |+ΔV, where ΔV is a voltage difference between the operating voltage ARVDD and the data voltage at the node M. Therefore, the voltage difference Vsg between the source terminal and the gate terminal G 1 of the first driving transistor T 21 minus the absolute value |Vth 1 | of the critical voltage value of the first driving transistor T 21 is equal to −ΔV, that is:

Vsg−|Vth 1|=ARVDD−(ARVDD−| Vth 1|+Δ V )−| Vth 1|=−Δ V

Therefore, the first driving current I 21 generated by the first driving transistor T 21 is equal to kp(−ΔV)2, that is:

I 21= kp (−Δ V ) 2

kp is a conduction parameter. The driving currents I 22 to I 2 N generated by the remaining driving transistors T 22 to T 2 N may be deduced by analogy. Therefore, according to the above compensation method, as a result, the dependence of the driving current on the critical voltage value of the driving transistor can be reduced, so that the problem of uneven display brightness can be solved. A circuit structure of the compensating circuit of the present embodiment and an operating mode of compensating the critical voltage value of the driving transistor are for illustration only. The compensating circuit of the present embodiment may be implemented by other suitable circuit structures without limiting the invention.

In the present embodiment, the driving transistors T 21 , T 22 to T 2 N may have different critical voltage values due to variations in a manufacturing process. The pixel circuit 420 includes a compensating circuit 422 . The compensating circuit 422 may be configured to compensate voltages of the first gate terminal G 1 , the second gate terminal G 2 to the N th gate terminal GN. The pixel circuit 422 includes a plurality of repeated units 422 _ 1 , 422 _ 2 to 422 _N. The repeated units 422 _ 1 , 422 _ 2 to 422 _N cooperate with the shared unit 422 _ 0 to compensate the critical voltage values of their corresponding driving transistors T 21 , T 22 to T 2 N to solve the problem of uneven display brightness.

Based on the foregoing, according to some embodiments, the light emitting apparatus includes a light emitting unit and a pixel circuit. The pixel circuit includes a plurality of driving transistors for respectively providing driving currents to the same light emitting unit at the same time, respectively. A large and sufficient driving current may be provided. According to some embodiments, the pixel circuit includes one or more compensating circuits for compensating critical voltage values of individual driving transistors, thereby solving the problem of uneven display brightness of the light emitting apparatus.

A person skilled in the art can understand that variations and modifications can be made for a structure of the disclosed embodiments without departing from the spirit and scope of the present invention. Based on the foregoing content, the present invention covers the variations and modifications of the present invention as long as the variations and modifications fall within the scope of the appended claims and equivalents thereof.