Sensor operating based on measuring range of depth and sensing system including the same

This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2019-0141421 filed on Nov. 7, 2019, in the Korean Intellectual Property Office, the disclosures of which are incorporated by reference herein in their entireties.

At least some example embodiments of the inventive concepts are described herein relate to a light sensor and a system including the light sensor, and more particularly, relate to a sensor operating based on a measuring range of a depth and a sensing system including the same.

A light sensor may be applied to various electronic devices including a smartphone. The light sensor may be used to convert an external light into an electrical signal and to capture an external image. Nowadays, the light sensor may be implemented to perform various functions of calculating a distance (or a depth) of an object and recognizing the object by using a sensed image, as well as a function of capturing an external image targeted for a display.

A time of flight (ToF) based sensing system may be implemented to calculate a distance between the sensing system and the object by using a sensor. The sensing system may include a light source. A light output from the light source may be reflected by the object, the reflected light may be provided to the image sensor, and a depth of the object may be calculated by using the reflected light. In particular, there is a demand on a sensing system improving the accuracy of measurement of an object by sensing only an object within a particular measuring range.

At least some example embodiments of the inventive concepts provide a sensor operating based on a measuring range of a depth so as to measure a depth of an object within a particular range and a sensing system including the same.

According to at least some example embodiments of the inventive concepts, a sensor includes a pixel array including a pixel configured to generate a first pixel signal and a second pixel signal, based on a light sensed during a window time of a sensing time; processing circuitry configured to select a measuring range from among a plurality of measuring ranges and set a width of the window time based on the selected measuring range; a converting circuit configured to convert the first and second pixel signals into digital signals; and a driving circuit configured to generate an overflow control signal, a first photo gate signal, and a second photo gate signal so as to sense the light during the window time, wherein the pixel includes, a photoelectric conversion element configured to generate charges based on the sensed light, a first readout circuit configured to receive first charges generated during a first time of the window time based on the first photo gate signal and to generate the first pixel signal based on the first charges, a second readout circuit configured to receive second charges generated during a second time of the window time based on the second photo gate signal and to generate the second pixel signal based on the second charges, and an overflow transistor configured to remove third charges generated during a delay time of the sensing time from the photoelectric conversion element, based on the overflow control signal, and wherein the delay time is before the window time in the sensing time.

According to at least some example embodiments of the inventive concepts, a sensor includes a pixel array including a pixel configured to generate an analog signal including a plurality of pixel signals based on a light sensed during a sensing time; a converting circuit configured to convert the analog signal into a digital signal; and a driving circuit configured to generate a first photo gate signal, a second photo gate signal, a third photo gate signal, and a fourth photo gate signal based on a measuring range of a depth, wherein the pixel includes a photoelectric conversion element configured to generate charges based on the sensed light; a first readout circuit configured to receive first charges generated during a first time of the sensing time based on the first photo gate signal and to generate a first pixel signal based on the first charges; a second readout circuit configured to receive second charges generated during a second time of the sensing time based on the second photo gate signal and to generate a second pixel signal based on the second charges; a third readout circuit configured to receive third charges generated during a third time of the sensing time based on the third photo gate signal and to generate a third pixel signal based on the third charges; and a fourth readout circuit configured to remove fourth charges generated during a fourth time, which is before the first to third times, of the sensing time from the photoelectric conversion element, based on the fourth photo gate signal.

According to at least some example embodiments, a sensing system includes a light source configured to output light pulses; a sensor configured to sense reflected pulses of the light pulses during a sensing time and to generate a depth image; and processing circuitry configured to control the light source and the sensor based on an operation mode which depends on a measuring range of a depth, wherein the sensor includes a pixel array including a pixel configured to generate pixel signals based on the reflected pulses, and a converting circuit configured to generate the depth image based on the pixel signals, and wherein the pixel includes: a photoelectric conversion element configured to generate charges based on the reflected pulses, readout circuits configured to generate the pixel signals based on first charges generated during a window time of the sensing time, and an overflow transistor configured to remove second charges generated during a delay time of the sensing time and to remove third charges generated during a masking time of the sensing time from the photoelectric conversion element, and wherein the delay time is before the window time within the sensing time and the masking time is after the window time within the sensing time.

The above and other features and advantages of example embodiments of the inventive concepts will become more apparent by describing in detail example embodiments of the inventive concepts with reference to the attached drawings. The accompanying drawings are intended to depict example embodiments of the inventive concepts and should not be interpreted to limit the intended scope of the claims. The accompanying drawings are not to be considered as drawn to scale unless explicitly noted.

FIG. 1 is a block diagram of a sensing system according to at least one example embodiment of the inventive concepts.

FIG. 2 is an example circuit diagram of a pixel of FIG. 1 .

FIG. 3 is an example layout of a pixel of FIG. 2 .

FIG. 4 is a diagram illustrating an example structure in which readout circuits of FIG. 2 are disposed.

FIGS. 5 and 6 are example timing diagrams of a pixel of FIG. 2 .

FIGS. 7 and 8 are timing diagrams of a sensing time of FIG. 5 or 6 .

FIGS. 9 to 12 are example flowcharts of an operation method of a sensing system of FIG. 1 .

FIGS. 13 and 14 are example timing diagrams of a sensing time of FIG. 5 or 6 .

FIGS. 15 and 16 are example circuit diagrams of a pixel of FIG. 1 .

FIGS. 17 and 18 are example timing diagrams of a sensing time of a pixel of FIG. 16 .

FIG. 19 is an example cross-sectional view of a pixel array of FIG. 1 .

FIG. 20 is a block diagram of a sensing system according to at least one example embodiment of the inventive concepts.

FIG. 21 is an example flowchart of an operation method of a sensing system of FIG. 20 .

FIG. 22 is a block diagram of a sensing system according to at least one example embodiment of the inventive concepts.

FIG. 23 is an example timing diagram of a pixel of FIG. 22 .

FIG. 24 is an example timing diagram of a sensing time of FIG. 23 .

As is traditional in the field of the inventive concepts, embodiments are described, and illustrated in the drawings, in terms of functional blocks, units and/or modules. Those skilled in the art will appreciate that these blocks, units and/or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, and the like, which may be formed using semiconductor-based fabrication techniques or other manufacturing technologies. In the case of the blocks, units and/or modules being implemented by microprocessors or similar, they may be programmed using software (e.g., microcode) to perform various functions discussed herein and may optionally be driven by firmware and/or software. Alternatively, each block, unit and/or module may be implemented by dedicated hardware, or as a combination of dedicated hardware to perform some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) to perform other functions. Also, each block, unit and/or module of the embodiments may be physically separated into two or more interacting and discrete blocks, units and/or modules without departing from the scope of the inventive concepts. Further, the blocks, units and/or modules of the embodiments may be physically combined into more complex blocks, units and/or modules without departing from the scope of the inventive concepts.

FIG. 1 is a block diagram of a sensing system according to at least one example embodiment of the inventive concepts. Referring to FIG. 1 , a sensing system 100 includes a light unit 110 , a sensor 120 , and a processor 130 . The sensing system 100 may be implemented with various electronic devices such as a digital camera, a smartphone, a tablet PC, and a wearable device. Also, the sensing system 100 may be implemented with various systems for peripheral recognition such as an autonomous driving system. For example, the sensing system 100 may be implemented with an integrated circuit (IC) or a system on chip (SoC). However, at least some example embodiments of the inventive concepts are not limited thereto. For example, the sensing system 100 may be implemented with any device or circuit for measuring a depth of an object.

The light unit 110 is configured to output a light to the outside. For example, the light unit 110 may output a light in a band (e.g., an infrared band) not perceived by a user to the outside. However, at least one example embodiment of the inventive concepts is not limited thereto. For example, the light unit 110 may output, to the outside, the light in any other band as well as the infrared band. The light unit 110 may include a light source controller 111 and a light source 112 .

The light source controller 111 may control an operation of the light source 112 . The light source controller 111 may control a timing of the light that is output from the light source 112 . The light source controller 111 may control the light source 112 so as to output a light having a regular cycle. To this end, a control signal may be generated from the sensor 120 (e.g., a driving circuit 124 ) or the processor 130 . The light source controller 111 may modulate the light output from the light source 112 . For example, the modulated light may have the shape of a square wave (light pulse) or the shape of a sine wave.

The light source 112 may output a light to the outside under control of the light source controller 111 . The light source 112 may include a light-emitting device that generates a light based on the electrical signal received from the light source controller 111 . For example, the light source 112 may output light pulses in the infrared band. The light output from the light source 112 may arrive at an object.

The sensor 120 senses the light reflected from the object. The sensor 120 may generate a depth image being an electrical signal, based on the reflected light. The depth image may be used to measure a depth from the sensing system 100 to the object. The sensor 120 may include a pixel array 121 , a converting circuit 122 , an output buffer 123 , and the driving circuit 124 .

The pixel array 121 may convert the light sensed from the outside into an analog signal being an electrical signal. The light sensed from the outside includes a light that is reflected by the object after being output from the light source 112 . The pixel array 121 includes a plurality of pixels PX arranged two-dimensionally. Each of the plurality of pixels PX may generate an analog signal based on the light received from the outside. The analog signal may include a pixel signal corresponding to each pixel PX. The pixel array 121 may be controlled by driving signals (or control signals) that are provided from the driving circuit 124 , which will be described with reference to FIG. 2 .

The pixels PX may sense the light from the outside during a sensing time and may respectively generate pixel signals. Due to a distance between the sensing system 100 and an object, the reflected light incident onto each pixel PX may be in time delayed with respect to the light output from the light source 112 . As such, a time difference may be present between the light output from the light source 112 and the reflected light incident onto each pixel PX. The distance between the object and the sensing system 100 may be calculated by using the time difference. How the pixels PX generate pixel signals will be described with reference to FIG. 2 .

The converting circuit 122 may convert an analog signal output from the pixel array 121 to a digital signal. This digital signal may be referred as to as a “depth image”. The converting circuit 122 may perform various operations for converting an analog signal into a digital signal, based on the control signals provided from the driving circuit 124 . For example, the converting circuit 122 may perform a correlated double sampling (CDS) operation on the analog signal and may remove a noise included in the analog signal.

The output buffer 123 may store the digital signal or the depth image generated from the converting circuit 122 . The output buffer 123 may output the digital signal or the depth image to the processor 130 .

The driving circuit 124 may control the pixel array 121 , the converting circuit 122 , and the output buffer 123 . For example, the driving circuit 124 may generate a clock signal and a timing control signal for operations of the pixel array 121 , the converting circuit 122 , and the output buffer 123 . The clock signal and the timing control signal may be provided to the light source controller 111 .

For example, to generate a depth image corresponding to one frame, the driving circuit 124 may control a global reset operation and a charge integration operation that are performed on all the pixels PX of the pixel array 121 . Afterwards, under control of the driving circuit 124 , pixel signals generated from the pixels PX through the charge integration operation may be output to the converting circuit 122 in units of a row.

The processor 130 may control the sensing system 100 and may calculate various data. The processor 130 may control the light source 112 such that the light source 112 outputs a light. According to at least some example embodiments of the inventive concepts, the processor 130 may control the sensor 120 . For example, the processor 130 may allow the sensor 120 to sense the light reflected from an object and to generate a depth image. For example, the processor 130 may control the elements of the sensor 120 (e.g., the pixel array 121 , the converting circuit 122 , and the output buffer 123 ) by controlling the driving circuit 124 to output desired control signals to the elements of the sensor 120 . According to at least some example embodiments of the inventive concepts, the processor 130 may be or include processing circuitry such as hardware including logic circuits; a hardware/software combination executing software; or a combination thereof. For example, the processing circuitry more specifically may include, but is not limited to, a central processing unit (CPU), an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), and programmable logic unit, a microprocessor, application-specific integrated circuit (ASIC), etc. According to at least some example embodiments of the inventive concepts, the processing circuitry may include a hardware-implemented data processing device having circuitry that is physically structured to execute desired operations including, for example, operations represented as code and/or instructions included in a program. According to at least some example embodiments of the inventive concepts, any or all operations discussed in the present disclosure as being performed by a light unit, a sensor, a sensing system, or an element thereof may be controlled and/or performed by a processor (e.g., processor 130 and/or 230 ) executing code (e.g., program code) that is stored in memory and includes instructions configured to cause the processor to perform and/or control to the operations.

The processor 130 may include an image signal processor (ISP) (not illustrated) for processing the depth image received from the output buffer 123 . The image signal processor (not illustrated) may calculate a distance between the object and the sensing system 100 , that is, a time of flight (ToF) value, based on the depth image. For example, the processor 130 may calculate a delay time, by which the reflected light is delayed with respect to the output light, based on the depth image and may calculate the ToF value based on the delay time. The processor 130 may determine a distance, a shape, and a movement speed of the object by using the ToF value.

The processor 130 may decide a measuring range of a depth that the sensor 120 is capable of measuring. The processor 130 may select one of operation modes corresponding to different measuring ranges. For example, the operation modes may include a first mode for measuring a depth of an object within a first range relatively close to the sensing system 100 , and a second mode for measuring a depth of an object within a second range relatively distant from the sensing system 100 . Depending on the selected operation mode, the processor 130 may allow the driving circuit 124 to adjust a time to receive charges generated by a light, which the pixels PX sense, and a time to remove the charges. This will be more fully detailed later.

FIG. 2 is an example circuit diagram of a pixel of FIG. 1 . Referring to FIG. 2 , a pixel PXa may include a photoelectric conversion element PD, a first readout circuit RO 1 , a second readout circuit RO 2 , a third readout circuit RO 3 , a fourth readout circuit RO 4 , and an overflow transistor OX.

The photoelectric conversion element PD may generate charges based on a light sensed from the outside. The charges generated by the photoelectric conversion element PD may be distributed into the first to fourth readout circuits RO 1 to RO 4 . The first to fourth readout circuits RO 1 to RO 4 may share one photoelectric conversion element PD. That is, the photoelectric conversion element PD may be electrically connected with the first to fourth readout circuits RO 1 to RO 4 . For example, the photoelectric conversion element PD may include a photo diode for converting a light signal into an electrical signal.

The first to fourth readout circuits RO 1 to RO 4 may include photo transistors P 1 , P 2 , P 3 , and P 4 , first transfer transistors TA 1 , TA 2 , TA 3 , and TA 4 , storage transistors S 1 , S 2 , S 3 , and S 4 , second transfer transistors TB 1 , TB 2 , TB 3 , and TB 4 , reset transistors R 1 , R 2 , R 3 , and R 4 , source follower transistors SF 1 , SF 2 , SF 3 , and SF 4 , and selection transistors SX 1 , SX 2 , SX 3 , and SX 4 .

For convenience of description, in embodiments below, the description will be given under the assumption that transistors included in a pixel are turned on when a voltage of a high level is applied to a control terminal (or a gate terminal), like an NMOS transistor. However, at least some example embodiments of the inventive concepts are not limited thereto. For example, each of the transistors included in the pixel PXa may be turned on when a voltage of a low level is applied to a control terminal (or a gate terminal), like a PMOS transistor. That is, a kind of transistors included in the pixel PXa and a pixel to be described below are not limited to FIG. 2 .

The photo transistors (or first to fourth photo transistors) P 1 to P 4 may receive charges generated from the photoelectric conversion element PD based on first, second, third, and fourth photo gate signals PG 1 , PG 2 , PG 3 , and PG 4 , respectively. The first to fourth photo gate signals PG 1 to PG 4 may have different phases within a sensing time. As such, the first to fourth photo transistors P 1 to P 4 may be turned on during different times within the sensing time and may receive the generated charges during the different times. The first to fourth photo gate signals PG 1 to PG 4 may be provided from the driving circuit 124 . The amounts of charges that the first to fourth photo transistors P 1 to P 4 receive may be different. A time delay of a light output from the light source 112 of FIG. 1 may be calculated based on the different charge amounts.

The first transfer transistors TA 1 to TA 4 may be turned on during the sensing time based on a first transfer control signal TG 1 and may be turned off during a time other than the sensing time. The first transfer control signal TG 1 may be provided from the driving circuit 124 . The first transfer transistors TA 1 to TA 4 may transfer charges received from the photo transistors P 1 to P 4 to the storage transistors S 1 to S 4 during the sensing time. The first transfer transistors TA 1 to TA 4 may prevent charges generated from the photoelectric conversion element PD from being transferred to the storage transistors S 1 to S 4 during a time other than the sensing time.

The storage transistors S 1 to S 4 may store the charges received by the photo transistors P 1 to P 4 . The storage transistors S 1 to S 4 may be turned on during the sensing time based on storage control signals SG 1 and SG 2 and may receive the charges transferred through the first transfer transistors TA 1 to TA 4 . The storage transistors S 1 to S 4 may be turned off during a readout time for outputting pixel signals Vout 1 , Vout 2 , Vout 3 , and Vout 4 after the sensing time based on the storage control signals SG 1 and SG 2 and may output the stored charges to floating diffusion areas FD 1 , FD 2 , FD 3 , and FD 4 . The storage control signals SG 1 and SG 2 may be provided from the driving circuit 124 .

The second transfer transistors TB 1 to TB 4 may be turned off during the sensing time based on second transfer control signals TG 21 and TG 22 and may be turned on during the readout time. For example, the readout time of the first and second readout circuits RO 1 and RO 2 and the readout time of the third and fourth readout circuits RO 3 and RO 4 are different, but at least some example embodiments of the inventive concepts are not limited thereto. The second transfer control signals TG 21 and TG 22 may be provided from the driving circuit 124 . The second transfer transistors TB 1 to TB 4 may be turned off during the sensing time and may prevent the charges stored at the storage transistors S 1 to S 4 from being transferred to the floating diffusion areas FD 1 to FD 4 . The second transfer transistors TB 1 to TB 4 may be turned on during the readout time and may transfer the charges stored at the storage transistors S 1 to S 4 to the floating diffusion areas FD 1 to FD 4 .

The reset transistors R 1 to R 4 may remove the charges stored at the floating diffusion areas FD 1 to FD 4 based on reset control signals RG 1 and RG 2 . The reset transistors R 1 to R 4 may be connected between a supply terminal of a power supply voltage V DD and the floating diffusion areas FD 1 to FD 4 . The reset control signals RG 1 and RG 2 may be provided from the driving circuit 124 .

The source follower transistors SF 1 to SF 4 generate the pixel signals Vout 1 , Vout 2 , Vout 3 , and Vout 4 based on the charges stored at the floating diffusion areas FD 1 to FD 4 . Magnitudes of the pixel signals Vout 1 to Vout 4 are decided depending on the amounts of charges stored at the floating diffusion areas FD 1 to FD 4 .

The selection transistors SX 1 to SX 4 output the pixel signals Vout 1 to Vout 4 to the converting circuit 122 of FIG. 1 based on selection signals SEL 1 and SEL 2 . The pixel signals Vout 1 to Vout 4 may be output to a column line connected with the selection transistors SX 1 to SX 4 . The selection signals SEL 1 and SEL 2 may be provided from the driving circuit 124 .

The overflow transistor OX may be turned off based on an overflow control signal OG while at least one of the photo transistors P 1 to P 4 is turned on and may be turned on based on the overflow control signal OG while all the photo transistors P 1 to P 4 are turned off or are turned on. While the first transfer control signal TG 1 is turned off and the overflow control signal OG is turned on, all the photo transistors P 1 to P 4 may be simultaneously turned off or may maintain a turn-on state. The overflow control signal OG may be provided from the driving circuit 124 . The overflow transistor OX may be connected between the supply terminal of the power supply voltage V DD and the readout circuits RO 1 to RO 4 (or the photoelectric conversion element PD). When turned on, the overflow transistor OX may remove charges generated from the photoelectric conversion element PD.

Unlike the example of FIG. 2 in which the overflow transistor OX is directly connected with the photoelectric conversion element PD, the overflow transistor OX may be connected with the photoelectric conversion element PD through the photo transistors P 1 to P 4 . In this case, the photo transistors P 1 to P 4 may be turned on during a time other than the sensing time. In contrast, in the structure where the overflow transistor OX is directly connected with the photoelectric conversion element PD, the photo transistors P 1 to P 4 may be turned off during a time other than the sensing time.

The overflow transistor OX may remove charges generated from the photoelectric conversion element PD due to an external light during a time other than the sensing time. In addition, the overflow transistor OX may be turned on during a portion of the sensing time, thus removing charges generated by a light reflected from an object existing within an unwanted distance. That is, the overflow transistor OX may operate in such a way that an object existing within a range other than a measuring range corresponding to an operation mode selected by the processor 130 of FIG. 1 is prevented from being detected.

FIG. 3 is an example layout of a pixel of FIG. 2 . Referring to FIG. 3 , the pixel PXa may include gate electrodes GP 1 , GP 2 , GP 3 , and GP 4 of the photo transistors P 1 , P 2 , P 3 , and P 4 , gate electrodes GTA 1 , GTA 2 , GTA 3 , and GTA 4 of the transfer transistors TA 1 , TA 2 , TA 3 , and TA 4 , gate electrodes GS 1 , GS 2 , GS 3 , and GS 4 of the storage transistors S 1 , S 2 , S 3 , and S 4 , gate electrodes GTB 1 , GTB 2 , GTB 3 , and GTB 4 of the second transfer transistors TB 1 , TB 2 , TB 3 , and TB 4 , gate electrodes GR 1 , GR 2 , GR 3 , and GR 4 of the reset transistors R 1 , R 2 , R 3 , and R 4 , gate electrodes GSF 1 , GSF 2 , GSF 3 , and GSF 4 of the source follower transistors SF 1 , SF 2 , SF 3 , and SF 4 , gate electrodes GSX 1 , GSX 2 , GSX 3 , and GSX 4 of the selection transistors SX 1 , SX 2 , SX 3 , and SX 4 , and gate electrodes GO 1 , GO 2 , GO 3 , and GO 4 of the overflow transistor OX. Drains or sources of various transistors described with reference to FIG. 2 and the floating diffusion areas FD 1 to FD 4 may be formed or disposed in shaded areas of FIG. 3 .

First, second, third, and fourth directions DR 1 , DR 2 , DR 3 , and DR 4 are defined in FIG. 3 . The first direction DR 1 and the second direction DR 2 may be perpendicular to each other. Each of the first and second directions DR 1 and DR 2 may be perpendicular to a direction that faces the pixel array 121 in a plan view. For example, the first and second directions DR 1 and DR 2 may correspond to the row and column directions in which the pixels PXa of the pixel array 121 are arranged. The third direction DR 3 may indicate a direction between the directions DR 1 and DR 2 , and the fourth direction DR 4 may be perpendicular to the third direction DR 3 . Each of the third and fourth directions DR 3 and DR 4 may be perpendicular to a direction that faces the pixel array 121 in a plan view.

The gate electrodes GP 1 to GP 4 of the photo transistors P 1 to P 4 may be disposed adjacent to each other in the central region of the pixel PXa. The gate electrodes GTA 1 to GTA 4 of the first transfer transistors TA 1 to TA 4 may be disposed adjacent to the respective gate electrodes GP 1 to GP 4 along the third direction DR 3 or the fourth direction DR 4 . The gate electrodes GS 1 to GS 4 of the storage transistors S 1 to S 4 may be disposed adjacent to the respective gate electrodes GTA 1 to GTA 4 along the third direction DR 3 or the fourth direction DR 4 . The gate electrodes GTB 1 to GTB 4 of the second transfer transistors TB 1 to TB 4 may be respectively interposed between the gate electrodes GS 1 to GS 4 and the floating diffusion areas FD 1 to FD 4 along the first direction DR 1 . The gate electrodes GR 1 to GR 4 of the reset transistors R 1 to R 4 may be disposed adjacent to the respective floating diffusion areas FD 1 to FD 4 along the first direction DR 1 .

The gate electrodes GSF 1 to GSF 4 of the source follower transistors SF 1 to SF 4 may be disposed adjacent to the respective gate electrodes GP 1 to GP 4 along the first direction DR 1 . Although not illustrated in FIG. 3 , metal wires electrically connecting the floating diffusion areas FD 1 to FD 4 with the gate electrodes GSF 1 to GSF 4 may be disposed on/above the pixel PXa. The gate electrodes GSX 1 to GSX 4 of the selection transistors SX 1 to SX 4 may be disposed adjacent to the respective gate electrodes GSF 1 to GSF 4 along the second direction DR 2 .

An imaginary line {circle around (1)} may be parallel to the first direction DR 1 , and an imaginary line {circle around (2)} may be parallel to the second direction DR 2 . A cross point of the imaginary lines {circle around (1)} and {circle around (2)} may be the center of the pixel PXa in a plan view. The area of the pixel PXa may be divided into quadrants, each of which is bounded by the imaginary lines {circle around (1)} and {circle around (2)}. The readout circuits RO 1 to RO 4 (refer to FIG. 2 ) of the pixel PXa may be respectively disposed in the quadrants. For example, the first and second readout circuits RO 1 and RO 2 may be symmetrical with respect to the imaginary line {circle around (2)}. The third and fourth readout circuits RO 3 and RO 4 may be symmetrical with respect to the imaginary line {circle around (2)}. The first and third readout circuits RO 1 and RO 3 may be symmetrical with respect to the imaginary line {circle around (1)}. The second and fourth readout circuits RO 2 and RO 4 may be symmetrical with respect to the imaginary line {circle around (1)}. The first and fourth readout circuits RO 1 and RO 4 may be symmetrical with respect to the center of the pixel PXa. The second and third readout circuits RO 2 and RO 3 may be symmetrical with respect to the center of the pixel PXa. As a result, the first to fourth readout circuits RO 1 to RO 4 may share one photoelectric conversion element PD.

FIG. 4 is a diagram illustrating an example structure in which readout circuits of FIG. 2 are disposed. The first to fourth pixels PX 1 , PX 2 , PX 3 , and PX 4 of the pixel array 121 are illustrated in FIG. 4 . The first pixel PX 1 and the second pixel PX 2 may be disposed adjacent to each other in the first direction DR 1 . The third pixel PX 3 and the fourth pixel PX 4 may be disposed adjacent to each other in the first direction DR 1 . The first pixel PX 1 and the third pixel PX 3 may be disposed adjacent to each other in the second direction DR 2 . The second pixel PX 2 and the fourth pixel PX 4 may be disposed adjacent to each other in the second direction DR 2 .

Each of the first to fourth pixels PX 1 to PX 4 may include the first to fourth readout circuits RO 1 to RO 4 . As described with reference to FIG. 2 , the first to fourth readout circuits RO 1 to RO 4 may share the photoelectric conversion element PD and the overflow transistor OX and may include various transistors described with reference to FIG. 2 .

As described with reference to FIGS. 2 and 3 , the first to fourth readout circuits RO 1 to RO 4 may be symmetrical with respect to the center of each of the first to fourth pixels PX 1 to PX 4 and may have the same circuit structure. The first to fourth readout circuits RO 1 to RO 4 may operate based on photo gate signals having different phases, respectively. That is, the first to fourth readout circuits RO 1 to RO 4 may be divided based on a timing to receive charges generated from the photoelectric conversion element PD.

An imaginary line {circle around (1)} may be parallel to the first direction DR 1 , and an imaginary line {circle around (4)} may be parallel to the second direction DR 2 . In a plan view, a cross point of the imaginary lines {circle around (1)} and {circle around (4)} may be the center of the first to fourth pixels PX 1 to PX 4 . The first to fourth pixels PX 1 to PX 4 may be divided into quadrants on the basis of the imaginary lines {circle around (1)} and {circle around (4)}. The first to fourth pixels PX 1 to PX 4 may be disposed in the quadrants, respectively. For example, the first and second pixels PX 1 and PX 2 may be symmetrical with respect to the imaginary line {circle around (4)}. The third and fourth pixels PX 3 and PX 4 may be symmetrical with respect to the imaginary line {circle around (4)}. The first and third pixels PX 1 and PX 3 may be symmetrical with respect to the imaginary line {circle around (3)}. The second and fourth pixels PX 2 and PX 4 may be symmetrical with respect to the imaginary line {circle around (3)}. The first and fourth pixels PX 1 and PX 4 may be symmetrical with respect to the center. The second and third pixels PX 2 and PX 3 may be symmetrical with respect to the center.

As a result, the fourth readout circuits RO 4 of the first to fourth pixels PX 1 to PX 4 may be disposed adjacent to each other with respect to the center. Besides, in the pixel array 121 , four identical read circuits may be adjacent to each other with respect to the center of four adjacent pixels. In this case, the four identical readout circuits may share a floating diffusion area. That is, four readout circuits operating in response to photo gate signals of the same phase may be gathered such that a floating diffusion area is shared, and thus, the size of the pixel array 121 may decrease. However, it may be understood that the structure of the first to fourth pixels PX 1 to PX 4 of FIG. 4 is an example, and the first to fourth pixels PX 1 to PX 4 may include the first to fourth readout circuits RO 1 to RO 4 having the same layout.

FIG. 5 is a timing diagram of a pixel of FIG. 2 . In FIG. 5 , a horizontal axis represents a time, and a vertical axis represents magnitudes of the first to fourth photo gate signals PG 1 to PG 4 , the first transfer control signal TG 1 , the storage control signals SG 1 and SG 2 , the second transfer control signals TG 21 and TG 22 , the reset control signals RG 1 and RG 2 , the selection signals SEL 1 and SEL 2 , and the overflow control signal OG. The above signals may be generated from the driving circuit 124 of FIG. 1 . In an embodiment, it is assumed that transistors to which the signals illustrated in FIG. 5 are applied are turned on when the signals have a high level. For convenience of description, FIG. 5 will be described with reference to reference signs of FIGS. 1 and 2 .

A first time T 1 is defined as the global reset time. During the global reset time, charges generated or stored at the pixel array 121 including the floating diffusion areas FD 1 to FD 4 , the storage transistors S 1 to S 4 , and the photoelectric conversion element PD may be removed. To this end, the reset control signals RG 1 and RG 2 , the second transfer control signals TG 21 and TG 22 , and the overflow control signal OG may have a high level.

A second time T 2 is defined as the sensing time. During the sensing time, the light source 112 of FIG. 1 outputs light pulses to the outside, and the pixel array 121 senses pulses reflected from an object and generates charges. The first to fourth photo gate signals PG 1 to PG 4 may have different phases at a given frequency. Each of the first to fourth photo gate signals PG 1 to PG 4 may have the high level during a different time. That is, the first to fourth photo transistors P 1 to P 4 may receive the charges generated based on the received light during the different times.

The first to fourth photo gate signals PG 1 to PG 4 may have the high level after a given delay time. The delay time may be decided depending on a measuring range of a depth selected by the processor 130 . The delay time may have a small time interval in an operation mode for sensing an object existing at a close distance from the sensing system 100 and may have a great time interval in an operation mode for sensing an object existing at a long distance from the sensing system 100 .

During the second time T 2 , charges received from the first to fourth photo transistors P 1 to P 4 are stored at the storage transistors S 1 to S 4 through the first transfer transistors TA 1 to TA 4 . To this end, the first transfer control signal TG 1 and the storage control signals SG 1 and SG 2 may have the high level.

The overflow control signal OG may have a low level while at least one of the first to fourth photo gate signals PG 1 to PG 4 has the high level and may have the high level while all the first to fourth photo gate signals PG 1 to PG 4 have the low level (or the high level). When the overflow control signal OG has the high level, the overflow transistor OX removes charges generated by the photoelectric conversion element PD.

The overflow control signal OG may control the overflow transistor OX so as not to sense an object being out of the measuring range of the depth decided by the processor 130 . The overflow control signal OG may have the high level during a delay time of the second time T 2 such that an object of a close distance being out of the measuring range is not sensed. The overflow control signal OG may have the high level after a time, during which the first to fourth photo gate signals PG 1 to PG 4 have the high level, of the second time T 2 , and thus, an object of a long distance being out of the measuring range may not be sensed.

A third time T 3 may be defined as a first readout time for reading pixel signals from readout circuits (e.g., the first and second readout circuits RO 1 and RO 2 of FIG. 2 ) corresponding to a first row. A fourth time T 4 may be defined as a second readout time for reading pixel signals from readout circuits (e.g., the third and fourth readout circuits RO 3 and RO 4 of FIG. 2 ) corresponding to a second row. During the third and fourth times T 3 and T 4 , to block the introduction of additional charges due to an external light or a dark current, the first to fourth photo gate signals PG 1 to PG 4 , the first transfer control signal TG 1 , and the storage control signals SG 1 and SG 2 may have the low level, and the overflow control signal OG may have the high level.

When the first transfer control signal TG 21 corresponding to the first row have the high level during the third time T 3 , the charges stored at the first and second storage transistors S 1 and S 2 are transferred to the first and second floating diffusion areas FD 1 and FD 2 . In this case, the first reset control signal RG 1 corresponding to the first row may have the low level. Pixel signals generated based on the charges stored at the first and second floating diffusion areas FD 1 and FD 2 may be output to the converting circuit 122 based on the first selection signal SELL

When the second transfer control signal TG 22 corresponding to the second row have the high level during the fourth time T 4 , the charges stored at the third and fourth storage transistors S 3 and S 4 are transferred to the third and fourth floating diffusion areas FD 3 and FD 4 . In this case, the second reset control signal RG 2 corresponding to the second row may have the low level. Pixel signals generated based on the charges stored at the third and fourth floating diffusion areas FD 3 and FD 4 may be output to the converting circuit 122 based on the second selection signal SEL 2 .

Unlike the example illustrated in FIG. 5 , the second transfer control signals TG 21 and TG 22 may have the same waveform, the reset control signals RG 1 and RG 2 may have the same waveform, and the selection signals SEL 1 and SEL 2 may have the same waveform. In this case, the first to fourth readout circuits RO 1 to RO 4 may output pixel signals at the same time.

FIG. 6 is an example timing diagram of a pixel of FIG. 2 . The timing diagram of FIG. 6 is identical to the timing diagram of FIG. 5 except for waveforms of the storage control signals SG 1 and SG 2 , and thus, additional description associated with the same signals of FIG. 5 will be omitted to avoid redundancy.

Referring to FIG. 6 , unlike FIG. 5 , the storage control signals SG 1 and SG 2 may have the low level when the second transfer control signals TG 21 and TG 22 have the high level during the third time T 3 or the fourth time T 4 . That is, the storage transistors S 1 to S 4 may maintain a storage capacity of charges before the stored charges are transferred to the floating diffusion areas FD 1 to FD 4 through the second transfer transistors TB 1 to TB 4 . In an actual operation, a reaction time difference between the storage transistors S 1 to S 4 and the second transfer transistors TB 1 to TB 4 may exist, or a time taken to transfer charges may exist. As such, the second transfer control signals TG 21 and TG 22 may be quickly changed compared with the storage control signals SG 1 and SG 2 . In the case where an external light is strong, charges, the amount of which exceeds the storage capacity of the floating diffusion areas FD 1 to FD 4 , may be generated. To prevent the overflow of the floating diffusion areas FD 1 to FD 4 , the storage transistors S 1 to S 4 may be turned on during partial times of the third and fourth times T 3 and T 4 .

FIGS. 7 and 8 are example timing diagrams of a sensing time of FIG. 5 or 6 . In FIGS. 7 and 8 , a horizontal axis represents a time, and a vertical axis represents magnitudes of a light pulse signal LP, a reflection pulse signal RP, the first to fourth photo gate signals PG 1 to PG 4 , and the overflow control signal OG.

The light pulse signal LP is output from the light source 112 of FIG. 1 . The light pulse signal LP may include pulses having a period of a reference time TS. The reflection pulse signal RP may include pulses arriving at the pixel array 121 after the light pulse signal LP is reflected from an object. One reference time TS may include a delay time TD, a window time TW, and a masking time TM.

During the delay time TD, the pulse of the light pulse signal LP is output from the light source 112 . A length or width of the delay time TD may depend on a measuring range of a depth selected by the processor 130 of FIG. 1 . For example, the delay time TD may have a small width in an operation mode for sensing an object existing at a close distance from the sensing system 100 and may have a great width in an operation mode for sensing an object existing at a long distance from the sensing system 100 . The delay time TD may be adjusted depending on the operation mode.

During the delay time TD, the overflow control signal OG may have the high level. As a result, charges generated by the photoelectric conversion element PD during the delay time TD may be removed. A light provided to the pixel array 121 during the delay time TD may not be sensed. This light may be an external light or the reflection pulse signal RP provided from an object closer to the sensing system 100 than a measuring range of a depth.

During the window time TW, the reflection pulse signal RP input to the pixel array 121 may be sensed. A length or width of the window time TW may depend on the measuring range of the depth selected by the processor 130 of FIG. 1 . For example, the window time TW may have a great width in an operation mode for sensing an object within a wide range and may have a small width in an operation mode for sensing an object within a narrow range. The window time TW may be adjusted depending on the operation mode.

During the window time TW, the overflow control signal OG may have the low level. As a result, charges generated from the photoelectric conversion element PD during the window time TW may be distributed to the readout circuits RO 1 to RO 4 based on the first to fourth photo gate signals PG 1 to PG 4 and may be stored at the readout circuits RO 1 to RO 4 . The first to fourth photo gate signals PG 1 to PG 4 may have different phases and may have the high level at different times. An example is illustrated as the times when the first to fourth photo gate signals PG 1 to PG 4 have the high level do not overlap each other, but at least some example embodiments of the inventive concepts are not limited thereto. For example, some of the times when the first to fourth photo gate signals PG 1 to PG 4 have the high level may overlap each other.

Because the width of the window time TW is adjusted depending on the operation mode, a pulse width of the first to fourth photo gate signals PG 1 to PG 4 may be adjusted to correspond to the width of the window time TW. For example, as the window time TW increases, the pulse width of the first to fourth photo gate signals PG 1 to PG 4 may also increase. The driving circuit 124 may adjust the pulse width of the photo gate signals PG 1 to PG 4 based on the operation mode selected by the processor 130 .

Because the width of the window time TW is adjusted depending on the operation mode, the pulse width of the light pulse signal LP may be adjusted to correspond to the width of the window time TW. For example, as the window time TW increases, the pulse width of the light pulse signal LP may also increase. The light source controller 111 may adjust the pulse width of the light source controller 111 based on the operation mode selected by the processor 130 .

During the masking time TM, the overflow control signal OG may have the high level. As a result, charges generated by the photoelectric conversion element PD during the masking time TM may be removed. A light provided to the pixel array 121 during the masking time TM may not be sensed. This light may be an external light or the reflection pulse signal RP provided from an object more distant from the sensing system 100 than the measuring range of the depth. A length or width of the masking time TM may depend on the measuring range of the depth selected by the processor 130 of FIG. 1 . For example, the width of the masking time TM may be decided depending on the widths of the delay time TD and the window time TW.

An end time point of the delay time TD or a start time point of the window time TW may correspond to the lower limit of the measuring range of the depth. An end time point of the window time TW or a start time point of the masking time TM may correspond to the upper limit of the measuring range of the depth. The delay time TD, the window time TW, and the masking time TM may be repeated. As the delay time TD, the window time TW, and the masking time TM are repeated, charges stored at the readout circuits RO 1 to RO 4 may be accumulated, and a measurement error of a depth may decrease.

Referring to FIG. 7 , the reflection pulse signal RP includes a pulse that is provided to the pixel array 121 during the window time TW. That is, an object may exist within a measuring range corresponding to an operation mode. For example, a part of charges generated by the reflection pulse signal RP may be stored at the first readout circuit RO 1 based on the first photo gate signal PG 1 , and the rest of the charges may be stored at the second readout circuit RO 2 based on the second photo gate signal PG 2 . A magnitude of the pixel signal may be decided depending on the amount of stored charges. A depth of an object may be calculated based on magnitudes of pixel signals respectively output from the readout circuits RO 1 to RO 4 .

Referring to FIG. 8 , the reflection pulse signal RP includes a pulse that is provided to the pixel array 121 during a time (e.g., the delay time TD) other than the window time TW. That is, an object may be out of a measuring range corresponding to an operation mode. Accordingly, charges generated by the reflection pulse signal RP may be removed by the overflow transistor OX. For example, dust closer to the sensing system 100 than the measuring range or unnecessary objects more distant from the sensing system 100 than the measuring range may not be sensed by the sensing system 100 . As a result, an object of a targeted measuring range may be exactly sensed.

FIG. 9 is an example flowchart of an operation method of a sensing system of FIG. 1 . An embodiment corresponding to the case where measuring ranges of a depth corresponding to operation modes are different but widths of the measuring ranges are identical will be described with reference to operations of FIG. 9 . For convenience of description, FIG. 9 will be described with reference to signs of FIGS. 1 and 2 .

In operation S 110 , the processor 130 may select an operation mode of the sensing system 100 . In an embodiment, the operation mode may include a first mode, a second mode, and a third mode. The first mode may be an operation mode for sensing an object within a first range from the sensing system 100 . The second mode may be an operation mode for sensing an object within a second range that is more distant from the sensing system 100 than the first range. The third mode may be an operation mode for sensing an object within a third range that is more distant from the sensing system 100 than the second range. The first to third ranges may have the same width and may be, for example, 30 m wide. The processor 130 may select one of the first to third operation modes depending on a sensing purpose.

In operation S 120 , the light unit 110 may output light pulses to the outside. The output light pulses may be reflected from an object and may arrive at the sensing system 100 .

In operation S 130 , the sensor 120 may detect or sense the reflected light pulses. The driving circuit 124 may generate an overflow control signal and photo gate signals so as to have the delay time TD corresponding to the operation mode selected in operation S 110 . The delay time TD may include first, second, and third delay times TD 1 , TD 2 , and TD 3 respectively corresponding to the first, second, and third modes. The first delay time TD 1 may be smaller than the second delay time TD 2 , and the second delay time TD 2 may be smaller than the third delay time TD 3 .

A start time point of the window time TW described with reference to FIGS. 7 and 8 may be decided based on the first to third delay times TD 1 to TD 3 . The sensing system 100 measures a depth of an object based on reflection pulses received from the window time TW. A measuring range of an object may be selected by selecting one of different delay times. The sensing system 100 may calculate a depth of an object existing within the selected measuring range.

FIG. 10 is an example flowchart of an operation method of a sensing system of FIG. 1 . An embodiment corresponding to the case where measuring ranges of a depth corresponding to operation modes are different and widths of the measuring ranges are different will be described with reference to operations of FIG. 10 . For convenience of description, FIG. 10 will be described with reference to signs of FIGS. 1 and 2 .

In operation S 210 , the processor 130 may select an operation mode of the sensing system 100 . In an embodiment, the operation mode may include a first mode, a second mode, and a third mode. The first mode may be an operation mode for sensing an object within a first range. The second mode may be an operation mode for sensing an object within a second range that is more distant from the sensing system 100 than the first range. The third mode may be an operation mode for sensing an object within a third range that is more distant from the sensing system 100 than the second range. The widths of the first to third ranges may be different.

In operation S 220 , the light unit 110 may output light pulses to the outside. The light unit 110 may output light pulses having a pulse width corresponding to the selected operation mode to the outside. The light pulses may include first, second, and third light pulses LP 1 , LP 2 , and LP 3 respectively corresponding to the first, second, and third modes. A pulse width of each of the first, second, and third light pulses LP 1 , LP 2 , and LP 3 may be decided depending on a width of each of the first, second, and third ranges. For example, in the case where the width of the second range is greater than the width of the first range, the pulse width of the second light pulses LP 2 may be greater than the pulse width of the first light pulses LP 1 .

In operation S 230 , the sensor 120 may detect or sense the reflected light pulses. The driving circuit 124 may generate an overflow control signal and photo gate signals so as to have the delay time TD and the window time TW corresponding to the selected operation mode. The delay time TD may include the first, second, and third delay times TD 1 , TD 2 , and TD 3 respectively corresponding to the first, second, and third modes. A start time point of the window time TW may be decided based on the first to third delay times TD 1 to TD 3 . The window time TW may include first, second, and third window times TW 1 , TW 2 , and TW 3 respectively corresponding to the first, second, and third modes. For example, in the case where the width of the second range is greater than the width of the first range, a width of the second window time TW 2 may be greater than a pulse width of the first window time TW 1 . Accordingly, the lower limit, the upper limit, and the width of the measuring range may be changed depending on a change of an operation mode.

In the case where one operation mode is selected, the sensing system 100 may repeatedly sense light pulses having a given period during the sensing time. While light pulses are repeatedly sensed, the sensing system 100 may sense light pulses based on the delay time TD and window time TW that are fixed. For example, in the case where a measuring range is between 3 m and 6 m from the sensing system 100 , the sensing system 100 may repeatedly sense light pulses based on the delay time TD and the window time TW corresponding to the measuring range of 3 m to 6 m.

However, at least some example embodiments of the inventive concepts are not limited thereto. For example, the sensing system 100 may repeatedly sense light pulses while sequentially increasing or decreasing the delay time TD or the window time TW. For example, in the case where the measuring range is between 3 m and 6 m from the sensing system 100 , the sensing system 100 may sense at least one light pulse based on the delay time TD and window time TW corresponding to the measuring range of 3 m to 4 m. Next, the sensing system 100 may sense at least one light pulse based on the delay time TD and window time TW corresponding to the measuring range of 3 m to 5 m. Then, the sensing system 100 may sense at least one light pulse based on the delay time TD and window time TW corresponding to the measuring range of 3 m to 6 m. Here, because the lower limit of the measuring range is fixed to 3 m, the delay time TD may not be changed. However, because the width of the measuring range sequentially increases, the window time TW may sequentially increase.

FIG. 11 is an example flowchart of an operation method of a sensing system of FIG. 1 . An embodiment corresponding to the case of finely measuring a depth of an object after coarsely measuring the depth of the object will be described with reference to operations of FIG. 11 . For convenience of description, FIG. 11 will be described with reference to signs of FIGS. 1 and 2 .

In operation S 310 , the processor 130 may select a wide range mode (or a first mode). In operation S 320 , the sensing system 100 may sense an object depending on the first mode. As described with reference to FIG. 10 , the light unit 110 may output light pulses having a pulse width corresponding to the first mode to the outside. The sensor 120 may generate an overflow control signal and photo gate signals so as to have a delay time and a window time corresponding to the first mode. The sensor 120 may sense reflected pulses received during the window time. The processor 130 may calculate a coarse depth of an object, based on the sensed result.

In operation S 330 , the processor 130 may adjust the measuring range of the object, based on the depth of the object calculated through the wide range mode. The processor 130 may decide the lower limit, the upper limit, and the width of the measuring range such that the object exists within the measuring range. A narrow range mode (or a second mode) is selected depending on the decided measuring range. In the second mode, the measuring range may have an upper limit lower than in the first mode, a lower limit higher than in the first mode, and a width narrower than in the first mode.

In operation S 340 , the sensing system 100 may sense the object depending on the selected second mode. As an operation mode changes from the first mode to the second mode, a pulse width of light pulses, a delay time, and a window time may be changed. For example, the pulse width of the light pulses may decrease, the delay time may increase, and the window time may decrease. As a result, dust or raindrops being out of the measuring range or another object of a long distance may not be sensed by the sensing system 100 . Also, as the measuring range becomes narrower, the accuracy of the depth of the object may increase.

FIG. 12 is an example flowchart of an operation method of a sensing system of FIG. 1 . An embodiment corresponding to the case of deciding a sensing range of an object in consideration of a field of view will be described with reference to operations of FIG. 12 . For convenience of description, FIG. 12 will be described with reference to signs of FIGS. 1 and 2 .

In operation S 410 , the processor 130 may select an operation mode of the sensing system 100 . In an embodiment, the operation mode may include a first mode and a second mode. The first mode may be an operation mode for sensing an object within a first range. The second mode may be an operation mode for sensing an object within a second range that is more distant from the sensing system 100 than the first range.

In operation S 420 , the light unit 110 may output light pulses to the outside with an angle range corresponding to the selected operation mode. The angle range in the first mode may be greater than an angle range in the second mode. That is, the sensing system 100 may sense an object within a wider field of view when sensing an object of a close distance than when sensing an object of a long distance. For example, in the case where the sensing system 100 is implemented at a vehicle system, the vehicle system may easily cope with an unexpected action of a pedestrian by making a sensing angle in the first mode wide.

In operation S 430 , the sensor 120 may sense pulses reflected with an angle range corresponding to the selected operation mode. The angle range in the first mode may be greater than an angle range in the second mode. Also, as described above, the driving circuit 124 may generate an overflow control signal and photo gate signals so as to have a delay time and a window time corresponding to the selected operation mode.

FIG. 13 is an example timing diagram of a sensing time of FIG. 6 . A difference between the timing diagram of FIG. 13 and the timing diagram of FIG. 7 is described.

Unlike FIG. 7 , the reference times TS 1 , TS 2 , and TS 3 may not have a uniform time interval as illustrated in FIG. 13 . For example, in the case where the sensing system 100 is implemented at a vehicle system, a lot of sensing systems 100 may exist at a particular place. In this case, the light pulse signals LP output from the sensing system 100 may be reflected to another sensing system 100 . In the case where the sensing system 100 measures a depth of an object based on the same reference time, the sensing system 100 may periodically sense the reflection pulse signal RP of a light output from another sensing system 100 and may calculate a wrong depth. To prevent this interference between the sensing systems 100 , the sensing system 100 may randomly adjust time intervals of the reference times TS 1 to TS 3 depending on a given pattern or a signal generated by any random number generator. Even through reference times are randomly adjusted, because the light pulse signals LP generated from the light source 112 are synchronized with the sensor 120 , the light pulse signals LP may have no influence on distance measurement. In contrast, light pulse signals generated from a light source of another system are incident onto the sensor 120 randomly in time, the light pulse signals are sensed as a phase-free noise.

Even though a pattern is not completely random, the sensing system 100 may reduce the interference by another system by using the light pulse signals LP having a long repetition period. For example, in the case where an operation mode is not changed, the delay time TD and the window time TW may be uniformly maintained in each of the reference times TS 1 to TS 3 . The reference times TS 1 to TS 3 may include different masking times TM 1 , TM 2 , and TM 3 , respectively. A pattern of the masking times TM 1 , TM 2 , and TM 3 may be set in advance by the processor 130 or the driving circuit 124 . An output light component of another sensing system to be included in the sensed reflection pulse signal RP may decrease based on the preset pattern of the masking times TM 1 , TM 2 , and TM 3 .

FIG. 14 is an example timing diagram of a sensing time of FIG. 5 or 6 . A difference between the timing diagram of FIG. 14 and the timing diagram of FIG. 7 is described.

Referring to FIG. 14 , the first, second, third, and fourth photo gate signals PG 1 , PG 2 , PG 3 , and PG 4 may have different phases. For example, during the first sensing time, the first, second, third, and fourth photo gate signals PG 1 , PG 2 , PG 3 , and PG 4 may have phases of 0°, 90°, 180°, and 270°. During the second sensing time, the first, second, third, and fourth photo gate signals PG 1 , PG 2 , PG 3 , and PG 4 may have phases of 270°, 0°, 90°, and 180°. That is, the order in which the first to fourth readout circuits RO 1 to RO 4 receive and store charges may be shuffled. This order may be shuffled in units of a frame or in units of an operation of measuring a depth, but at least some example embodiments of the inventive concepts are not limited thereto.

Although not illustrated in FIG. 14 , during the third sensing time, the first, second, third, and fourth photo gate signals PG 1 , PG 2 , PG 3 , and PG 4 may have phases of 180°, 270°, 0°, and 90° or phases of 90°, 180°, 270°, and 0°. A part of the above four orders in which the first to fourth readout circuits RO 1 to RO 4 receive and store charges will be omitted. A fixed pattern noise (FPN) occurring at the pixel array 121 may decrease through this shuffling.

FIG. 15 is an example circuit diagram of a pixel of FIG. 1 . Referring to FIG. 15 , a pixel PXb may include the photoelectric conversion element PD, the first readout circuit RO 1 , the second readout circuit RO 2 , the third readout circuit RO 3 , and the overflow transistor OX. Compared to FIG. 2 , the pixel PXb of FIG. 15 may include the three readout circuits RO 1 to RO 3 . In this case, the overflow transistor OX may be disposed at a location of the fourth readout circuit RO 4 of FIG. 2 .

FIG. 16 is an example circuit diagram of a pixel of FIG. 1 . Referring to FIG. 16 , a pixel PXc may include the photoelectric conversion element PD, the first readout circuit RO 1 , the second readout circuit RO 2 , the third readout circuit RO 3 , the fourth readout circuit RO 4 , and the overflow transistor OX. A circuit structure of the pixel PXc of FIG. 16 is substantially identical to the circuit structure of the pixel PXa of FIG. 2 , and thus, additional description will be omitted to avoid redundancy.

Unlike the fourth readout circuit RO 4 of FIG. 2 , the fourth readout circuit RO 4 of FIG. 16 forms an overflow path during a delay time and a masking time of the sensing time. The fourth photo transistor P 4 may be turned on during the above delay time and masking time, and the fourth photo transistor P 4 is turned off during a window time. During the sensing time, the first transfer transistor TA 4 , the storage transistor S 4 , the second transfer transistor TB 4 , and the reset transistor R 4 of the fourth readout circuit RO 4 are turned on. As a result, charges generated during the delay time and the masking time may be removed by the fourth readout circuit RO 4 .

Unlike the overflow transistor OX of FIG. 2 , the overflow transistor OX may be turned off during the sensing time. That is, charges generated during the sensing time based on an object being out of a measuring range of a depth are removed by the fourth readout circuit RO 4 instead of the overflow transistor OX. The overflow transistor OX may be turned on during a time other than the sensing time, for example, the global reset time and the readout time, and thus, charges generated from an external light may be removed.

FIG. 17 is an example timing diagram of a sensing time of a pixel of FIG. 16 . In FIG. 17 , a horizontal axis represents a time, and a vertical axis represents magnitudes of the first to fourth photo gate signals PG 1 to PG 4 and the overflow control signal OG. A difference between the timing diagram of FIG. 17 and the timing diagram of FIG. 7 is described.

During the window time TW, the first, second, and third photo gate signals PG 1 , PG 2 , and PG 3 may have different phases and may have the high level at different times. The fourth photo gate signal PG 4 may have the high level during the delay time TD and the masking time TM and may have the low level during the window time TW. That is, the fourth photo gate signal PG 4 may have the same waveform as the overflow control signal OG of FIG. 5 during the sensing time. In response to the fourth photo gate signal PG 4 , the pixel PXc may not sense an object being out of a measuring range selected by the processor 130 .

During the sensing time, the overflow control signal OG may have the low level. The overflow control signal OG may have the high level during a time other than the sensing time, for example, the global reset time and the readout time. In response to the overflow control signal OG, the pixel PXc may remove charges generated from the photoelectric conversion element PD during a time other than the sensing time.

FIG. 18 is an example timing diagram of a sensing time of a pixel of FIG. 16 . A difference between the timing diagram of FIG. 18 and the timing diagram of FIG. 17 is described.

Referring to FIG. 18 , during the first sensing time, the first, second, and third photo gate signals PG 1 , PG 2 , and PG 3 may have phases of 0°, 120°, and 240°. The fourth photo gate signal PG 4 may have the high level so as to form an overflow path during the delay time TD and the masking time TM. During the second sensing time, the second, third, and fourth photo gate signals PG 2 , PG 3 , and PG 4 may have phases of 0°, 120°, and 240°. The first photo gate signal PG 1 may have the high level so as to form an overflow path during the delay time TD and the masking time TM. That is, the order in which the first to fourth readout circuits RO 1 to RO 4 receive and store charges may be shuffled. This order may be shuffled in units of a frame or in units of an operation of measuring a depth, but at least some example embodiments of the inventive concepts are not limited thereto. A fixed pattern noise (FPN) occurring at the pixel array 121 may decrease through this shuffling.

FIG. 19 is an example cross-sectional view of a pixel array of FIG. 1 . Referring to FIG. 19 , the pixel array 121 includes the first, second, third, and fourth pixels PX 1 , PX 2 , PX 3 , and PX 4 two-dimensionally arranged in the first direction DR 1 and the second direction DR 2 . A polarizer array 140 may be disposed on the pixel array 121 so as to be stacked in a fifth direction DR 5 .

The polarizer array 140 may include first, second, third, and fourth polarization gratings 141 , 142 , 143 , and 144 respectively disposed on the first, second, third, and fourth pixels PX 1 , PX 2 , PX 3 , and PX 4 . The first to fourth polarization gratings 141 to 144 may have different polarization directions. For example, the first polarization grating 141 may be arranged in parallel with the first direction DR 1 . The second polarization grating 142 may be arranged in a direction that forms 45 degrees with the first direction DR 1 . The third polarization grating 143 may be arranged in parallel with the first direction DR 1 . The fourth polarization grating 144 may be arranged in a direction that forms 135 degrees with the first direction DR 1 . A light “L” (e.g., reflected pulses) incident onto the pixel array 121 may be polarized by the first to fourth polarization gratings 141 to 144 , and polarized lights PL 1 to PL 4 may be incident onto the pixel array 121 . For example, the pixel array 121 may include both a pixel to which a polarization grating is applied and a pixel to which a polarization grating is not applied.

The lights PL 1 to PL 4 passing through the polarizer array 140 may have different intensities. As such, the first to fourth pixels PX 1 to PX 4 may sense the lights PL 1 to PL 4 of first to fourth polarization components, and a ToF value according to the sensing result may be calculated. The intensity of a light according to a polarization component may be associated with a slope of an object when an output light is reflected. The sensing system 100 may exactly calculate a three-dimensional depth image of an object by detecting intensities of lights associated with different polarization components.

For example, the first to fourth polarization gratings 141 to 144 may be formed in a convex-concave structure in which a conductive pattern including a metal material and a dielectric pattern including an insulating material are stacked in order. For example, the first to fourth polarization gratings 141 to 144 may be formed in a convex-concave structure in which a first dielectric pattern and a second dielectric pattern having different refractive indexes are stacked to form a cross section of a wedge shape. For example, the first to fourth polarization gratings 141 to 144 may be formed in a structure an anti-reflection layer is disposed on a semiconductor substrate that is etched to have a cross section of a wedge shape.

FIG. 20 is a block diagram of a sensing system according to at least one example embodiment of the inventive concepts. Referring to FIG. 20 , a sensing system 200 includes a light unit 210 , a depth sensor 220 , a processor 230 , and a radar 250 . The light unit 210 , the depth sensor 220 , and the processor 230 correspond to the light unit 110 , the sensor 120 , and the processor 130 , respectively, and thus, additional description will be omitted to avoid redundancy.

The radar 250 may output an electromagnetic wave and may sense a reflected wave of the electromagnetic wave. The radar 250 may output an electromagnetic wave of a microwave range. Through the radar 250 , the sensing system 200 may recognize a coarse distance of an object. The processor 230 may decide a measuring range of a depth based on the coarse distance of the recognized object. The depth sensor 220 may generate an overflow control signal and photo gate signals for the purpose of sensing an object within the decided measuring range. This procedure is identical to the procedure described above.

FIG. 21 is an example flowchart of an operation method of a sensing system of FIG. 20 . An embodiment corresponding to the case of finely measuring a depth of an object after coarsely measuring the depth of the object will be described with reference to operations of FIG. 21 . For convenience of description, FIG. 21 will be described with reference to signs of FIG. 20 .

In operation S 510 , the sensing system 200 may sense a coarse distance of an object by using the radar 250 . The radar 250 may output an electromagnetic wave and may sense an electromagnetic wave reflected by the object. The sensing system 200 may calculate the coarse distance of the object based on the sensed reflected wave.

In operation S 520 , the processor 230 may adjust a measuring range of the object, based on the depth of the object calculated through the radar 250 . The processor 230 may decide the lower limit, the upper limit, and the width of the measuring range such that the object exists within the measuring range.

In operation S 530 , the sensing system 200 may sense the object depending on the selected mode, that is, depending on the selected measuring range. Depending on the selected measuring range, the depth sensor 220 may generate an overflow control signal and photo gate signals so as to have a delay time and a window time described above.

FIG. 22 is a block diagram of a sensing system according to at least one example embodiment of the inventive concepts. Referring to FIG. 22 , a sensing system 300 includes a light unit 310 , a sensor 320 , a processor 330 , and an optical system 340 . The light unit 310 , the depth sensor 320 , and the processor 330 correspond to the light unit 110 , the sensor 120 , and the processor 130 of FIG. 1 , respectively, and thus, additional description will be omitted to avoid redundancy.

The optical system 340 may include an intensifier 341 and a lens unit 342 . The intensifier 341 may amplify a reflected light received in response to a light output from the light unit 310 . In the case of measuring a depth of an object of a long distance, the intensity of reflected pulses decreases. The amount of photons input to the sensor 320 is inversely proportional to a square of a distance of an object. The intensifier 341 may be configured to amplify the intensity of reflected pulses such that the sensor 320 senses the amplified reflected pulses. The intensifier 341 may be activated during the sensing time under control of the processor 330 .

For example, the intensifier 341 may convert photos into charges by using a photoelectric effect. The intensifier 341 may cause a multiple photoelectric effect by applying and accelerating an electric field to the converted charges. Afterwards, the intensifier 341 may amplify a reflected pulse light by converting the generated charges into photons. The amplified reflected pulse light may arrive at a pixel array 321 of the sensor 320 through the lens unit 342 .

FIG. 23 is an example timing diagram of a pixel of FIG. 22 . In FIG. 23 , a horizontal axis represents a time, and a vertical axis represents magnitudes of the first to fourth photo gate signals PG 1 to PG 4 , the overflow control signal OG, and an intensifier control signal IC. Waveforms of the first to fourth photo gate signals PG 1 to PG 4 and the overflow control signal OG are identical to the waveforms of FIG. 5 , and thus, additional description will be omitted to avoid redundancy.

The intensifier control signal IC may be understood as a signal for deciding the activation or deactivation of the intensifier 341 of FIG. 22 . The intensifier control signal IC may have the high level during the second time T 2 , that is, the sensing time. The intensifier control signal IC may activate the intensifier 341 during the sensing time, thus improving the accuracy of depth measurement of an object. Also, the intensifier control signal IC may deactivate the intensifier 341 during a time other than the sensing time, thus reducing power consumption of the sensing system 300 by the intensifier 341 . However, at least some example embodiments of the inventive concepts are not limited thereto. For example, the intensifier control signal IC may have the high level during the first to fourth times T 1 to T 4 .

FIG. 24 is an example timing diagram of a sensing time of FIG. 23 . In FIG. 24 , a horizontal axis represents a time, and a vertical axis represents magnitudes of the light pulse signal LP, the reflection pulse signal RP, an amplified reflection pulse signal IRP, the first to fourth photo gate signals PG 1 to PG 4 , the overflow control signal OG, and the intensifier control signal IC.

A pulse width of the reflection pulse signal RP reflected from an object of a long distance may be small enough to fail to sense by using the first to fourth photo gate signals PG 1 to PG 4 or to fail to calculate a signal ratio between readout circuits. As such, the intensifier control signal IC may activate the intensifier 341 during the sensing time to amplify the reflection pulse signal RP. As a result, the amplified reflection pulse signal IRP is generated. A pulse width of the amplified reflection pulse signal IRP may be greater than a pulse width of the reflection pulse signal RP. Accordingly, the sensor 320 may sense a light, and a signal ratio between readout circuits may be calculated.

According to at least one example embodiment of the inventive concepts, a sensor operating based on a measuring range of a depth and a sensing system including the sensor may measure a depth of an object existing within a particular range. Also, according to at least one example embodiment of the inventive concepts, the accuracy of measurement of a depth of an object may be improved.

Example embodiments of the inventive concepts having thus been described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the intended spirit and scope of example embodiments of the inventive concepts, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.