Mixer circuit

The invention relates to a radio frequency front-end integrated circuit, in particular to a mixer circuit in a radio frequency front-end receiver.

Since the 21st century, the rapid development of wireless communication technology, people's demand for communication equipment is also increasing. The radio frequency receiver is an important module of wireless communication, and its performance index affects the entire wireless communication system. Among them, the design of the mixer plays an important role in the RF transceiver system. The performance index of the mixer affects the performance index of the entire RF front-end. Therefore, improving the performance of the mixer has important significance. The weak signal present on the RF receiver is first amplified by a low-noise amplifier and then transmitted to the mixer. Therefore, in the design of the mixer, it is necessary to comprehensively consider the conversion gain, noise, linearity, isolation and other performance indicators, and compromise the performance parameters of the mixer. The traditional Gilbert mixer circuit can only provide a certain conversion gain, noise and linearity. Therefore, a high-performance mixer circuit has become a current research hotspot.

In order to solve the above technical problems, the object of the present invention is to provide a high-gain mixer circuit.

The technical scheme adopted by the present invention is as follows: A mixer includes a transconductance stage circuit, a switch stage circuit and a load stage circuit which are electrically connected in sequence. Transconductance stage circuit, which is used to access the radio frequency voltage signal and convert the radio frequency voltage signal into a radio frequency current signal; switch stage circuit, which is used to access the local oscillator signal and the radio frequency current signal, and use the local oscillator signal to control the switching stage transistor Turn on, output intermediate frequency current signal; load level circuit, which is used to convert intermediate frequency current signal into voltage signal for output.

The transconductance stage circuit includes a transistor M 1 , a transistor M 2 , a transistor M 3 , a transistor M 4 , an inductor L 1 , an inductor L 2 , and an inductor L 3 ; the gate of the transistor M 1 is connected to the positive terminal RF+ of the radio frequency voltage signal, and the drain of the transistor M 1 is connected to the transistor M 2 The drain is connected, the source of the transistor M 1 is connected to one end of the inductor L 2 , and the other end of the inductor L 2 is grounded; the gate of the transistor M 2 is connected to the gate of the transistor M 1 , and the source of the transistor M 2 is grounded.

The gate of transistor M 4 is connected to the negative terminal RF− of the RF voltage signal, the drain of transistor M 4 is connected to the drain of transistor M 3 , the source of transistor M 4 is connected to one end of inductor L 3 , and the other end of inductor L 3 is grounded; transistor M 3 Is connected to the gate of the transistor M 4 , and the source of the transistor M 3 is grounded; one end of the inductor L 1 is connected to the drain of the transistor M 1 , and the other end is connected to the drain of the transistor M 4 .

The switching stage circuit includes a transistor M 5 , a transistor M 6 , a transistor M 7 , a transistor M 8 , a gate of the transistor M 5 is connected to the positive terminal LO+ of the local oscillation signal, a source of the transistor M 5 is connected to the drain of the transistor M 1 , and a drain of the transistor M 5 The pole is connected to the load stage circuit; the gate of the transistor M 6 is connected to the negative terminal LO− of the local oscillator signal, the source of the transistor M 6 is connected to the source of the transistor M 5 , and the drain of the transistor M 6 is connected to the drain of the transistor M 8 ; The gate of the transistor M 7 is connected to the negative terminal LO− of the LO signal, the source of the transistor M 7 is connected to the drain of the transistor M 4 , and the drain of the transistor M 7 is connected to the drain of the transistor M 5 ; the transistor M 8 The gate is connected to the negative terminal LO+ of the local oscillation signal, the source of the transistor M 8 is connected to the drain of the transistor M 4 , and the drain of the transistor M 8 is connected to the load stage circuit.

The load stage circuit includes a resistor R 1 , a resistor R 2 , a transistor M 9 and a transistor M 10 ; the gate of the transistor M 9 is connected to the gate of the transistor M 10 , one end of the resistor R 1 is connected to the gate of the transistor M 9 , and the other end is connected to the source of the transistor M 9 , The source of transistor M 9 is connected to the drain of transistor M 5 , the drain of transistor M 9 is connected to the power supply voltage; one end of resistor R 2 is connected to the gate of transistor M 10 , the other end is connected to the source of transistor M 10 , and the source of transistor M 10 It is connected to the drain of the transistor M 8 , and the drain of the transistor M 10 is connected to the power supply voltage. The transistors M 1 , M 2 , M 3 , M 4 , M 5 , M 6 , M 7 , M 8 , M 9 , M 10 are all NMOS transistors.

The beneficial effect of the present invention is that in the mixer circuit of the present invention, the transconductance stage circuit adopts a transistor superposition structure, so that one of the transconductance stage transistors works in the saturation region and the other works in the sub-threshold region. The third-order transconductance coefficients of the transistors can be eliminated from each other, thereby improving the conversion gain and linearity of the circuit; the transconductance stage also uses a source degenerate inductance structure, which further improves the conversion gain and linearity of the circuit. The switch-level circuit is connected to the local oscillator signal, and the transistor is turned on in turn under the control of the large local oscillator signal, and the current is switched and modulated to realize the frequency conversion. The load-level circuit uses an active load, which can improve the conversion gain and linearity of the mixer circuit, and can also prevent the conversion gain from decreasing at high local oscillator power. In the mixer circuit of the present invention, the conversion gain is higher.

FIGURE ILLUSTRATION

FIG. 1 is a circuit schematic diagram of the mixer of the present invention;

FIG. 2 is a simulation diagram of the conversion gain of the mixer of the present invention changing with the power of the local oscillator;

FIG. 3 is a simulation diagram of the conversion gain of the mixer of the present invention changing with the output frequency;

FIG. 4 is a graph of the noise figure simulation result of the mixer of the present invention;

FIG. 5 is a graph of the linearity simulation result of the mixer of the present invention.

The principles and features of the present invention will be described below in conjunction with the drawings. The examples given are only used to explain the present invention, not to limit the scope of the present invention. As shown in FIG. 1 , the mixer circuit includes a transconductance stage circuit, a switch stage circuit, and a load stage circuit that are electrically connected in sequence. The transconductance stage circuit uses a transistor superposition structure and a source degenerate inductance structure for accessing the RF voltage signal, And the radio frequency voltage signal is converted into a radio frequency current signal, and the radio frequency current signal is used repeatedly; the switch-level circuit is used to access the local oscillator signal and the radio frequency current signal, and the local oscillator signal is used to control the switching stage transistor to turn on; the load level The circuit is used to convert the intermediate frequency current signal into a voltage signal for output.

Specifically: the transconductance stage circuit includes a transistor M 1 , a transistor M 2 , a transistor M 3 , a transistor M 4 , an inductor L 1 , an inductor L 2 , and an inductor L 3 ; the gate of the transistor M 1 is connected to the positive terminal RF+ of the RF voltage signal, and the drain of the transistor M 1 The drain of the transistor M 2 is connected, the source of the transistor M 1 is connected to one end of the inductor L 2 , and the other end of the inductor L 2 is grounded; the gate of the transistor M 2 is connected to the gate of the transistor M 1 , and the source of the transistor M 2 is grounded.

The gate of transistor M 4 is connected to the negative terminal RF− of the RF voltage signal, the drain of transistor M 4 is connected to the drain of transistor M 3 , the source of transistor M 4 is connected to one end of inductor L 3 , and the other end of inductor L 3 is grounded; transistor M 3 Is connected to the gate of the transistor M 4 , and the source of the transistor M 3 is grounded; one end of the inductor L 1 is connected to the drain of the transistor M 1 , and the other end is connected to the drain of the transistor M 4 .

As shown in FIG. 1 , the transconductance stage uses a derivative superposition technology structure. By setting different bias voltages to operate the transistors M 1 and M 4 in the saturation region and M 2 and M 3 in the sub-threshold region, the third-order transconductance coefficients can be made mutually Eliminate and improve the conversion gain and linearity of the circuit. The current of MOS tube M 1 is:

The current of MOS tube M 2 can be expressed as:

In the above formula, I 0 represents the characteristic current. The total current of the transconductance stage of the mixer is:

It can be found from the above formula that by setting different DC bias voltages to make the transconductance transistors work in different regions, the third-order transconductance coefficients of the two transistors can be opposite to each other. The third-order transconductance coefficients cancel each other out, and the conversion gain and linearity of the circuit are improved. The transconductance stage uses inductance L 2 , L 3 for input impedance matching, and also makes the linearity of the circuit improved.

Specifically, the switch stage circuit includes a transistor M 5 , a transistor M 6 , a transistor M 7 , and a transistor M 8 , the gate of the transistor M 5 is connected to the positive terminal LO+ of the local oscillation signal, the source of the transistor M 5 is connected to the drain of the transistor M 1 , and the transistor The drain of M 5 is connected to the load stage circuit; the gate of transistor M 6 is connected to the negative terminal LO− of the local oscillator signal, the source of transistor M 6 is connected to the source of transistor M 5 , and the drain of transistor M 6 is connected to the drain of transistor M 8 Connection; the gate of the transistor M 7 is connected to the negative terminal LO− of the local oscillator signal, the source of the transistor M 7 is connected to the drain of the transistor M 4 , the drain of the transistor M 7 is connected to the drain of the transistor M 5 ; the gate of the transistor M 8 The pole is connected to the negative terminal LO+ of the local oscillation signal, the source of the transistor M 8 is connected to the drain of the transistor M 4 , and the drain of the transistor M 8 is connected to the load stage circuit.

The switch stage is connected to the local oscillator signal, and the transistor is turned on in turn under the control of the local oscillator large signal. When LO+ is turned on, transistor M 5 and transistor M 8 are turned on, and transistor M 6 and transistor M 7 are turned off; when LO− is turned on, The transistor M 6 and the transistor M 7 are turned on, and the transistor M 5 and the transistor M 8 are turned off, so as to switch and modulate the current to realize the frequency conversion.

Specifically: the load stage circuit includes a resistor R 1 , a resistor R 2 , a transistor M 9 and a transistor M 10 ; the gate of the transistor M 9 is connected to the gate of the transistor M 10 , one end of the resistor R 1 is connected to the gate of the transistor M 9 , and the other end is connected to the transistor M 9 Source connection, the source of transistor M 9 is connected to the drain of transistor M 5 , the drain of transistor M 9 is connected to the power supply voltage; one end of resistor R 2 is connected to the gate of transistor M 10 , and the other end is connected to the source of transistor M 10 , transistor M 10 Is connected to the drain of the transistor M 8 , and the drain of the transistor M 10 is connected to the power supply voltage. The transistors M 1 , M 2 , M 3 , M 4 , M 5 , M 6 , M 7 , M 8 , M 9 , M 10 are all NMOS transistors.

The load stage of this circuit uses an active load. Due to the parasitic capacitance of the circuit, the size of the transistor cannot be too large, otherwise the power consumption of the circuit will also increase. Therefore, it is necessary to appropriately select the size of the transistor and comprehensively consider the performance parameters of the circuit. Active load can improve the conversion gain and linearity of the mixer circuit, and at high local oscillator power, can also avoid conversion gain reduction.

As shown in FIG. 2 , it is a simulation diagram of the conversion gain of the mixer circuit of the present invention changing with the power of the local oscillator. It can be seen from the figure that the conversion gain of the mixer can reach 23.75 dB.

As shown in FIG. 3 , it is a simulation diagram of the conversion gain of the mixer circuit of the present invention changing with the output frequency. As can be seen from the figure, the conversion gain of the mixer is 23.9 dB.

FIG. 4 is a simulation diagram of the noise figure of the mixer circuit of the present invention. As can be seen from the figure, the noise figure of the mixer is 11.92 dB.

As shown in FIG. 5 , it is a simulation diagram of the linearity of the mixer circuit of the present invention. It can be seen from the figure that the linearity of the mixer is 7.2 dBm.

In summary, the transconductance stage of the mixer circuit of the present invention adopts a transistor superposition structure, so that one of the transconductance stage transistors works in the saturation region and the other works in the sub-threshold region. Conductivity coefficients can be eliminated from each other, thereby improving the conversion gain and linearity of the circuit; the transconductance stage also uses a source degenerate inductance structure, which further improves the conversion gain and linearity of the circuit.

The invention adopts TSMC 0.18 um CMOS process parameters, and the circuit is simulated in Cadence Spectre. The size parameters of the circuit are shown in Table 1.

The performance of the mixer of the present invention is compared with other published mixers, as shown in Table 2.

The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present invention should be included in the protection of the present invention Within range.