Method of locating a fault in a power transmission scheme

This application is a U.S. National Stage Application under 35 U.S.C. § 371 and claims the priority benefit of International Application No. PCT/EP2017/078152 filed Nov. 3, 2017, which claims priority to EP16200211.7, filed Nov. 23, 2016, which are incorporated herein by reference.

This invention relates to a method of locating a fault in a multi-terminal power transmission scheme.

According to an aspect of the invention there is provided a method of locating a fault in a multi-terminal electrical power transmission scheme in which each terminal is connected with a junction via a power transmission section and the or each junction interconnects a plurality of power transmission sections, the method comprising the steps of:

(a) measuring the voltage and current at each terminal; (b) calculating from the measured voltage and current at each terminal corresponding voltage and current phasors; (c) determining from the calculated voltage and current phasors a synchronisation difference between the measured voltage and current at a designated terminal and the measured voltage and current at the or each other terminal; (d) modifying the calculated voltage and current phasors to compensate for the or each synchronisation difference; and (e) determining from the compensated voltage and current phasors the location of the fault.

The voltage and current at each terminal are typically recorded, i.e. measured, by a disturbance recorder in a respective relay, i.e. a respective circuit breaker, which is operatively deployed with each terminal. More particularly the voltage and current values are usually recorded in a COMmon format of TRAnsient Data Exchange (COMTRADE) format which provides for universal readability of the underlying data.

The method of the invention makes use of such readily available data to allow for the off-line determination of a fault location within an electrical power transmission scheme.

Preferably step (a) of measuring the voltage and current at each terminal includes resampling the measured voltage and current from one or more terminals.

The voltage and current data, e.g. the COMTRADE data, from different terminals may have been obtained at different sampling rates, for example if the associated relays are produced by different manufacturers. Resampling the measured voltage and current data from one or more terminals desirably permits all of the data to thereafter have the same equivalent sampling rate, and so facilitates subsequent use of all the data in the method of the invention.

Optionally the power transmission scheme is a multi-phase power transmission scheme, and

step (a) of measuring the voltage and current at each terminal includes measuring the voltage and current of each phase at each terminal, and step (b) of calculating from the measured voltage and current at each terminal corresponding voltage and current phasors includes converting the measured phase voltages and phase currents into respective phase phasors and then transforming the phase phasors into respective positive and negative sequence voltage phasors and positive and negative sequence current phasors.

The method may further include the step of determining from the measured phase currents whether a fault has occurred and if a fault has occurred whether it effects all phases.

In a preferred embodiment of the invention if the fault effects all phases then the positive sequence voltage and current phasors are used in subsequent steps of the invention, otherwise the negative sequence voltage and current phasors are used.

Positive sequence voltage and current phasors are always available, irrespective of the type of fault. Otherwise, so long as the fault does not effect all phases then the negative sequence voltage and current phasors are used in subsequent steps of the invention because they desirably omit load components and so are contaminated to a lesser extent under fault conditions.

Step (c) of determining from the calculated voltage and current phasors a synchronisation difference between the measured voltage and current at a designated terminal and the measured voltage and current at the or each other terminal may include:

calculating, with respect to the designated terminal, an equivalent current flowing at the or each other terminal; equating, in respect of the or each other terminal, a sum of the measured current and the calculated equivalent current to zero according to Kirchhoff's first law; and extracting, in respect of the or each other terminal, a synchronisation difference between the measured voltage and current at the designated terminal and the measured voltage and current at the said respective other terminal from a corresponding equated sum of currents.

The calculation, with respect to the designated terminal, of an equivalent current flowing at the or each other terminal, provides the method of the invention with a desired degree of scalability and so permits its use with a wide range of different power transfer scheme configurations having, e.g. a significantly different number of terminals and/or junctions interconnecting those terminals

Meanwhile, equating, in respect of the or each other terminal, a sum of the measured current and the calculated equivalent current to zero according to Kirchhoff's first law readily and reliably permits the subsequent extraction of a corresponding synchronisation difference.

Preferably calculating, with respect to the designated terminal, an equivalent current flowing at the or each other terminal includes establishing an equivalent admittance matrix for the power transmission scheme.

The utilisation of an equivalent admittance matrix for the power transmission scheme to calculate an equivalent current flowing at the or each other terminal, has the benefit of removing from such a calculation any unknowns, e.g. regarding the status of current flow, in respect of the or each corresponding equivalent current, and so permits in a subsequent step the ready extraction of a corresponding synchronisation difference since the associated equated sum of currents can be manipulated to include only one unknown, i.e. the required synchronisation difference.

In another preferred embodiment of the invention step (e) of determining from the compensated voltage and current phasors the location of the fault includes:

designating a terminal at a first end of the power transmission scheme as a first end terminal and a terminal at a second end of the power transmission scheme as a second end terminal; obtaining a first set of voltage phasors, wherein the first set of voltage phasors includes the compensated voltage phasor at the first end terminal and further includes respective voltage phasors at each of the second end terminal and the or each junction that are determined based on the compensated first end terminal voltage phasor; obtaining a second set of voltage phasors, wherein the second set of voltage phasors includes the compensated voltage phasor at the second end terminal and further includes respective voltage phasors at each of the first end terminal and the or each junction that are determined based on the compensated second end terminal voltage phasor; and comparing the first and second sets of voltage phasors to identify the power transmission section or junction corresponding to the location of the fault, wherein each voltage phasor of the first set of voltage phasors is compared to the respective voltage phasor of the second set of voltage phasors that corresponds to the same end terminal or junction.

These steps not only result in efficient determination of the location of a fault in a power transmission scheme, but also are accurate due to the consideration of the distributed parameters of the power transmission scheme. In addition these steps are readily scalable to accommodate different topologies of power transmission scheme. The latter is particularly advantageous for use in a power transmission scheme with a complex layout, such as a multi-ended power transmission scheme.

These steps therefore permit quick determination of the location of a fault in a power transmission scheme, which reduces the time required to locate and repair the fault and thereby minimises the downtime of the power transmission scheme.

The method may further include the step, if a given power transmission section is identified as the location of the fault, of determining the distance of the fault along the power transmission section using corresponding voltages and currents of an equivalent two-ended system.

Such a step identifies with even more accuracy the location of the fault, and so reduces the time taken to find and deal with the said fault.

There now follows a brief description of preferred embodiments of the invention, by way of non-limiting example, with reference being made to the following figures in which:

FIG. 1 shows a schematic representation of an example multi-terminal power transmission scheme;

FIG. 2 shows a schematic view of an overall structure of a method according to a first embodiment of the invention;

FIG. 3 shows various steps which take place within a second block shown in FIG. 2 ;

FIG. 4( a ) shows various steps which take place within a fourth block shown in FIG. 2 ;

FIG. 4( b ) shows a selection algorithm which forms one of the steps shown in FIG. 4( a ) ; and

FIG. 5( a ) shows an initial admittance representation of the power transmission scheme shown in FIG. 1 ;

FIG. 5( b ) shows an equivalent admittance representation of the power transmission scheme shown in FIG. 1 ;

FIG. 6 shows various steps which take place within a seventh block shown in FIG. 2 ; and

FIG. 7 shows a schematic view of an implementation structure which lies within an eighth block shown in FIG. 2 .

An example multi-terminal electrical power transmission scheme is designated generally by reference numeral 10 and is shown schematically in FIG. 1 .

The power transmission scheme 10 includes first, second, third, fourth, fifth and sixth terminals T 1 , T 2 , T 3 , T 4 , T 5 , T 6 and first, second, third and fourth junctions J 1 , J 2 , J 3 , J 4 . The terminals T 1 , T 2 , T 3 , T 4 , T 5 , T 6 and junctions J 1 , J 2 , J 3 , J 4 are interconnected with one another by respective power transmission sections 12 , e.g. respective power transmission lines or other transmission conduits such as underground cables. The voltage and current at each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 is measured and then recorded in the COMTRADE format.

Other multi-terminal power transmission schemes are also possible and the method of the invention is equally capable of locating a fault in these other power transmission schemes.

Returning to the example power transmission scheme 10 shown, a method according to a first embodiment of the invention locates a fault with the transmission scheme 10 .

The overall structure of the method is illustrated schematically in FIG. 2 and comprises the principle steps of:

(a) measuring the voltage and current at each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 ; (b) calculating from the measured voltage and current at each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 corresponding voltage and current phasors V 1 , I 1 , V 2 , I 2 ; (c) determining from the calculated voltage and current phasors V 1 , I 1 a synchronisation difference Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 between the measured voltage and current, i.e. the recorded COMTRADE data, at a designated terminal T 1 and the measured voltage and current, i.e. the recorded COMTRADE data, at each other terminal T 2 , T 3 , T 4 , T 5 , T 6 ; (d) modifying the calculated voltage and current phasors V 1 , I 1 , V 2 , I 2 to compensate for each synchronisation difference Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 ; and (e) determining from the compensated voltage and current phasors V TSyn , I TSyn the location of the fault.

More particularly, step (a) of measuring the voltage and current at each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 , i.e. reading the COMTRADE data recorded at each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 , additionally includes resampling the measured voltage and current from one or more of the terminals T 1 , T 2 , T 3 , T 4 , T 5 , T 6 .

By way of example, such resampling may include determining the minimum sampling rate of measured voltages and currents from all of the terminals T 1 , T 2 , T 3 , T 4 , T 5 , T 6 and down sampling, as needed, the other measured voltages and currents to the minimum sampling rate.

If the original sampling rate of one or more of the other measured voltages and currents is not an integer multiple of the minimum sampling rate then interpolation is needed. One possible interpolation algorithm (although others may be used) is

x resmp ( k )= x ( n )+Δ n [ x ( n+ 1)− x ( n )]

where,

x(n) is a sample series to be resampled; x resmp is the sample series after resampling; n is floor[kfs/f min ]; Δn is kfs/f min −n; fs is the original sampling rate; and f min is the minimum sampling rate

The example power transmission scheme 10 is a three-phase scheme (although the method of the invention is also applicable to schemes having fewer than or more than three phases), and so the aforementioned measuring and resampling steps are applied at each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 to each phase a, b, c. The aforementioned measuring and resampling steps for each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 take place inside a first block 14 within the overall structure shown in FIG. 2 .

Thereafter, step (b) of calculating from the measured voltage and current at each terminal corresponding voltage and current phasors takes place within a second block 16 , and more particularly includes converting the measured phase voltages V abc and phase currents I abc into respective voltage phase phasors V a , V b , V c and current phase phasors I a , I b , I c , and then transforming the voltage phase phasors V a , V b , V c into respective positive and negative sequence voltage phasors V 1 , V 2 and the current phase phasors I a , I b , I c into respective positive and negative sequence current phasors I 1 , I 2 .

One way of converting the measured phase voltages V abc into respective voltage phase phasors V a , V b , V c , and the measured phase currents I abc into respective current phase phasors I a , I b , I c , is to apply a Fourier transform of the type illustrated schematically in FIG. 3 .

More particularly, by way of example, the algorithm for the COS filter is

X COS ⁡ ( n ) = 2 N ⁢ ∑ k = 1 N ⁢ x ⁡ ( n - N + k ) ⁢ ⁢ cos ⁢ ⁢ ( 2 ⁢ π ⁢ ⁢ k N - π N )

with the real and imaginary parts of each phasor V a , V b , V c , I a , I b , I c being

{ X Re ⁡ ( n ) = X COS ⁡ ( n - 1 ) X Im ⁡ ( n ) = [ X COS ⁡ ( n - 2 ) - X COS ⁡ ( n ) ] · K

where,

K is 1/(2 sin(2π/N)); and N is the number of samples per cycle.

The three voltage phase phasors V a , V b , V c can then be transformed into respective positive and negative sequence voltage phasors V 1 , V 2 according to

and the current phase phasors I a , I b , I c can be transformed into respective positive and negative sequence current phasors I 1 , I 2 according to

In addition to the foregoing, the first embodiment method of the invention also includes the step of determining from the measured phase currents I abc whether a fault has occurred and, if a fault has occurred, whether it effects all phases a, b, c.

Determining whether a fault has occurred, which takes place within a third block 18 shown in FIG. 2 , may be carried out according to any technique well known to a person skilled in the art, such as considering the sum of negative sequence current, zero sequence current and phase current, or by considering delta phase current.

Meanwhile, one way (if a fault is determined to have occurred) of determining whether the fault effects all phases a, b, c is to consider respective delta phase to phase currents Δi ab , Δi bc , Δi ca in the manner illustrated schematically in FIGS. 4( a ) and 4( b ) . Such consideration takes place within a fourth block 20 in FIG. 2 .

More particularly, once respective delta phase to phase currents Δi ab , Δi bc , Δi ca have be calculated according to

{ Δ ⁢ ⁢ i ab ⁡ ( n ) = [ i a ⁡ ( n ) - i b ⁡ ( n ) ] - [ i a ⁡ ( n - N ) - i b ⁡ ( n - N ) ] Δ ⁢ ⁢ i bc ⁡ ( n ) = [ i b ⁡ ( n ) - i c ⁡ ( n ) ] - [ i b ⁡ ( n - N ) - i c ⁡ ( n - N ) ] Δ ⁢ ⁢ i ca ⁡ ( n ) = [ i c ⁡ ( n ) - i a ⁡ ( n ) ] - [ i c ⁡ ( n - N ) - i a ⁡ ( n - N ) ]

where N is the number of samples per cycle,

then Root Mean Squared (RMS) values of delta phase to phase currents ΔI ab , ΔI bc , ΔI ca are calculated, e.g. using a half-cycle Fourier integral as shown below

where N is again the number of samples per cycle.

Other ways of calculating Root Mean Squared (RMS) values of delta phase to phase currents ΔI ab , ΔI bc , ΔI ca are also possible, however, such as a one-cycle Fourier method or by a norm calculation.

Thereafter the or each faulty phase may be determined by applying the selection algorithm illustrated schematically in FIG. 4( b ) , i.e. so as to identify a single phase fault to ground AG, BG, CG; a two-phase fault between two phases or between two phases and ground AB/ABG; BC/BCG, CA/CAG; or a three phase fault ABC.

If the fault effects all phases a, b, c then the first embodiment method of the invention determines that the positive sequence voltage and current phasors V 1 , I 1 are to be used in subsequent steps of the method. Otherwise, i.e. if some other fault of those identified above occurs, the method of the invention determines that the negative sequence voltage and current phasors V 2 , I 2 are to be used subsequently in the method. Such determination of whether to use positive or negative sequence phasors takes place within a fifth block 22 in the FIG. 2 structure and leads to the use in some subsequent steps of the method of the invention of a selected voltage phasor V T and a selected current phasor I T corresponding to each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 .

Meanwhile step (c), i.e. determining from the calculated voltage and current phasors (e.g. the positive sequence voltage and current phasors V 1 , I 1 ) a synchronisation difference Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 between the measured voltage and current at a designated terminal T 1 and the measured voltage and current at each other terminal T 2 , T 3 , T 4 , T 5 , T 6 , takes place within a sixth block 24 shown in FIG. 2 .

The main steps within step (c) are:

calculating, with respect to the designated terminal T 1 , an equivalent current flowing at the or each other terminal T 2 , T 3 , T 4 , T 5 , T 6 ; equating, in respect of the or each other terminal T 2 , T 3 , T 4 , T 5 , T 6 , a sum of the measured current i JR1 , i JR2 , i JR3 , i JR4 , i JR5 and the calculated equivalent current i JR1_L , i JR2_L , i JR3_L , i JR4_L , i JR5_L to zero according to Kirchhoff's first law; and extracting, in respect of the or each other terminal T 2 , T 3 , T 4 , T 5 , T 6 , a synchronisation difference Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 between the measured voltage and current at the designated terminal T 1 and the measured voltage and current at the said respective other terminal T 2 , T 3 , T 4 , T 5 , T 6 from a corresponding equated sum of currents.

For the purpose of describing step (c) in more detail the additional nomenclature shown in FIG. 1 is adopted with respect to the six terminals T 1 , T 2 , T 3 , T 4 , T 5 , T 6 . More particularly, the designated terminal T 1 , i.e. the first terminal T 1 , is referred to as a local terminal L and each of the other second, third, fourth, fifth and sixth terminals T 2 , T 3 , T 4 , T 5 , T 6 is considered respectively as a first, second, third, fourth and fifth remote terminal R 1 , R 2 , R 3 , R 4 , R 5 .

It should be noted that the first terminal T 1 need not necessarily be the designated terminal, i.e. need not necessarily be referred to as the local terminal L, and that in other embodiments of the method of the invention one of the other terminals T 2 , T 3 , T 4 , T 5 , T 6 may instead be the designated terminal (and hence considered, for the purpose of identifying respective synchronisation differences, as the local terminal L).

Calculating, with respect to the designated terminal (T 1 ), an equivalent current flowing at each other terminal T 2 , T 3 , T 4 , T 5 , T 6 , i.e. calculating respective first, second, third, fourth and fifth equivalent currents i JR1_L , i JR2_L , i JR3_L , i JR4_L , i JR5_L at each of the first, second, third, fourth and fifth remote terminals R 1 , R 2 , R 3 , R 4 , R 5 , includes:

establishing an equivalent admittance y eR1 , y eR2 , y eR3 , y eR4 , y eR5 for each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 ; establishing an initial admittance matrix Y 0 with respect to the or each junction, i.e. the first, second, third and fourth junctions J 1 , J 2 , J 3 , J 4 in the particular example embodiment shown; combining the equivalent admittance y eR1 , y eR2 , y eR3 , y eR4 , y eR5 for each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 with the initial admittance matrix Y 0 to establish an equivalent admittance matrix Y Mod ; obtaining a local equivalent current i JL ; and utilising the equivalent admittance matrix Y Mod and the local equivalent current i JL to calculate the corresponding equivalent current i JR1_L , i JR2_L , i JR3_L , i JR4_L , i JR5_L for each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 .

In terms of establishing an equivalent admittance y eR1 , y eR2 , y eR3 , y eR4 , y eR5 for each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 , each of the currents i JR2 , i JR3 , i JR4 , i JR5 measured at the second, third, fourth and fifth remote terminals R 2 , R 3 , R 4 , R 5 can be considered instead as a corresponding equivalent second, third, fourth and fifth admittance y eR2 , y eR3 , y eR4 , y eR5 .

The equivalent admittance y eR1 , y eR2 , y eR3 , y eR4 , y eR5 for each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 may be established by a sample based method or a Fourier based method.

By way of example, the method of the invention utilises a Fourier based method whereby

y eR ⁢ ⁢ 1 = I . JR ⁢ ⁢ 1 V . JR ⁢ ⁢ 1 y eR ⁢ ⁢ 2 = I . JR ⁢ ⁢ 2 V . JR ⁢ ⁢ 2 y eR ⁢ ⁢ 3 = I . JR ⁢ ⁢ 3 V . JR ⁢ ⁢ 3 y eR ⁢ ⁢ 4 = I . JR ⁢ ⁢ 4 V . JR ⁢ ⁢ 4 y eR ⁢ ⁢ 5 = I . JR ⁢ ⁢ 5 V . JR ⁢ ⁢ 5

where,

i JR1 is the Fourier phasor of the measured current i JR1 at the first remote terminal R 1 , i.e. is the positive sequence current phasor I 1 corresponding to the first remote terminal R 1 , which embodies a first synchronisation difference, e.g. a first time difference Tp 1 , between the measured voltage and current at the first remote terminal R 1 and the measured voltage and current at the local terminal L; {dot over (V)} JR1 is the Fourier phasor of the measured voltage v JR1 at the first remote terminal R 1 , i.e. is the positive sequence voltage phasor V 1 corresponding to the first remote terminal R 1 (which can be calculated from the COMTRADE data for the first remote terminal R 1 ), and which again embodies a first synchronisation difference Tp 1 ; i JR2 is the Fourier phasor of the measured current i JR2 at the second remote terminal R 2 , i.e. is the positive sequence current phasor I 1 corresponding to the second remote terminal R 2 , which embodies a second synchronisation difference, e.g. a second time difference Tp 2 , between the measured voltage and current at the second remote terminal R 2 and the measured voltage and current at the local terminal L; {dot over (V)} JR2 is the Fourier phasor of the measured voltage v JR2 at the second remote terminal R 2 , i.e. is the positive sequence voltage phasor V 1 corresponding to the second remote terminal R 2 (which can be similarly calculated from corresponding COMTRADE data), and which again embodies a second synchronisation difference Tp 2 ; i JR3 is the Fourier phasor of the measured current i JR3 at the third remote terminal R 3 , i.e. is the positive sequence current phasor I 1 corresponding to the third remote terminal R 3 , which embodies a third synchronisation difference, e.g. a third time difference Tp 3 , between the measured voltage and current at the third remote terminal R 3 and the measured voltage and current at the local terminal L; {dot over (V)} JR3 is the Fourier phasor of the measured voltage v JR3 at the third remote terminal R 3 , i.e. is the positive sequence voltage phasor V 1 corresponding to the third remote terminal R 3 (which can be similarly calculated from corresponding COMTRADE data), and which again embodies a third synchronisation difference Tp 3 ; i JR4 is the Fourier phasor of the measured current i JR4 at the fourth remote terminal R 4 , i.e. is the positive sequence current phasor I 1 corresponding to the fourth remote terminal R 4 , which embodies a fourth synchronisation difference, e.g. a fourth time difference Tp 4 , between the measured voltage and current at the fourth remote terminal R 4 and the measured voltage and current at the local terminal L; {dot over (V)} JR4 is the Fourier phasor of the measured voltage v JR4 at the fourth remote terminal R 4 , i.e. is the positive sequence voltage phasor V 1 corresponding to the fourth remote terminal R 4 (which can be similarly calculated from corresponding COMTRADE data), and which again embodies a fourth synchronisation difference Tp 4 ; i JR5 is the Fourier phasor of the measured current i JR5 at the fifth remote terminal R 5 , i.e. is the positive sequence current phasor I 1 corresponding to the fifth remote terminal R 5 , which embodies a fifth synchronisation difference, e.g. a fifth time difference Tp 5 , between the measured voltage and current at the fifth remote terminal R 5 and the measured voltage and current at the local terminal L; and {dot over (V)} JR5 is the Fourier phasor of the measured voltage v JR5 at the fifth remote terminal R 5 , i.e. is the positive sequence voltage phasor V 1 corresponding to the fifth remote terminal R 5 (which can be similarly calculated from corresponding COMTRADE data), and which again embodies a fifth synchronisation difference Tp 5 .

Thereafter, an initial admittance matrix Y 0 is established with respect to the first, second, third and fourth junctions J 1 , J 2 , J 3 , J 4 , i.e. with respect only to the power transmission sections 12 between adjacent pairs of junctions J 1 -J 2 , J 2 -J 3 , J 3 -J 4 , in accordance with the initial admittance representation 44 of the power transmission scheme ( 10 ) shown in FIG. 5( a ) , to give:

Following such a step, the initial admittance matrix Y 0 is then combined with the equivalent admittance y eR1 , y eR2 , y eR3 , y eR4 , y eR5 for each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 to establish an equivalent admittance matrix Y Mod in accordance with the equivalent admittance representation 46 of the power transmission scheme ( 10 ) shown in FIG. 5( b ) , i.e.:

Meanwhile the local equivalent current i JL , i.e. a designated equivalent current, is obtained from the measured current i L at the local terminal L (available from corresponding COMTRADE data) by using the measured current i L at the local terminal L to calculate the local equivalent current i JL using a resistor-inductor model of the power transmission section 12 between the local terminal L and the first junction J 1 .

More particularly the power transmission section 12 between the local terminal L and the first junction J 1 is regarded as a resistor-inductor series-connected circuit and, because the section is an overhead transmission line that is less than approximately 50 km, the shunt admittance can be neglected such that the local equivalent current i JL is given by

i JL =i L

A similar resistor-inductor model can be used in other embodiments of the method when applied to a network in which the corresponding section of transmission medium between the local terminal and the first junction J 1 is defined by an underground cable that is less than approximately 3 km.

In other embodiments of the method of invention, when applied to a network in which the power transmission section between the local terminal and the first junction is defined either by an overhead transmission line between approximately 50 km and 150 km in length, or by an underground cable that is between approximately 3 km and 20 km in length, the local equivalent current i JL can be obtained using a linear resistor-inductor-capacitor model of the aforesaid section of transmission medium, i.e. the parameters of resistance, inductance (or reactance) and shunt capacitance (or admittance) are considered to vary linearly along the said section. Such a linear resistor-inductor-capacitor model may also be known as a pi-equivalent circuit.

In such embodiments the local equivalent current i JL can be obtained by a sample based method or by a Fourier phase based method.

In terms of the Fourier phase based method, the local equivalent current i JL is given by

i JL =i L −y L {dot over (V)} L /2

where,

i L is the Fourier phasor of measured current i L at the local terminal L, i.e. is the positive sequence current phasor I 1 corresponding to the local terminal L; {dot over (V)} L is the Fourier phasor of measured voltage v L at the local terminal L, i.e. is the positive sequence voltage phasor V 1 , corresponding to the local terminal L; i JL is the Fourier phasor of the local equivalent current i JL ; and Y L is the shunt admittance of the power transmission section 12 between the local terminal L and the first junction J 1 .

With regards to the last parameter, i.e. the shunt admittance y L , this can be determined by multiplying the admittance per length (which can be obtained from the operator of the said power transmission section 12 ) by the total length of the section.

In still further embodiments of the method of invention, when applied to a network in which the power transmission section 12 between the local terminal and the first junction is defined either by an overhead transmission line over approximately 150 km in length, or by an underground cable that is over approximately 20 km in length, the local equivalent current i JL can be obtained using a distributed parameter model of the aforesaid power transmission section 12 .

In such embodiments the local equivalent current i JL can be obtained by a sample based method or by a Fourier phase based method, with the Fourier phase based method yielding the local node current i JL according to

i JL = cosh (γ D ) i L − sinh (γ D ) {dot over (V)} L /Z C

where,

i L is the Fourier phasor of measured current i L at the local terminal L, i.e. is the positive sequence current phasor I 1 corresponding to the local terminal L; {dot over (V)} L is the Fourier phasor of measured voltage v L at the local terminal L, i.e. is the positive sequence voltage phasor V 1 , corresponding to the local terminal L; γ=√{square root over (zy)} is the propagation coefficient of the power transmission section 12 , with z being the impedance per length and y being the shunt admittance per length of the power transmission section; Z C =√{square root over (z/y)} is the character impedance of the power transmission section, with z again being the impedance per length and y being the shunt admittance per length of the power transmission section; and D is the length of the power transmission section between the local terminal L and the calculation node, i.e. the first junction J 1 .

The equivalent admittance matrix Y Mod and the local equivalent current i JL are then utilised to calculate the corresponding equivalent current i JR1_L , i JR2_L , i JR3_L , i JR4_L , i JR5_L for each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 by, first of all determining an equivalent voltage {dot over (V)} J1_L , {dot over (V)} J2_L , {dot over (V)} J3_L , {dot over (V)} J4_L at each junction J 1 , J 2 , J 3 , J 4 according to:

[ V . J ⁢ ⁢ 1 ⁢ _ ⁢ L V . J ⁢ ⁢ 2 ⁢ _ ⁢ L V . J ⁢ ⁢ 3 ⁢ _ ⁢ L V . J ⁢ ⁢ 4 ⁢ _ ⁢ L ] = Y Mod ⁡ [ I . JL 0 0 0 ] , and

then determining each equivalent current i JR1_L , i JR2_L , i JR3_L , i JR4_L , i JR5_L according to:

İ JR1_L =y eR1 {dot over (V)}J 1 _L

İ JR2_L =y eR2 {dot over (V)} J2_L

İ JR3_L =y eR3 {dot over (V)} J3_L

İ JR4_L =y eR4 {dot over (V)} J4_L

İ JR5_L =y eR5 {dot over (V)} J4_L

where,

i JR1_L is the Fourier phasor of the first equivalent current i JR1_L ; i JR2_L is the Fourier phasor of the second equivalent current i JR2_L ; i JR3_L is the Fourier phasor of the third equivalent current i JR3_L ; i JR4_L is the Fourier phasor of the fourth equivalent current i JR4_L ; i JR5_L is the Fourier phasor of the fifth equivalent current i JR5_L ; and i JL is the Fourier phasor of the local equivalent current i JL .

Thereafter, the step of equating, in respect of each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 a sum of the measured current i JR1 , i JR2 , i JR3 , i JR4 , i JR5 and the calculated equivalent current i JR1_L , i JR2_L , i JR3_L , i JR4_L , i JR5_L to zero according to Kirchhoff's first law, includes:

for the first remote terminal R 1 , equating to zero the sum of the first calculated equivalent current i JR1_L and the first measured current i JR1 ; for the second remote terminal R 2 , equating to zero the sum of the second calculated equivalent current i JR2_L and the second measured current i JR2 ; for the third remote terminal R 3 , equating to zero the sum of the third calculated equivalent current i JR3_L and the third measured current i JR3 ; for the fourth remote terminal R 4 , equating to zero the sum of the fourth calculated equivalent current i JR4_L and the fourth measured current i JR4 ; and for the fifth remote terminal R 5 , equating to zero the sum of the fifth calculated equivalent current i JR5_L and the fifth measured current i JR5 .

In other words, according to Kirchhoff's first law the sum of all currents flowing into the same node, i.e. the corresponding remote terminal R 1 , R 2 , R 3 , R 4 , R 5 , must be zero such that in respect of the first remote terminal R 1

i JR1_L +i JR1 =0

in respect of the second remote terminal R 2

i JR2_L +i JR2 =0

in respect of the third remote terminal R 3

i JR3_L +i JR3 =0

in respect of the fourth remote terminal R 4

i JR4_L +i JR4 =0

and in respect of the fifth remote terminal R 5

i JR5_L +i JR5 =0

Following the above, the step of extracting, in respect of each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 a corresponding synchronisation difference, which in the preferred embodiment described takes the form of a time difference Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 (although in other embodiments it may instead be a phase difference), between the measured voltage and current at the local terminal L and the measured voltage and current at the said respective remote terminal R 1 , R 2 , R 3 , R 4 , R 5 from a corresponding equated sum of currents, i.e. from a corresponding one of the sums set out above, includes considering the phase of the said currents.

Accordingly, adopting a Fourier transform method to rewrite the sums set out above in a phasor form, and utilising respective phasors of the measured currents i JR1 , i JR2 , i JR3 , i JR4 , i JR5 at each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 to incorporate the corresponding synchronisation difference, i.e. corresponding time difference Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 gives, in respect of the first remote terminal R 1

i JR1_L +i JR1 e jω 0 T p1 =0

where,

i JR1_L is the Fourier phasor of the first equivalent current i JR1_L ; i JR1 is the Fourier phasor of the first measured current i JR1 at the first remote terminal R 1 , i.e. is the positive sequence current phasor I 1 corresponding to the first remote terminal R 1 ; and f is frequency of the currents i JR1_L , i JR1 ,

in respect of the second remote terminal R 2

I JR2_L +i JR2 e jω 0 T p2 =0

where,

I JR2_L is the Fourier phasor of the second equivalent current i JR2_L ; I JR2 is the Fourier phasor of the second measured current i JR2 at the second remote terminal R 2 , i.e. is the positive sequence current phasor I 1 corresponding to the second remote terminal R 2 ; and f is frequency of the currents i JR2_L , i JR2 ,

in respect of the third remote terminal R 3

i JR3_L +i JR3 e jω 0 T p3 =0

where,

i JR3_L is the Fourier phasor of the third equivalent current i JR3_L ; i JR3 is the Fourier phasor of the third measured current i JR3 at the third remote terminal R 3 , i.e. is the positive sequence current phasor I 1 corresponding to the third remote terminal R 3 ; and f is frequency of the currents i JR3_L , i JR3 ,

in respect of the fourth remote terminal R 4

i JR4_L +i JR4 e jω 0 T p4 =0

where,

i JR4_L is the Fourier phasor of the fourth equivalent current i JR4_L ; i JR4 is the Fourier phasor of the fourth measured current i JR4 at the fourth remote terminal R 4 , i.e. is the positive sequence current phasor I 1 corresponding to the fourth remote terminal R 4 ; and f is frequency of the currents i JR4_L , i JR4 , and

in respect of the fifth remote terminal R 5

i JR5_L +i JR5 jω 0 T p5 =0

where,

i JR5_L is the Fourier phasor of the fifth equivalent current i JR5_L ; i JR5 is the Fourier phasor of the fifth measured current i JR5 at the fifth remote terminal R 5 , i.e. is the positive sequence current phasor I 1 corresponding to the fifth remote terminal R 5 ; and f is frequency of the currents i JR5_L , i JR5 .

Each of the foregoing sums is then rearranged to give the corresponding time difference Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 , i.e. such that the first time difference Tp 1 is given by

T p ⁢ ⁢ 1 = arg ⁢ ⁢ ( - I . JR ⁢ ⁢ 1 ⁢ _ ⁢ L / I . JR ⁢ ⁢ 1 ) 2 ⁢ π ⁢ ⁢ f

where arg gives the angle of the aforementioned Fourier phasors,

the second time difference Tp 2 is given by

T p ⁢ ⁢ 2 = arg ⁢ ⁢ ( - I . JR ⁢ ⁢ 2 ⁢ _ ⁢ L / I . JR ⁢ ⁢ 2 ) 2 ⁢ π ⁢ ⁢ f

the third initial time difference Tp 3 is given by

T p ⁢ ⁢ 3 = arg ⁢ ⁢ ( - I . JR ⁢ ⁢ 3 ⁢ _ ⁢ L / I . JR ⁢ ⁢ 3 ) 2 ⁢ π ⁢ ⁢ f

the fourth time difference Tp 4 is given by

T p ⁢ ⁢ 4 = arg ⁢ ⁢ ( - I . JR ⁢ ⁢ 4 ⁢ _ ⁢ L / I . JR ⁢ ⁢ 4 ) 2 ⁢ π ⁢ ⁢ f

and such that the fifth time difference Tp 5 is given by

Following the determination of the synchronisation difference, i.e. the time difference Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 between the voltage and current measured at the local terminal L, i.e. the designated first terminal T 1 , and the voltage and current measured at each remote terminal R 1 , R 2 , R 3 , R 4 , R 5 , i.e. each other terminal T 2 , T 3 , T 4 , T 5 , T 6 , the method of the invention carries out principle step (d) of modifying the calculated voltage and current phasors, i.e. modifying the selected voltage and current phasors V T , I T for each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 , to compensate for the synchronisation differences, i.e. the time differences Tp 1 , Tp 2 , Tp 3 , Tp 4 , Tp 5 .

Such compensation takes place within a seventh block 34 shown in FIG. 2 , and may be carried out by applying a compensation factor to the selected voltage and current phasors V T , I T for each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 (i.e. V T(T1) , I T(T1) for the first terminal T 1 ; V T(T2) , I T(T2) for the second terminal T 2 ; V T(T3) , I T(T3) for the third terminal T 3 ; V T(T4) , I T(T4) for the fourth terminal T 4 ; V T(T5) , I T(T5) for the fifth terminal T 5 ; and V T(T6) , I T(T6) for the sixth terminal T 6 ), as illustrated schematically in FIG. 6 , to give rise to corresponding compensated voltage and current phasors V TSyn , I TSyn (i.e. V TSyn(T1) , I TSyn(T1) for the first terminal T 1 ; V TSyn(T2) , I TSyn(T2) for the second terminal T 2 ; V TSyn(T3) , I TSyn(T3) for the third terminal T 3 ; V TSyn(T4) , I TSyn(T4) for the fourth terminal T 4 ; V TSyn(T5) , I TSyn(T5) for the firth terminal T 5 ; and V TSyn(T6) , I TSyn(T6) for the sixth terminal T 6 ).

The compensation factor preferably takes the form

exp( jω 0 T x )

where,

ω 0 is the fundamental angular frequency of the power transmission scheme 10 ; and T x is the corresponding time difference, i.e. Tp 1 for second terminal T 2 (i.e. the first remote terminal R 1 ), Tp 2 for the third terminal T 3 (i.e. the second remote terminal R 2 ), Tp 3 for the fourth terminal T 4 (i.e. the third remote terminal R 3 ), Tp 4 for the fifth terminal T 5 (i.e. the fourth remote terminal R 4 ), and Tp 5 for the sixth terminal T 6 (i.e. the fifth remote terminal R 5 ).

Thereafter the method of the invention carries out, within an eighth block 36 of FIG. 2 , further principle step (e) of determining from the compensated voltage and current phasors V TSyn , I TSyn the location of the fault.

Such a determination includes the main steps of:

designating a terminal, e.g. the first terminal T 1 , at a first end 40 of the power transmission scheme 10 as a first end terminal and a terminal, e.g. the sixth terminal T 6 , at a second end 42 of the power transmission scheme 10 as a second end terminal; obtaining a first set of voltage phasors V JL , wherein the first set of voltage phasors V JL includes the compensated voltage phasor at the first end terminal, i.e. the compensated voltage phasor V TSyn(T1) at the first terminal T 1 , and further includes respective voltage phasors at each of the second end terminal, i.e. the sixth terminal T 6 , and each junction J 1 , J 2 , J 3 , J 4 that are determined based on the compensated first end terminal voltage phasor V TSyn(T1) ; obtaining a second set of voltage phasors V JR , wherein the second set of voltage phasors V JR includes the compensated voltage phasor at the second end terminal, i.e. the compensated voltage phasor V TSyn(T6) at the sixth terminal T 6 , and further includes respective voltage phasors at each of the first end terminal, i.e. the first terminal T 1 , and each junction J 1 , J 2 , J 3 , J 4 that are determined based on the compensated second end terminal voltage phasor V TSyn(T6) ; and comparing the first and second sets of voltage phasors V JL , V JR to identify the power transmission section 12 or junction J 1 , J 2 , J 3 , J 4 corresponding to the location of the fault, wherein each voltage phasor of the first set of voltage phasors V JL is compared to the respective voltage phasor of the second set of voltage phasors V JR that corresponds to the same end terminal T 1 , T 6 or junction J 1 , J 2 , J 3 , J 4 .

A schematic view of a second implementation structure 38 which lies within the eighth block 36 and determines the location of the fault, including identifying the power transmission section 12 (or junction J 1 , J 2 , J 3 , J 4 ) corresponding to the location of the fault and (in the embodiment method described) the distance of the fault along the given power transmission section 12 , is illustrated schematically in FIG. 7 .

More particularly, determining the location of the fault includes feeding the compensated voltage and current phasors V TSyn , I TSyn for each terminal T 1 , T 2 , T 3 , T 4 , T 5 , T 6 (i.e. V TSyn(T1) , I TSyn(T1) for the first terminal T 1 ; V TSyn(T2) , I TSyn(T2) for the second terminal T 2 ; V TSyn(T3) , I TSyn(T3) for the third terminal T 3 ; V TSyn(T4) , I TSyn(T4) for the fourth terminal T 4 ; V TSyn(T5) , I TSyn(T5) for the firth terminal T 5 ; and V TSyn(T6) , I TSyn(T6) for the sixth terminal T 6 ) into a Block A within the second implementation structure 38 to calculate, i.e. to obtain: first and second sets of voltage phasors V JL , V JR ; first and second sets of current phasors I JL , I JR ; and further voltage phasors V JT .

Moving from the first terminal T 1 to the sixth terminal T 6 (i.e. left to right in FIG. 1 ), the first sets of voltage and current phasors V JL , I JL are determined as follows.

In the first set of voltage phasors V JL , for the purposes of the description below, the voltage phasor at the first terminal T 1 (which for the purposes of simplification can temporarily be considered a zero junction J 0 ) is identified as V J0L , the voltage phasor at junction J 1 is identified as V J1L , the voltage phasor at junction J 2 is identified as V J2L , the voltage phasor at junction J 3 is identified as V J3L , the voltage phasor at junction J 4 is identified as V J4L , and the voltage phasor at the sixth terminal T 6 (which for the purposes of simplification can temporarily be considered a fifth junction J 5 ) is identified as V J5L .

The first set of current phasors I JL includes the following current phasors (which are identified as indicated for the purposes of the description below): a current phasor in the power transmission section between the first terminal T 1 and the first junction J 1 which is identified as I J0_J1L , a current phasor in the power transmission section between junctions J 1 and J 2 which is identified as I J1_J2L , a current phasor in the power transmission section between junctions J 2 and J 3 which is identified as I J2_J3L , a current phasor in the power transmission section between junctions J 3 and J 4 which is identified as I J3_J4L , and a current phasor in the power transmission section between junctions J 4 and J 5 which is identified as I J4_J5L .

The voltage phasor V J0L at the first terminal T 1 is, as indicated above the compensated voltage phasor V Tsyn(T1) for the first terminal T 1 , and similarly the current phasor I J0_J1L in the power transmission section between the first terminal T 1 and the first junction J 1 is the compensated current phasor I Tsyn(T1) for the first terminal T 1 , i.e.

V J0L =T Syn(T1) I J0_J1L =I TSyn(T1)

Each of the other voltage phasors V J1L ,V J2L ,V J3L ,V J4L ,V J5L at the respective junctions J 1 , J 2 , J 3 , J 4 and the second end terminal, i.e. the sixth terminal T 6 (which for purposes of simplification can, as indicated above, temporarily be considered a fifth junction J 5 ) is calculated based on the voltage phasor of the preceding junction and the current phasor of the preceding power transmission section. Each of the other current phasors I J1_J2L , I J2_J3L , I J3_J4L , I J4_J5L in the respective power transmission sections are based on the voltage phasor of the preceding junction, the current phasor of the preceding power transmission section, and the current phasor in a further power transmission section connected to the preceding junction.

Accordingly, the foregoing are given by:

V JkL = A Jk - 1 ⁢ Jk ⁢ V Jk - 1 ⁢ L + B Jk - 1 ⁢ Jk ⁢ I Jk - 1 ⁢ _ ⁢ JkL ; I Jk ⁢ _ ⁢ Jk + 1 ⁢ L = C Jk - 1 ⁢ Jk ⁢ V Jk - 1 ⁢ L + D Jk - 1 ⁢ _ ⁢ JkL + ∑ n ∈ J k ⁢ I Jk ⁢ _ ⁢ Tn ;

where k ranges from 1 to 5;

A Jk−1Jk =D Jk_1Jk =cosh ( y Jk−1Jk l Jk−1Jk );

B Jk−1Jk =−Z CJk−1Jk sinh (γ Jk_1Jk l Jk−1Jk );

C Jk−1Jk =−sinh (γ Jk−1Jk l Jk−1Jk )/ Z CJk−1Jk ;

γ Jk−1Jk =√{square root over ( z Jk−1Jk y Jk−1Jk )};

Z CJk−1Jk =√{square root over ( z Jk−1Jk /y Jk−1Jk )};

Z Jk−1Jk is the impedance per length of the power transmission section interconnecting the k−1th junction to the kth junction; y Jk−1Jk is the admittance per length of the power transmission section interconnecting the k−1th junction to the kth junction; l Jk−1Jk is the line length of the power transmission section interconnecting the k−1th junction to kth the junction; I Jk_Tn is the nth-terminal-to-kth-junction current flowing in the further power transmission medium connected to the kth junction.

Moving from the sixth terminal T 6 , to the first terminal T 1 (i.e. right to left in FIG. 1 ), the second sets of voltage and current phasors V JR , I JR are determined as follows.

In the second set of voltage phasors V JR , for the purposes of the description below, the voltage phasor at the first terminal T 1 (which for the purposes of simplification can, as indicated above, temporarily be considered a zero junction J 0 ) is identified as V J0R , the voltage phasor at junction J 1 is identified as V J1R , the voltage phasor at junction J 2 is identified as V J2R , the voltage phasor at junction J 3 is identified as V J3R , the voltage phasor at junction J 4 is identified as V J4R , and the voltage phasor at the sixth terminal T 6 (which, for the purposes of simplification can, as indicted above, temporarily be considered a fifth junction J 5 ) is identified as V J5R .

The second set of current phasors I JR includes the following current phasors (which are identified as indicated for the purposes of the description below): a current phasor in the power transmission section between the sixth terminal T 6 and the fourth junction J 4 which is identified as I J5_J4R , a current phasor in the power transmission section between junctions J 4 and J 3 which is identified as I J4_J3R , a current phasor in the power transmission section between junctions J 3 and J 2 which is identified as I J3_J2R , a current phasor in the power transmission section between junctions J 2 and J 1 which is identified as I J2_J1R , and a current phasor in the power transmission section between junction J 1 and the first terminal T 1 which is identified as I J1_J0R .

The voltage phasor V J5R at the sixth terminal T 6 is, as indicated above, the compensated voltage phasor V TSyn(T6) for the sixth terminal T 6 , and similarly the current phasor I J4_J5L in the power transmission section between junction J 4 and the sixth terminal T 6 is the compensated current phasor I TSyn(T6) for the sixth terminal T 6 , i.e.

V J5R =V TSyn(T6) I J5_J4R =I TSyn(T6)

Each of the other voltage phasors V J0R , V J1R ,V J2R ,V J3R ,V J4R at the respective junctions J 1 , J 2 , J 3 , J 4 and the first end terminal, i.e. the first terminal T 1 (which for purposes of simplification can, as indicated above, temporarily be considered a zero junction J 0 ) is calculated based on the voltage phasor of the preceding junction and the current phasor of the preceding power transmission section. Each of the other current phasors I J1_J0R ,I J2_J1R ,I J3_J2R ,I J4_J3R in the respective power transmission sections are based on the voltage phasor of the preceding junction, the current phasor of the preceding power transmission section, and the current phasor in a further power transmission section connected to the preceding junction.

Accordingly the foregoing are given by:

V JkR = A Jk + 1 ⁢ Jk ⁢ V Jk + 1 ⁢ R + B Jk + 1 ⁢ Jk ⁢ I Jk + 1 ⁢ _ ⁢ JkR ; I Jk ⁢ _ ⁢ Jk - 1 ⁢ L = C Jk + 1 ⁢ Jk ⁢ V Jk + 1 ⁢ R + D Jk + 1 ⁢ _ ⁢ JkR + ∑ n ∈ J k ⁢ I Jk ⁢ _ ⁢ Tn ;

where k ranges from 0 to 4;

A Jk+1Jk =D Jk+1Jk =cos h ( y Jk+1Jk l Jk+1Jk );

B Jk+Jk =−Z CJk+Jk sin h ( y Jk+1Jk l Jk+1Jk );

C Jk+1Jk =−sin h (γ Jk+1Jk l Jk+1Jk )/ Z CJk+1Jk ;

γ Jk+1Jk =√{square root over ( z Jk+1Jk y Jk+1Jk )};

Z Jk+1Jk =√{square root over ( z Jk+1Jk y Jk+1Jk )};

Z Jk+1Jk is the impedance per length of the power transmission section interconnecting the k+1th junction to kth junction; y Jk+1Jk is the admittance per length of the power transmission section interconnecting the k+1th junction to the kth junction; l Jk+1Jk is the line length of the power transmission section interconnecting the k+1th junction to the kth junction; I Jk_Tn is the nth-terminal-to-kth-junction current flowing in the further power transmission medium connected to the kth junction.

The further voltage phasors V JT , include the following further voltage phasors (which are identified as indicated for the purposes of the description below): a further voltage phasor at junction J 1 which is identified as V J1_T2 , a further voltage phasor at junction J 2 which is identified as V J2_T3 , a further voltage phasor at junction J 3 which is identified as V J3_T4 , and a further voltage phasor at junction J 4 which is identified as V J4_T5 .

Further current phasors in respective further power transmissions sections are also calculated. These further current phasors I JT include the following current phasors (which are identified as indicated for the purposes of the description below): a further current phasor in the further power transmission section between junction J 1 and terminal T 2 which is identified as I J1_T2 , a further current phasor in the further power transmission section between junction J 2 and terminal T 3 which is identified as I J2_T3 , a further current phasor in the further power transmission section between junction J 3 and terminal T 4 which is identified as I J3_T4 , and a further current phasor in the further power transmission section between junction J 4 and terminal T 5 which is identified as I J4_T5 .

The further voltage and current phasors for junction J 1 with respect to terminal T 2 are calculated by the following equations:

{ V J ⁢ ⁢ 1 ⁢ _ ⁢ T ⁢ ⁢ 2 = A 2 ⁢ V TSyn ⁡ ( T ⁢ ⁢ 2 ) + B 2 ⁢ I TSyn ⁡ ( T ⁢ ⁢ 2 ) I J ⁢ ⁢ 1 ⁢ _ ⁢ T ⁢ ⁢ 2 = C 2 ⁢ V Tsyn ⁡ ( T ⁢ ⁢ 2 ) + D 2 ⁢ I TSyn ⁡ ( T ⁢ ⁢ 2 )

where,

A 2 =D 2 =cos h (γ 2 l T2 );

B 2 =−Z C2 sin h (γ 2 l T2 );

C 2 =−sin h (γ 2 l T2 )/ Z C2 ;

γ 2 =√{square root over ( z 2 y 2 )};

Z C2 =√{square root over ( z 2 /y 2 )};

z 2 is the impedance per length of the further power transmission section interconnecting junction J 1 to terminal T 2 ; y 2 is the admittance per length of the further power transmission section interconnecting junction J 1 to terminal T 2 ; l T2 is the line length of the further power transmission section interconnecting junction J 1 to terminal T 2 .

The further voltage and current phasors for junction J 2 with respect to terminal T 3 are calculated by the following equations:

{ V J ⁢ ⁢ 2 ⁢ _ ⁢ T ⁢ ⁢ 3 = A 3 ⁢ V TSyn ⁡ ( T ⁢ ⁢ 3 ) + B 3 ⁢ I TSyn ⁡ ( T ⁢ ⁢ 3 ) I J ⁢ ⁢ 2 ⁢ _ ⁢ T ⁢ ⁢ 3 = C 3 ⁢ V Tsyn ⁡ ( T ⁢ ⁢ 3 ) + D 3 ⁢ I TSyn ⁡ ( T ⁢ ⁢ 3 )

where,

A 3 =D 3 =cos h (γ 3 l T3 );

B 3 =−Z C3 sin h (γ 3 l T3 );

C 3 =−sin h (γ 3 l T3 )/ Z C3 ;

γ 3 =√{square root over ( z 3 y 3 )};

Z C3 =√{square root over ( z 3 /y 3 )};

Z 3 is the impedance per length of the further power transmission section interconnecting junction J 2 to terminal T 3 ; y 3 is the admittance per length of the further power transmission section interconnecting junction J 2 to terminal T 3 ;

l T3 is the line length of the further power transmission section interconnecting junction J 2 to terminal T 3 .

The further voltage and current phasors for junction J 3 with respect to terminal T 4 are calculated by the following equations:

{ V J ⁢ ⁢ 3 ⁢ _ ⁢ T ⁢ ⁢ 4 = A 4 ⁢ V TSyn ⁡ ( T ⁢ ⁢ 4 ) + B 4 ⁢ I TSyn ⁡ ( T ⁢ ⁢ 4 ) I J ⁢ ⁢ 3 ⁢ _ ⁢ T ⁢ ⁢ 4 = C 4 ⁢ V Tsyn ⁡ ( T ⁢ ⁢ 4 ) + D 4 ⁢ I TSyn ⁡ ( T ⁢ ⁢ 4 )

where,

A 4 =D 4 =cos h (γ 4 l T4 );

B 4 =−Z C4 sin h (γ 4 l T4 );

C 4 =−sin h (γ 4 l T4 )/ Z C4 ;

γ 4 =√{square root over ( z 4 y 4 )};

Z C4 =√{square root over ( z 4 /y 4 )};

z 4 is the impedance per length of the further power transmission section interconnecting junction J 3 to terminal T 4 ; y 4 is the admittance per length of the further power transmission section interconnecting junction J 3 to terminal T 4 ; l T4 is the line length of the further power transmission section interconnecting junction J 3 to terminal T 4 .

The further voltage and current phasors for junction J 4 with respect to terminal T 5 are calculated by the following equations:

{ V J ⁢ ⁢ 4 ⁢ _ ⁢ T ⁢ ⁢ 5 = A 5 ⁢ V TSyn ⁡ ( T ⁢ ⁢ 5 ) + B 5 ⁢ I TSyn ⁡ ( T ⁢ ⁢ 5 ) I J ⁢ ⁢ 4 ⁢ _ ⁢ T ⁢ ⁢ 5 = C 5 ⁢ V Tsyn ⁡ ( T ⁢ ⁢ 5 ) + D 5 ⁢ I TSyn ⁡ ( T ⁢ ⁢ 5 )

where,

A 5 =D 5 =cos h (γ 5 l T5 );

B 5 =−Z C5 sin h (γ 5 l T5 );

C 5 =−sin h (γ 5 l T5 )/ Z C5 ;

γ 5 =√{square root over ( z 5 y 5 )};

Z C5 =√{square root over ( z 5 /y 5 )};

z 5 is the impedance per length of the further power transmission section interconnecting junction J 4 to terminal T 5 ; y 5 is the admittance of the further power transmission section interconnecting junction J 4 to terminal T 5 ; l T5 is the line length of the further power transmission section interconnecting junction J 4 to terminal T 5 ).

The first and second sets of voltage phasors V JL ,V VR and the further voltage phasors V JT are then fed into a Block B within the second implementation structure 38 to compare the voltage phasors to identify the power transmission section or junction corresponding to the location of the fault, as follows.

A subtraction voltage phasor for each junction is obtained. In this regard the subtraction voltage phasor of each junction is equal to the difference between the corresponding voltage phasors of the first and second sets of voltage phasors V JL ,V JR , as shown in the following equation.

Then the minimum amplitude value (modular) ΔVmin of the plurality of subtraction voltage phasors ΔVj is determined using the equation: ΔVmin=min{|ΔV Jk |, k=0,1,2,3,4,5}.

The minimum amplitude value ΔVmin is subsequently compared with a predefined voltage threshold Vthres 1 to determine whether ΔVmin is less than Vthres 1 . Vthres 1 is exemplarily set at 0.02 times of the rated voltage of the power transmission scheme 10 so that, for example, if the rated voltage is 110 V, then Vthres 1 is 2.2 V.

If the minimum amplitude value ΔVmin is less than the predefined voltage threshold Vthres 1 , it indicates that the fault is either on the junction corresponding to the minimum amplitude value ΔVmin or in the further power transmission section connected to this junction. For example, if |ΔV J3 |=ΔVmin, it indicates that the fault is either on the junction J 3 or in the further power transmission section interconnecting the junction J 3 and the terminal T 4 .

Subsequently the location of the fault is more accurately determined by using the discriminative criterion of |V JkL −V Jk_Tn |>Vthres 2 , where ΔVmin=V JkL . Therefore, for example, if |ΔV J3 |=ΔVmin, the discriminative criterion is |V J3L −V J3_T4 |>Vthres 2 . Vthres 1 is exemplarily set at 0.05 times of the rated voltage of the power transmission scheme so that, for example, if the rated voltage is 110 V, then Vthres 1 is 5.5 V.

If |V JkL −V Jk_Tn |>Vthres 2 , then the fault is located in the further power transmission section interconnecting the kth junction and the nth terminal. If |V JkL −V Jk_Tn |<=Vthres 2 , then the fault is located on the kth junction. If there are multiple terminals connected to the junction in question, the discriminative criterion is applied to each terminal in turn.

If the minimum amplitude value ΔVmin is more than the predefined voltage threshold Vthres 1 , it indicates that the fault is in the power transmission section interconnecting the kth junction and the k+1th junction. For example, if |ΔV J3 |=ΔVmin, it indicates that the fault is in the power transmission sections interconnecting the junctions J 0 ,J 1 ,J 2 ,J 3 ,J 4 ,J 5 .

Subsequently the location of the fault is more accurately determined by comparing the voltage phasor of a given junction with the voltage phasor of a neighbouring junction to identify the power transmission section corresponding to the location of the fault. Different criterion may be applied to determine the power transmission section in which the fault is located.

In a first exemplary criterion, the power transmission section in which the fault is located is determined by comparing the phases of the subtraction voltage phasor ΔV Jk of a given junction and the subtraction voltage phasor ΔV Jk+1 of a neighbouring junction to check whether the comparison meets the following criterion:

If the criterion is met, then the fault is located in the power transmission section interconnecting junctions J k and J k+1 .

In a second exemplary criterion, the power transmission section in which the fault is located is determined by comparing the amplitudes of the subtraction voltage phasor ΔV Jk of a given junction and the subtraction voltage phasor ΔV Jk+1 of a neighbouring junction to check whether an amplitude comparison meets the following criterion:

imag ( Δ ⁢ ⁢ V Jk ⁢ conj ⁡ ( Δ ⁢ ⁢ V Jk + 1 )  Δ ⁢ ⁢ V Jk  ⁢  Δ ⁢ ⁢ V Jk + 1  < ɛ 1

where ε 1 is the threshold with per-unit value. For example, ε 1 =−0.01.

If the criterion is met, then the fault is located in the power transmission section interconnecting junctions J k and J k+1 .

In a third exemplary criterion, the power transmission section in which the fault is located is determined by comparing the subtraction voltage phasor ΔV Jk of a given junction and the subtraction voltage phasor ΔV Jk+1 of a neighbouring junction to check whether the comparison meets the following criterion.

|Δ V jk +ΔV Jk+1 |<|ΔV Jk −ΔV Jk+1 |

If the criterion is met, then the fault is located in the power transmission section interconnecting junctions J k and J k+1 .

If a given power transmission section is identified as the location of the fault, a Block C within the second implementation structure then selects the appropriate voltage and current phasors from the first and second sets of voltage and current phasors V JL , V JR , I JL and I JR and forms a two-ended system equivalent of the power transmission section identified as the location of the fault with voltages and currents V M , V N , I M , I N .

If the relevant power transmission section is connected between junctions J k and J k+1 , the voltage and current phasors V JkL , I Jk_k+1L , V Jk+1R , I Jk+1,kR are selected to form the two-ended system equivalent such that: V M =V JkL ; I M =I Jk_k+1L ; V N =V Jk+1R ; and I N =I Jk+1_kR . That is, junction J k is the equivalent end M of the two-ended system equivalent, and junction J k+1 is the equivalent N of the two-ended system equivalent.

If the relevant power transmission section is a further power transmission section interconnecting a junction J k and a terminal Tn, Block C then selects the voltage and current phasors at the terminal Tn, the voltage phasor V JkL ,V JkR at the junction to which the terminal Tn is connected, and the negative summation of the corresponding current phasors of the first and second sets of current phasors −(I Jk, k+1L +I Jk,k−1R ), such that: V M =V Tn ; I M =I Tn ; V N =V JkL ; I N =−(I Jk, k+1L +I Jk_k−1R ). That is, terminal Tn is the equivalent end M of the two-ended system equivalent, and junction J k is the equivalent end N of the two-ended system equivalent.

Based on the two-ended system equivalent the distance of the fault along the power transmission section is determined on the basis of the voltage and currents V M ,V N ,I M ,I N of the two-ended system equivalent. In the second implementation structure 38 , Block C feeds the voltage and currents V M ,V N ,I M ,I N of the two-ended system equivalent to a Block D, which determines the fault distance using the following equation:

V M cos h (γ x )− Z C I M sin h (γ x )= V N cos h (γ( l−x ))− Z C I N sin h (γ( l−x ))

where

x is the distance to the end M of the two-system equivalent;

γ=√{square root over ( zy )};

Z C =√{square root over ( z/y )};

z is the impedance per length of corresponding section, which is settable by customer; y is the admittance per length of corresponding section, which is settable by customer; l is the line length of corresponding section.

The above equation can be simplified as:

V M −zxI M =V N −z ( l−x ) I N