Reliability determination method

The disclosure relates generally to a semiconductor device, and more specifically it relates to a reliability determination method for determining the reliability of a semiconductor device.

The method of global fitting is mostly configured to predict the reliability. In order to reduce the testing cost, the number of samples that are executed the reliability test is usually limited. For example, the number of samples is several hundred for predicting the 1 ppm lifetime of a semiconductor device. Therefore, the method of global fitting with limited number of samples seems to be too conservative to predict the reliability under a target quality level such that it takes a lot of manufacturing cost to improve the reliability. If the number of samples that are executed the reliability test is increased, the cost of testing the reliability should be significantly increased. Therefore, we need a more efficient reliability determination method.

In an embodiment, a reliability determination method for testing a batch of a semiconductor device is provided. The reliability determination method comprises: obtaining a Weibull distribution of a lifetime of the batch of the semiconductor device; dividing the Weibull distribution into a first section and a second section, wherein the first section and the second section meets a first confidence level; generating a first trend line of the first section and a second trend line of the second section according to the first confidence level, wherein the first trend line has a first slope and the second trend line has a second slope; determining that the first slope of the first section exceeds the second slope of the second section; and determining a predicted reliability of the batch of the semiconductor device under a target quality level according to the first section.

According to an embodiment of the invention, the step of determining the predicted reliability of the batch of the semiconductor device under the target quality level according to the first section further comprises: extrapolating the target quality level from the first section to obtain the predicted reliability.

According to an embodiment of the invention, the step of obtaining the Weibull distribution of the lifetime of the batch of the semiconductor device comprises: obtaining a breakdown voltage; applying a stress voltage to an insulating layer of the batch of the semiconductor and measuring a stress current of the insulating layer, wherein the stress voltage is less than the breakdown voltage and exceeds a normal voltage; applying the normal voltage to the insulating layer of the batch of the semiconductor device and measuring a normal current of the insulating layer; comparing the stress current with the normal current to determine a lifetime distribution of the semiconductor device; and obtaining the Weibull distribution according to the lifetime distribution.

According to an embodiment of the invention, the insulating layer is an insulating layer of a front-end-of-line, a middle-end-of-line, and/or a back-end-of-line.

According to an embodiment of the invention, the reliability determination method further comprises: expanding, according to the first confidence level, a first sampled number of the first section to a predetermined number as a first expanded section; and expanding, according to the first confidence level, a second sampled number of the second section to the predetermined number as a second expanded section, wherein the predetermined number relates to the target quality level.

According to an embodiment of the invention, the reliability determination method further comprises: combining the first expanded section with the second expanded section to generate an expanded Weibull distribution; dividing the expanded Weibull distribution into at least a first simulated section and a second simulated section, wherein the first simulated section and the second simulated section meet a second confidence interval, wherein the first simulated section has a first simulated trend line and the second simulated section has a second simulated trend line, wherein the first simulated trend line has a first simulated slope and the second simulated trend line has a second simulated slop; determining that the first simulated slope of the first simulated section exceeds the second simulated slope of the second simulated section; and determining the predicted reliability of the batch of the semiconductor device under the target quality level according to the first simulated section.

In an embodiment, a storage device accessible to a machine and storing an instruction program is provided. The machine executes the instruction program to perform a reliability determination method. The reliability determination method is configured to test a batch of a semiconductor device, which comprises: obtaining a Weibull distribution of a lifetime of the batch of the semiconductor device; dividing the Weibull distribution into a first section and a second section, wherein the first section and the second section meets a first confidence level; generating a first trend line of the first section and a second trend line of the second section according to the first confidence level, wherein the first trend line has a first slope and the second trend line has a second slope; determining that the first slope of the first section exceeds the second slope of the second section; and determining a predicted reliability of the batch of the semiconductor device under a target quality level according to the first section.

According to an embodiment of the invention, the step of determining the predicted reliability of the batch of the semiconductor device under the target quality level according to the first section in the reliability determination method further comprises: extrapolating the target quality level from the first section to obtain the predicted reliability.

According to an embodiment of the invention, the step of obtaining the Weibull distribution of the lifetime of the batch of the semiconductor device of the reliability determination method comprises: obtaining a breakdown voltage; applying a stress voltage to an insulating layer of the batch of the semiconductor and measuring a stress current of the insulating layer, wherein the stress voltage is less than the breakdown voltage and exceeds a normal voltage; applying the normal voltage to the insulating layer of the batch of the semiconductor device and measuring a normal current of the insulating layer; comparing the stress current with the normal current to determine a lifetime distribution of the semiconductor device; and obtaining the Weibull distribution according to the lifetime distribution.

According to an embodiment of the invention, the insulating layer is an insulating layer of a front-end-of-line, a middle-end-of-line, and/or a back-end-of-line.

According to an embodiment of the invention, the reliability determination method further comprises: expanding, according to the first confidence level, a first sampled number of the first section to a predetermined number as a first expanded section; and expanding, according to the first confidence level, a second sampled number of the second section to the predetermined number as a second expanded section, wherein the predetermined number relates to the target quality level.

According to an embodiment of the invention, the reliability determination method further comprises: combining the first expanded section with the second expanded section to generate an expanded Weibull distribution; dividing the expanded Weibull distribution into at least a first simulated section and a second simulated section, wherein the first simulated section and the second simulated section meet a second confidence interval, wherein the first simulated section has a first simulated trend line and the second simulated section has a second simulated trend line, wherein the first simulated trend line has a first simulated slope and the second simulated trend line has a second simulated slop; determining that the first simulated slope of the first simulated section exceeds the second simulated slope of the second simulated section; and determining the predicted reliability of the batch of the semiconductor device under the target quality level according to the first simulated section.

A detailed description is given in the following embodiments with reference to the accompanying drawings.

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

FIG. 1 is a curve diagram of an accelerated life test in accordance with an embodiment of the invention;

FIG. 2 is a flow chart of a reliability determination method in accordance with another embodiment of the invention;

FIGS. 3A-3D are curve diagrams of an accelerated life test in accordance with another embodiment of the invention;

FIG. 4 is a flow chart of a method for obtaining the measured data in accordance with an embodiment of the invention;

FIG. 5 is a flow chart of a reliability determination method in in accordance with another embodiment of the invention; and

FIG. 6 is a curve diagram of an accelerated life test in accordance with another embodiment of the invention.

This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. The scope of the invention is best determined by reference to the appended claims.

It is understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the application. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Moreover, the formation of a feature on, connected to, and/or coupled to another feature in the present disclosure that follows may include embodiments in which the features are formed in direct contact, and may also include embodiments in which additional features may be formed interposing the features, such that the features may not be in direct contact.

FIG. 1 is a curve diagram of an accelerated life test in accordance with an embodiment of the invention. As shown in FIG. 1 , the X-axis of the curve diagram 100 indicates the life (the unit is year), and the Y-axis indicates the cumulative fail rate (the unit is “%”). According to an embodiment of the invention, a predetermined batch of semiconductor device are sampled, and the lifetime of the semiconductor device is calculated by using an accelerated testing method, such as shortening the testing time for testing the lifetime of the semiconductor by rising the temperature and/or the voltage, and equations with the predetermined batch of semiconductor device. When the lifetimes of the predetermined batch of semiconductor device are obtained, and the measured data 110 is painted out. According to an embodiment of the invention, the measured data 110 is a Weibull distribution.

According to an embodiment of the invention, when the lifetime of the semiconductor is predicted by the measured data 110 with the predetermined batch, a method of global fitting is utilized to find out a trend line 120 of the measured data 110 . It is determined that a probability of the lifetime of the semiconductor device being not less than a predetermined year YR is a first probability P 1 according to the trend line 120 with extrapolation.

According to an embodiment of the invention, the trend line 120 meets a first confidence level and is in the confidence interval between an upper bond 121 and a lower bond 122 . According to an embodiment of the invention, the tester may determine the first confidence level himself.

Since the number of the predetermined batch is less, the lifetime of the semiconductor device predicted by the trend line 120 could be conservative. Therefore, the reliability determination method should be improved.

FIG. 2 is a flow chart of a reliability determination method in accordance with another embodiment of the invention. First, a Weibull distribution of the lifetime of the semiconductor is obtained (Step S 210 ), and the Weibull distribution is divided into several sections (Step S 220 ).

FIGS. 3A-3D are curve diagrams of an accelerated life test in accordance with another embodiment of the invention. As shown in FIG. 3A , the measured data 310 corresponds to the measured data 110 in FIG. 1 , which indicates the Weibull distribution of the lifetime of the predetermined batch of the semiconductor device. As shown in FIG. 3A , the measured data 310 is divided into a first section 311 , a second section 312 , a third section 313 , and a fourth section 314 as FIG. 3B .

According to an embodiment of the invention, the measured data 310 is divided into, according to the first confidence level, the first section 311 , the second section 312 , the third section 313 , and the fourth section 314 . According to an embodiment of the invention, the first confidence level exceeds 90%. According to other embodiments of the invention, the first confidence level may be determined by the tester, which is not intended to be limited thereto. According to other embodiments of the invention, the measured data 310 may be divided into several sections according to the first confidence level. Only four sections are illustrated herein, but not intended to be limited thereto.

Back to the Step S 220 in FIG. 2 , when the measured data 310 is divided into the first section 311 , the second section 312 , the third section 313 , and the fourth section 314 in FIG. 3B , the number of each of the first section 311 , the second section 312 , the third section 313 , and the fourth section 314 is expanded to a predetermined number (Step S 230 ).

Namely, the first section 311 , the second section 312 , the third section 313 , and the fourth section 314 in FIG. 3B are expanded to be a first expanded section 321 , a second expanded section 322 , a third expanded section 323 , and a fourth expanded section 324 in FIG. 3C .

For example, when the target quality level is 1 ppm, the total sampled number of the first section 311 , the second section 312 , the third section 313 , and the fourth section 314 are at least expanded to the level of 1 hundred thousand which is close to the order of magnitude that 1 ppm is required. For example, it is assumed that the ratios of the sampled numbers of the first section 311 , the second section 312 , the third section 313 , and the fourth section 314 to the total sampled number are 10%, 40%, 35%, and 15% respectively. Therefore, the sampled numbers of the first section 311 , the second section 312 , the third section 313 , and the fourth section 314 are 10 thousand, 40 thousand, 35 thousand, and 15 thousand. The description above is merely illustrated but not intended to be limited thereto.

Back to Step S 230 , the first expanded section 321 , the second expanded section 322 , the third expanded section 323 , and the fourth expanded section 324 in FIG. 3C are combined to be the expanded Weibull distribution 330 as shown in FIG. 3D (Step S 240 ). In addition, the expanded Weibull distribution 330 is further divided into a plurality of simulated sections according to a second confidence level (Step S 250 ).

According to an embodiment of the invention, the second confidence level is identical to the first confidence level. According to another embodiment of the invention, the second confidence level is different from the first confidence level. For example, the first confidence level is 90%, and the second confidence level is 99%, in order to obtain a more precise trend line.

As shown in FIG. 3D , the expanded Weibull distribution 330 is divided into a first simulated section 33 land a second simulated section 332 , in which two simulated sections are illustrated herein but not intended to be limited thereto. In addition, a first simulated trend line 341 is generated from the first simulated section 331 according to the second confidence level, and the second simulated trend line 342 is generated from the second simulated section 332 according to the second confidence level.

Back to Step S 250 , the reliability of the semiconductor device is predicted according to the simulated section having the greatest slope (Step S 260 ). According to an embodiment of the invention, the reliability indicates that the lifetime of the semiconductor device under the target quality level. As shown in FIG. 3D , the first simulated trend line 341 has a first slope m 1 , and the second simulated trend line 342 has a second slope m 2 , in which the second slope m 2 exceeds the first slope m 1 . Therefore, the lifetime of the semiconductor device is predicted according to the second simulated trend line 342 .

According to an embodiment of the invention, for example, as shown in FIG. 3D , when the target quality level is 1 ppm (i.e., 0.0001%), the lifetime of the semiconductor device is a first year Y 1 , which indicates that the probability of the lifetime of the semiconductor device not exceeding the first year Y 1 is 1 ppm. According to an embodiment of the invention, when the lifetime of the semiconductor device is predicted according to the second simulated trend line 342 , the lifetime under the target quality level is estimated by extrapolating the target quality level from the second simulated trend line 342 .

When the method of global fitting in FIG. 1 is utilized to predict the lifetime of the semiconductor device, it is more reasonable that the trend line 120 should correspond to the first simulated trend line 341 in FIG. 3D , such that the lifetime prediction is too conservative. When the sampled number of the measured data 310 is expanded, the tail of the expanded Weibull distribution 330 (i.e., the second simulated section 332 ) is more significant. Therefore, the lifetime of the semiconductor device under the target quality level can be more precisely predicted by using the second simulated section 332 that has worse lifetime.

According to an embodiment of the invention, the measured data 310 relates to the lifetime of a withstand voltage of the insulating layer in a semiconductor. According to an embodiment of the invention, the insulating layer in a semiconductor device is an insulating layer of front-end-of-line (FEOL). According to another embodiment of the invention, the insulating layer in a semiconductor device is an insulating layer of middle-end-of-line (MEOL). According to another embodiment of the invention, the insulating layer in a semiconductor device is an insulating layer of back-end-of-line (BEOL).

FIG. 4 is a flow chart of a method for obtaining the measured data in accordance with an embodiment of the invention. First, the breakdown voltage of the semiconductor device is obtained (Step S 410 ), and a stress voltage is applied to the insulating layer of the semiconductor device (Step S 420 ). The stress voltage is less than the breakdown voltage, and also exceeds a normal voltage that is applied to the insulating layer of the semiconductor device during a normal operation.

Then, the stress current flowing through the insulating layer of the semiconductor device is measured (Step S 430 ). The normal voltage, which is applied to the insulating layer of the semiconductor device during the normal operation, is applied to the insulating layer of the semiconductor device, and the normal current flowing through the insulating layer of the semiconductor device is measured (Step S 440 ).

According to an embodiment of the invention, the normal voltage is the voltage applied to the insulating layer when the semiconductor device operates in a normal operation. When the semiconductor device is executed the accelerated life test, the stress voltage, which exceeds the normal voltage, is applied to the insulating layer in a special environment (i.e., high temperature and/or high pressure), in order to estimate the lifetime of the semiconductor device.

The stress current is compared with the normal current to determine the lifetime distribution of the semiconductor device (Step S 450 ). According to an embodiment of the invention, when the stress current exceeds the normal current by a threshold, it indicates that the semiconductor device has a leakage current after the accelerated lifetime test. Therefore, the semiconductor device is determined to be damaged. According to another embodiment of the invention, when the stress current does not exceed the normal current by the threshold, it indicates that the semiconductor device still operates in stable after the accelerated lifetime test. Therefore, the semiconductor device is determined to be normal.

According to the lifetime distribution obtained in Step S 450 , the measured data 110 in FIG. 1 or the measured data 310 in FIG. 3 is depicted (Step S 460 ), in which the measured data 110 and the measured data 310 are Weibull distribution.

According to other embodiments of the invention, the measured data 310 may relate to the lifetime of other parameters of the semiconductor device and the lifetime of any other electrical parameters of the semiconductor device. The lifetime of the insulating layer of the semiconductor device stated above is merely illustrated, but not intended to be limited thereto.

FIG. 5 is a flow chart of a reliability determination method in in accordance with another embodiment of the invention. As shown in FIG. 5 , the Weibull distribution of the lifetime of the semiconductor device is obtained (Step S 510 ). The Weibull distribution is divided into a plurality of sections according to the first confidence level (Step S 520 ).

FIG. 6 is a curve diagram of an accelerated life test in accordance with another embodiment of the invention. According to an embodiment of the invention, the measured data 610 corresponds to the measured data 310 . As shown in FIG. 6 , Step S 510 is configured to obtain the measured data 610 . The measured data 610 is divided into a first section 611 , a second section 612 , a third section 613 , and a fourth section 614 according to the first confidence level in Step S 520 .

In Step S 530 , a first trend line 621 , a second trend line 622 , a third trend line 623 , and a fourth trend line 624 , which correspond to the first section 611 , the second section 612 , the third section 613 , and the fourth section 614 respectively, are generated according to the first confidence level. As shown in FIG. 6 , the first trend line 621 has a first slope m 1 , the second trend line 622 has a second slope m 2 , the third trend line 623 has a third slope m 3 , and the fourth trend line 624 has a fourth slope m 4 .

Then, it is determined that whether the first slope m 1 , the second slope m 2 , the third slope m 3 , or the fourth slope m 4 is the largest (Step S 540 ). The predicted reliability of the semiconductor device is determined by the one having the largest slope among of the first trend line 621 , the second trend line 622 , the third trend line 623 , and the fourth trend line 624 (Step S 550 ). According to an embodiment of the invention, since the fourth slope m 4 of the fourth trend line 624 is the largest, the fourth trend line 624 is utilized to predict the lifetime of the semiconductor device under the target quality level, and the lifetime is equivalent to the predicted reliability of the semiconductor device.

According to an embodiment of the invention, it is assumed that the target quality level is 0.0001% (i.e., 1 ppm). The lifetime of the semiconductor device under the target quality level is the second year Y 2 according to the fourth trend line 624 .

The invention provides a reliability determination method such that the reliability of the semiconductor device is much closer to the real situation of the product, the determination of the reliability of the product is much simpler, and the manufacturing cost is therefore reduced.

While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. Those who are skilled in this technology can still make various alterations and modifications without departing from the scope and spirit of this invention. Therefore, the scope of the present invention shall be defined and protected by the following claims and their equivalents.