Pixel structure and display panel thereof

This non-provisional application claims priority to and the benefit of, pursuant to 35 U.S.C. § 119(a), patent application Ser. No. 106137797 filed in Taiwan on Nov. 1, 2017. The disclosure of the above application is incorporated herein in its entirety by reference.

Some references, which may include patents, patent applications and various publications, are cited and discussed in the description of this disclosure. The citation and/or discussion of such references is provided merely to clarify the description of the present disclosure and is not an admission that any such reference is “prior art” to the disclosure described herein. All references cited and discussed in this specification are incorporated herein by reference in their entireties and to the same extent as if each reference were individually incorporated by reference.

The present disclosure relates to a pixel structure and a display panel thereof, and in particular, to a pixel structure that can improve the display quality and a display panel thereof.

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

With the advancement of science and technology, people have higher requirements on display panels. Light and thin sizes, high picture quality, and power saving have currently become a development trend of display panels. Generally, liquid crystal molecules of a display panel are easily affected with by crosstalk of a data electrode, and consequently the display quality is affected, causing problems such as bright lines and dark lines. Therefore, improving the crosstalk problem and increasing the aperture ratio and transmittance of the display are one of the topics that the industry has been working on.

The present disclosure relates to a pixel structure and a display panel thereof, so as to improve the display quality of a display device.

According to a first aspect of the present disclosure, a pixel structure is provided, including a substrate, a scan line, a first common electrode, and a first data line. The substrate has at least a first sub pixel. The first sub pixel includes a first pixel electrode and a first active element electrically connected to the first pixel electrode. The scan line is disposed on the substrate. The first common electrode is disposed on a side of the first pixel electrode. The first common electrode includes a first segment, a second segment, and a first connection segment. The first connection segment connects the first segment to the second segment. The first segment and the second segment both extend in a first direction. The first segment and the second segment are alternately arranged in a second direction. The first direction intersects with the second direction. The first data line is disposed on the side of the first pixel electrode. The first data line includes a first section, a second section, and a second connection segment. The second connection segment connects the first section to the second section. The first section and the second section extend in the first direction. The first section and the second section are alternately arranged in the second direction. The first connection segment mutually intersects with the second connection segment. The first pixel electrode partially overlaps with the first common electrode and the first data line in a perpendicular projection direction.

According to a second aspect of the present disclosure, a display panel is provided, including a pixel structure, a second substrate, and a display medium layer. The pixel structure includes a first substrate, a scan line, a first common electrode, and a first data line. The first substrate has at least a first sub pixel. The first sub pixel includes a first pixel electrode and a first active element electrically connected to the first pixel electrode. The scan line is disposed on the first substrate. The first common electrode is disposed on a side of the first pixel electrode. The first common electrode includes a first segment, a second segment, and a first connection segment. The first connection segment connects the first segment to the second segment. The first segment and the second segment both extend in a first direction. The first segment and the second segment are alternately arranged in a second direction. The first direction intersects with the second direction. The first data line is disposed on the side of the first pixel electrode. The first data line includes a first section, a second section, and a second connection segment. The second connection segment connects the first section to the second section. The first section and the second section extend in the first direction. The first section and the second section are alternately arranged in the second direction. The first connection segment mutually intersects with the second connection segment. The first pixel electrode partially overlaps with the first common electrode and the first data line in a perpendicular projection direction. The second substrate is located opposite to the first substrate. The display medium layer is located between the first substrate and the second substrate.

These and other aspects of the present disclosure will become apparent from the following description of the preferred embodiment taken in conjunction with the following drawings, although variations and modifications therein may be effected without departing from the spirit and scope of the novel concepts of the disclosure.

The accompanying drawings illustrate one or more embodiments of the disclosure and together with the written description, serve to explain the principles of the disclosure. Wherever possible, the same reference numbers are used throughout the drawings to refer to the same or like elements of an embodiment, and wherein:

FIG. 1 is a schematic diagram of a partial pixel structure of a display panel according to an embodiment;

FIG. 2 is a schematic diagram of a scan line and a common electrode of a single sub pixel according to an embodiment;

FIG. 3 is a schematic diagram of a data line, a source electrode, and a drain electrode of a single sub pixel according to an embodiment;

FIG. 4 is a schematic diagram of a pixel structure of a single sub pixel according to an embodiment;

FIG. 5 is a sectional view of the pixel structure in FIG. 1 along a sectional line A-A;

FIG. 6 is a sectional view of the pixel structure in FIG. 1 along a sectional line B-B′;

FIG. 7 is a schematic diagram of a pixel structure of a single sub pixel according to another embodiment;

FIG. 8 is a schematic diagram of a pixel structure of a single sub pixel according to another embodiment;

FIG. 9 is a schematic diagram of a pixel structure of a single sub pixel according to another embodiment;

FIG. 10 is a schematic diagram of a partial pixel structure of a display panel according to another embodiment; and

FIG. 11 is a schematic diagram of a pixel structure of a single sub pixel according to a compared embodiment.

In embodiments, a data line and a common electrode on a same side of a pixel electrode are of a zigzag pattern in which the data line and the common electrode intersect with each other. The pixel electrode overlaps with a part of the data line and a part of the common electrode, so as to improve the display effect of a display device.

Descriptions are provided below with some embodiments. It should be noted that the present disclosure does not provide all possible embodiments, and possibly, other implementation aspects not provided in the present disclosure may also be used. Further, the dimension scale in figures is not drawn at a scale equal to that of an actual product. Therefore, this specification and content in the figures are merely intended to describe the embodiments rather than limit the protection scope of the present disclosure. In addition, descriptions in the embodiments, such as a detailed structure, a process step, and a material application, are merely used as examples rather than limitations on the protection scope of the present disclosure. Details of steps and structures in the embodiments may be modified or polished according to a requirement of an actual application process without departing from the spirit and scope of the present disclosure. Descriptions are provided below by using examples in which same/similar symbols represent same/similar elements.

It should be understood that although terms such as “first” and “second” in this specification may be used for describing various elements, components, domains, layers, and/or parts, the elements, components, domains, and/or parts should not be limited by the terms. The terms are merely used for distinguishing one element, component, domain, layer, or part from another element, component, domain, layer, or part. Therefore, a “first element”, a “first component”, a “first domain”, a “first layer”, or a “first part” discussed below may be referred to as a second element, component, domain, layer, or part without departing from teachings of this specification.

The terms used herein are merely intended to describe a particular embodiment and are not limitative. As used in this specification, unless clearly indicated in the content, “one” and “one piece” in a singular form and “the” aim to include a plural form and include “at least one”. “Or” indicates “and/or”. As used in this specification, the term “and/or” includes any or all combinations of one or more related listed items. It should be further understood that when being used in this specification, terms “include” and/or “comprise” specify/specifies existence of the feature, domain, entirety, step, operation, element, and/or component, but do/does not exclude existence or addition of one or more other features, domains, entireties, steps, operations, elements, components, and/or combinations thereof.

In addition, relative terms such as “below” or “bottom” and “above” or “top” in this specification may be used for describing a relationship between one element and another element, as shown in the figures. It should be understood that the relative terms aim to include different orientations of an apparatus in addition to an orientation shown in the figure. For example, if an apparatus in an accompanying drawing turns over, an element described to be below another element is oriented to be above the another element. Therefore, the exemplary term “below” may include orientations of “below” and “above”. This depends on a particular orientation in the accompanying drawings. Similarly, if an apparatus in an accompanying drawing turns over, an element described to be “below” or “under” another element is oriented to be above the another element. Therefore, the exemplary term “below” or “under” may include orientations of “above” and “below”.

In the accompanying drawings, for clearness, the thicknesses of a layer, a film, a panel, a domain, and the like are enlarged. In the entire specification, a same reference numeral indicates a same element. It should be understood that when an element such as a layer, a film, a domain, or a substrate is referred to as being “on” another element or being “connected” to another element, the element may be directly on the another element or connected to the another element, or an intermediate element may exist. On the contrary, when an element is referred to as being “directly on another element” or “directly connected to” another element, no intermediate element exists. As used in this specification, “connect” may be physically and/or electrically connected. However, “electrically connect” means that another element exists between two elements.

“Approximately” or “substantially” used in this specification includes an average value of the value and a particular value determined by a person of ordinary skill in the art in an acceptable deviation range, and a discussed measurement and a particular quantity of errors related to the measurement (that is, a limitation of a measurement system) are considered. For example, “approximately” may indicate to be in one or more standard deviations of the value, or in ±30%, ±20%, ±10%, or ±5%. Further, for “approximately” or “substantially” used in this specification, a relatively acceptable deviation range or standard deviation may be selected according to the optical property, the etching property, or another property, and one standard deviation may not be used for all properties.

Unless otherwise defined, all terms (including technical and scientific terms used in this specification have the same meaning as that understood by a person of ordinary skill in the art. It should be further understood that terms defined in a usually used dictionary should be explained to have a consistent meaning with that in the related art and the context of this specification, and not be explained to have an ideal or excessively formal meaning, unless clearly defined in this specification.

FIG. 1 to FIG. 6 show an embodiment of the present disclosure. FIG. 1 is a schematic top view of a partial pixel structure of a display panel according to an embodiment. FIG. 2 is a top view of a scan line and a common electrode of a single sub pixel according to an embodiment. FIG. 3 is a top view of a data line, a source electrode, and a drain electrode of a single sub pixel according to an embodiment. FIG. 4 is a schematic diagram of a pixel structure of a single sub pixel according to an embodiment. FIG. 5 is a sectional view of the pixel structure in FIG. 1 along a line AA′. FIG. 6 is a sectional view of the pixel structure in FIG. 1 along a line BB′.

Referring to FIG. 1 , a pixel structure P includes a plurality of sub pixels, for example, four sub pixels 102 A, 102 B, 102 C, and 102 D, but is not limited thereto. The plurality of sub pixels 102 A, 102 B, 102 C, and 102 D may be separately arranged in a first direction D 1 and a second direction D 2 . The first direction D 1 intersects with the second direction D 2 . For example, the first direction D 1 is a direction Y, and the second direction D 2 is a direction X substantially perpendicular to the direction Y. However, the present disclosure is not limited thereto. The sub pixels 102 A, 102 B, 102 C, and 102 D respectively include active elements 108 A, 108 B, 108 C, and 108 D and pixel electrodes 110 A, 110 B, 110 C, and 110 D, and include color resistors (for brevity, only a color resistor 112 A of the sub pixel 102 A and a color resistor 112 B of the sub pixel 102 B are shown in FIG. 5 and FIG. 6 , and color resistors of other sub pixels may be obtained by analogy.) The pixel electrodes 110 A, 110 B, 110 C, and 110 D each have opposite sides 124 A and 124 B (for example, for positions of the opposite sides 124 A and 124 B, refer to a position of the pixel electrode 110 A of the sub pixel 102 A in FIG. 1 ). The sides 124 A and 124 B may be separately substantially parallel to the first direction D 1 , and the active element (for example, the active element 108 A of the sub pixel 102 A) is located in the second direction D 2 . This is merely an example, and the present disclosure is not limited thereto. In another embodiment, the sides 124 A and 124 B may be separately substantially parallel to the second direction D 2 , and the active element (for example, the active element 108 A of the sub pixel 102 A) is located in the first direction D 1 . The active elements 108 A, 108 B, 108 C, and 108 D separately include a source electrode 114 , a drain electrode 116 , a semiconductor layer 117 , and a gate electrode G. The gate electrode G of each of the active elements 108 A, 108 B, 108 C, and 108 D is electrically connected to a corresponding scan line 106 . The semiconductor layer 117 of each of the active elements 108 A, 108 B, 108 C, and 108 D is located between the source electrode 114 and the gate electrode G and between the drain electrode 116 and the gate electrode G. The drain electrode 116 of each of the active elements 108 A, 108 B, 108 C, and 108 D may be electrically connected to the corresponding pixel electrode 110 A, 110 B, 110 C, or 110 D. For example, the drain electrode 116 of each of the active elements 108 A, 108 B, 108 C, and 108 D may be electrically connected to the corresponding pixel electrode 110 A, 110 B, 110 C, or 110 D by using a contact hole 118 . The contact hole 118 runs through a gate electrode insulation layer (not shown). The active elements 108 A, 108 B, 108 C, and 108 D in this embodiment are described by using an example in which the semiconductor layer 117 is located above the gate electrode G (for example, a bottom-gate thin-film transistor (bottom-gate TFT)). However, the present disclosure is not limited thereto. In another embodiment, the active elements 108 A, 108 B, 108 C, and 108 D may alternatively be a top-gate thin-film transistor (top-gate TFT), for example, the semiconductor layer 117 is located below the gate electrode G, or may be a thin-film transistor of another suitable type. The material of the semiconductor layer 117 includes polycrystalline silicon, microcrystalline silicon, amorphous silicon, monocrystalline silicon, a carbon nanotube, an organic semiconductor material, an oxide semiconductor, or another suitable material. In this embodiment, a black matrix (BM) may be selectively configured or not configured for the pixel structure P to cover the scan line 106 and the active element 108 .

In the pixel structure shown in FIG. 1 , the sub pixels 102 A, 102 B, 102 C, and 102 D have approximately the same element configuration. For example, a first common electrode 120 A, a second common electrode 120 B, and other common electrode such as common electrodes 120 C, 120 D, 120 E, and 120 F are disposed on a side of the pixel electrodes 110 A, 110 B, 110 C, and 110 D of the sub pixels 102 A, 102 B, 102 C, and 102 D respectively in the same pattern. A first data line 104 A, a second data line 104 B, and other data lines such as a data line 104 C are disposed on a side of the pixel electrodes 110 A, 110 B, 110 C, and 110 D of the sub pixels 102 A, 102 B, 102 C, and 102 D respectively in the same pattern. In an embodiment, the source electrodes 114 of the sub pixels 102 A and 102 C that are arranged in the same direction (for example, the first direction D 1 ) extend from a same side of a same data line (also referred to as non-interlace configuration). For example, the source electrodes 114 of the sub pixel 102 A and the sub pixel 102 C both extend from a right side of the first data line 104 A, and the source electrodes 114 of the sub pixel 102 B and the sub pixel 102 D both extend from a right side of the second data line 104 B.

FIG. 2 is a schematic diagram of a scan line and a common electrode of a single sub pixel according to an embodiment. FIG. 3 is a schematic diagram of a data line, a source electrode, and a drain electrode of a single sub pixel according to an embodiment. FIG. 4 is a schematic diagram of a pixel structure of a single sub pixel according to an embodiment. Referring to FIG. 2 and FIG. 4 first, for example, the scan line 106 and a common electrode 122 are preferably formed by a first metal layer (M 1 ). However, the present disclosure is not limited thereto. In an embodiment, the common electrode 122 of the sub pixel 102 A may include the first common electrode 120 A. The first common electrode 120 A includes a first segment 126 A, a second segment 126 B, and a first connection segment 128 A connected between the first segment 126 A and the second segment 126 B.

The first segment 126 A of the first common electrode 120 A includes a first side 136 A- 1 and a second side 136 A- 2 that are opposite to each other. The second segment 126 B of the first common electrode 120 A includes a first side 136 B- 1 and a second side 136 B- 2 that are opposite to each other. The first segment 126 A and the second segment 126 B of the first common electrode 120 A may substantially extend in the first direction D 1 , and may deflect (or namely, bend) by using the first connection segment 128 A to be alternately arranged (or namely, staggeredly arranged) in the second direction D 2 . Therefore, the segment setting of the first common electrode 120 A may mean that the first common electrode 120 A has a zigzag pattern. The first segment 126 A is farther away from the pixel electrode 110 A compared with the second segment 126 B, and the second segment 126 B is closer to the pixel electrode 110 A compared with the first segment 126 A. For example, there is an offset distance k ( FIG. 2 ) between the second side 136 A- 2 of the first segment 126 A and the second side 136 B- 2 of the second segment 126 B in the second direction D 2 , and there may also be an substantially equal offset distance k between the first side 136 A- 1 of the first segment 126 A and the first side 136 B- 1 of the second segment 126 B.

Refer to FIG. 3 and FIG. 4 . In an embodiment, for example, the first data line 104 A, the source electrode 114 , and the drain source 116 may be formed by a second metal layer (M 2 ), and may be separate from the first metal layer M 1 by using an insulation layer (for example, the insulation layer 140 in FIG. 4 or FIG. 5 ). The first data line 104 A includes a first section 130 A, a second section 130 B, and a second connection segment 132 A connected between the first section 130 A and the second section 130 B. The first section 130 A has a first side 130 A- 1 and a second side 130 A- 2 , and the second section 130 B has a first side 130 B- 1 and a second side 130 B- 2 . The first section 130 A and the second section 130 B of the first data line 104 A may substantially extend in the first direction D 1 , and may deflect (or namely, bend) by using the second connection segment 132 A to be alternately arranged (or namely, staggeredly arranged) in the second direction D 2 . Therefore, the segment setting of the first data line 104 A may mean that the first data line 104 A has a zigzag pattern. The first section 130 A is closer to the pixel electrode 110 A compared with the second section 130 B, and the second section 130 B is farther away from the pixel electrode 110 A compared with the first section 130 A.

Referring to FIG. 2 and FIG. 4 again, preferably, the common electrode 122 of the sub pixel 102 A may further include a second common electrode 120 B. In some embodiments, preferably, the common electrode 122 may further include a common electrode connection segment C and the common electrode connection segment C may connect the first common electrode 120 A to the second common electrode 120 B. However, the present disclosure is not limited thereto. The second common electrode 120 B includes a third segment 126 C, a fourth segment 126 D, and a third connection segment 128 B connected between the third segment 126 C and the fourth segment 126 D. Similarly, the third segment 126 C of the second common electrode 120 B includes a third side 136 C- 1 and a fourth side 136 C- 2 that are opposite to each other. The fourth segment 126 D of the second common electrode 120 B includes a third side 136 D- 1 and a fourth side 136 D- 2 that are opposite to each other. The third segment 126 C and the fourth segment 126 D of the second common electrode 120 B may substantially extend in the first direction D 1 , and may deflect (or namely, bend) by using the third connection segment 128 B to be alternately arranged (or namely, staggeredly arranged) in the second direction D 2 . Therefore, the segment setting of the second common electrode 120 B may mean that the second common electrode 120 B has a zigzag pattern. The third segment 126 C is closer to the pixel electrode 110 A compared with the fourth segment 126 D, and the fourth segment 126 D is farther away from the pixel electrode 110 A compared with the third segment 126 C. The first connection segment 128 A may be substantially parallel to the third connection segment 128 B. For example, similar to the second side 136 A- 2 of the first segment 126 A and the second side 136 B- 2 of the second segment 126 B, there may be an offset distance k between the fourth side 136 C- 2 of the third segment 126 C and the fourth side 136 D- 2 of the fourth segment 126 D in the second direction D 2 . Similar to the second side 136 A- 2 of the first segment 126 A and the second side 136 B- 2 of the second segment 126 B, there is an equal offset distance k between the third side 136 C- 1 of the third segment 126 C and the third side 136 D- 1 of the fourth segment 126 D. However, a value of the offset distance k between the third segment 126 C and the fourth segment 126 D may be substantially the same as or different from a value of the offset distance k between the first segment 126 A and the second segment 126 B. The present disclosure is not limited thereto.

Referring to FIG. 3 and FIG. 4 again, in an embodiment, the sub pixel 102 A may further include a second data line 104 B. For example, the first data line 104 A and the second data line 104 B may be formed by the second metal layer (M 2 ), and may be separated from the first metal layer M 1 by using the insulation layer (for example, the insulation layer 140 in FIG. 4 or FIG. 5 ). The second data line 104 B includes a third section 130 C, a fourth section 130 D, and a fourth connection segment 132 B connected between the third section 130 C and the fourth section 130 D. The first section 130 A has the first side 130 A- 1 and the second side 130 A- 2 , the second section 130 B has the first side 130 B- 1 and the second side 130 B- 2 , the third section 130 C has a third side 130 C- 1 and a fourth side 130 C- 2 , and the fourth section 130 D has a third side 130 D- 1 and a fourth side 130 D- 2 .

Similarly, the third section 130 C and the fourth section 130 D of the second data line 104 B may substantially extend in the first direction D 1 , and may deflect (or namely, bend) by using the fourth connection segment 132 B to be alternately arranged (or namely, staggeredly arranged) in the second direction D 2 . Therefore, the segment setting of the second data line 104 B may mean that the second data line 104 B has a zigzag pattern. The third section 130 C is farther away from the pixel electrode 110 A compared with the fourth section 130 D, and the fourth section 130 D is closer to the pixel electrode 110 A compared with the third section 130 C. The second connection segment 132 A may be substantially parallel to the fourth connection segment 132 B. For example, there is an offset distance k′ ( FIG. 3 ) between the second side 130 A- 2 of the first section 130 A and the second side 130 B- 2 of the second section 130 B in the second direction D 2 , and there may also be an substantially equal offset distance k′ between the first side 130 A- 1 of the first section 130 A and the first side 130 B- 1 of the second section 130 B. Similarly, there is also an offset distance k′ between the second side 130 C- 2 of the third section 130 C and the second side 130 D- 2 of the fourth section 130 D in the second direction D 2 . A value of the offset distance k′ may be substantially the same as or different from the value of the foregoing offset distance k. The present disclosure is not limited thereto.

In an embodiment, referring to FIG. 1 and FIG. 4 , domains of the pixel electrodes 110 A, 110 B, 110 C, and 110 D may be distinguished according to liquid crystal falling directions. For example, at least one of the pixel electrodes 110 A, 110 B, 110 C, and 110 D may include at least four alignment domains, and liquid crystal falling directions of the four alignment domains are different. For example, the pixel electrode 110 A shown in FIG. 4 may be divided into at least four domains substantially having a same area, such as a first alignment domain 134 A, a second alignment domain 134 B, a third alignment domain 134 C, and a fourth alignment domain 134 D, and the four domains respectively correspond to different liquid crystal falling directions. However, the present disclosure is not limited thereto, and an area of at least one domain may be differently designed. In another embodiment, at least one of the pixel electrodes 110 A, 110 B, 110 C, and 110 D may not have four alignment domains. In other words, the pixel electrodes 110 A, 110 B, 110 C, and 110 D may have a single alignment domain or two or more alignment domains. A quantity of alignment domains may be selectively designed according to an actual requirement.

Referring to FIG. 4 , for example, the pixel electrode 110 A includes the two sides 124 A and 124 B that are opposite to each other, and includes the first data line 104 A and the second data line 104 B. The side 124 A of the pixel electrode 110 is adjacent to the first data line 104 A and the first common electrode 120 A. The side 124 B of the pixel electrode 110 A is adjacent to the second data line 104 B and the second common electrode 120 B. The first connection segment 128 A of the first common electrode 120 A and the second connection segment 132 A of the first data line 104 A mutually intersect and overlap with each other in a third direction D 3 (which is substantially perpendicular to the first direction D 1 and the second direction D 2 , that is, perpendicularly projected in a direction of a first substrate 138 ). The side 124 A of the pixel electrode 110 A overlaps with a part of the first common electrode 120 A and a part of the first data line 104 A. For example, the side 124 A of the pixel electrode 110 A may partially overlap with the first section 130 A of the first data line 104 A and the second segment 126 B of the first common electrode 120 A, the side 124 A of the pixel electrode 110 A may not overlap with the second section 130 B of the first data line 104 A and the first segment 126 A of the first common electrode 120 A, and the side 124 A of the pixel electrode 110 A may selectively partially overlap or not overlap with the second connection segment 132 A of the first data line 104 A and/or the first connection segment 128 A of the first common electrode 120 A. The side 124 B of the pixel electrode 110 A overlaps with a part of the second common electrode 120 B and a part of the second data line 104 B. For example, the side 124 B of the pixel electrode 110 A may partially overlap with the fourth section 130 D of the second data line 104 B and the third segment 126 C of the second common electrode 120 B, the side 124 B of the pixel electrode 110 A may not overlap with the third section 130 C of the second data line 104 B and the fourth segment 126 D of the second common electrode 120 B, and the side 124 B of the pixel electrode 110 A may selectively partially overlap or not overlap with the fourth connection segment 132 B of the second data line 104 B and/or the third connection segment 128 B of the second common electrode 120 B. The pixel electrode 110 A has center lines J and J′ that approximately divides the pixel electrode 110 A into four substantially equal domains, such as the first alignment domain 134 A, the second alignment domain 134 B, the third alignment domain 134 C, and the fourth alignment domain 134 D. For example, the first alignment domain 134 A may partially overlap with the first section 130 A of the first data line 104 A and not overlap with the first segment 126 A of the first common electrode 120 A. The second alignment domain 134 B may partially overlap with the second segment 126 B of the first common electrode 120 A and not overlap with the second section 130 B of the first data line 104 A. The third alignment domain 134 C may partially overlap with the third segment 126 C of the second common electrode 120 B and not overlap with the third section 130 C of the second data line 104 B. The fourth alignment domain 134 D may partially overlap with the fourth section 130 D of the second data line 104 B and not overlap with the fourth segment 126 D of the second common electrode 120 B. An overlap domain of the first connection segment 128 A and the second connection segment 132 A may substantially correspond to a junction of the first alignment domain 134 A and the second alignment domain 134 B of the pixel electrode 110 A. However, the present disclosure is not limited thereto. An overlap domain of the third connection segment 128 B and the fourth connection segment 132 B may substantially correspond to a junction of the third alignment domain 134 C and the fourth alignment domain 134 D of the pixel electrode 110 A. However, the present disclosure is not limited thereto.

Preferably, the first section 130 A of the first data line 104 A may overlap with the first side 136 A- 1 of the first segment 126 A of the first common electrode 120 A closer to the pixel electrode 110 A, and not overlap with the second side 136 A- 2 of the first segment 126 A farther away from the pixel electrode 110 A. Further, the second section 130 B of the first data line 104 A may overlap with the second side 136 B- 2 of the second segment 126 B of the first common electrode 120 A farther away from the pixel electrode 110 A, and not overlap with the first side 136 B- 1 of the second segment 126 B closer to the pixel electrode 110 A. The third section 130 C of the second data line 104 B may overlap with the fourth side 136 C- 2 of the third segment 126 C of the second common electrode 120 B farther away from the pixel electrode 110 A, and not overlap with the third side 136 C- 1 of the third segment 126 C closer to the pixel electrode 110 A. Further, the fourth section 130 D of the second data line 104 B may overlap with the third side 136 D- 1 of the fourth segment 126 D of the second common electrode 120 B closer to the pixel electrode 110 A, and may not overlap with the fourth side 136 D- 2 of the fourth segment 126 D farther away from the pixel electrode 110 A.

Referring to FIG. 5 and FIG. 6 , FIG. 5 is a sectional view of the pixel structure in FIG. 1 along a sectional line A-A′. FIG. 6 is a sectional view of the pixel structure in FIG. 1 along a sectional line B-B′. The third segment 126 C or the fourth segment 126 D of the second common electrode 120 B is disposed on the first substrate 138 . The insulation layer 140 is disposed on the second common electrode 120 B. The third section 130 C or the fourth section 130 D of second data line 104 B is disposed on the insulation layer 140 . An insulation layer 142 covers the second data line 104 B. In another embodiment, the second data line 104 B may not be covered by the insulation layer 142 . The color resistors 112 A and 112 B are respectively disposed on the sub pixels 102 A and 102 B, and the color resistors 112 A and 112 B are disposed on the insulation layer 142 . The pixel electrodes 110 A and 110 B are disposed on the color resistors. For example, the pixel electrode 110 A and the pixel electrode 110 B are respectively disposed on the sub pixels 102 A and 102 B, and are respectively disposed on the color resistor 112 A and the color resistor 112 B. A display medium layer 144 is disposed between the first substrate 138 and a second substrate 148 that are oppositely disposed. The display medium layer 144 may include a non-self-luminous display medium material, for example, a liquid crystal layer. An electrode film 146 may be selectively disposed on an inner surface of the second substrate 148 . However, the present disclosure is not limited thereto. In another embodiment, the electrode film 146 may not be disposed on the inner surface of the second substrate 148 . In an embodiment, the common electrode 22 and the electrode film 146 on the second substrate 148 are applied with substantially a same voltage. For example, the electrode film 146 serves as a common electrode and is applied with a common voltage, and the common electrode is also applied with the common voltage. The present disclosure is not limited thereto. The common electrode may also be referred to as an array common electrode. As shown in FIG. 1 and FIG. 5 , for example, the third alignment domain 134 C of the pixel electrode 110 A of the sub pixel 102 A may overlap with the third segment 126 C of the second common electrode 120 B, and not overlap with the third section 130 C of the second data line 104 B. The first alignment domain 134 A of the pixel electrode 110 B of the sub pixel 102 B may overlap with the third section 130 C of the second data line 104 B, and not overlap with the third segment 126 C of the second common electrode 120 B. As shown in FIG. 1 and FIG. 6 , the fourth alignment domain 134 D of the pixel electrode 110 A of the sub pixel 102 A may overlap with the fourth section 130 D of the second data line 104 B, and not overlap with the fourth segment 126 D of the second common electrode 120 B. The second alignment domain 134 B of the pixel electrode 110 B of the sub pixel 102 B may overlap with the fourth segment 126 D of the second common electrode 120 B, and not overlap with the fourth section 130 D of the second data line 104 B.

In this embodiment, the data line and the common electrode on the same side of the pixel electrode (using the second data line 104 B and the second common electrode 120 B on the side 124 B of the pixel electrode 110 A as an example) are of a zigzag pattern in which the data line and the common electrode intersect with each other. The data line and the common electrode are separately designed to partially overlap with the pixel electrode, and may achieve at least one of the following effects. The common electrode (for example, the second common electrode 120 B) and the electrode film 146 are both applied with a common voltage. Therefore, the common electrode and the electrode film 146 have substantially a same potential. Therefore, molecules of the display medium layer 144 above a part of the common electrode ( 120 B) not covered by the data line (for example, a part of the third segment 126 C of the second common electrode 120 B not covered by the third section 130 C of the second data line 104 B shown in FIG. 5 ), for example, liquid crystal molecules of a liquid crystal layer, may remain in an original state. In addition, when the data line transfers a pixel voltage (especially a high-potential voltage) of another sub pixel, because the common electrode (for example, the second common electrode 120 B) and the electrode film 146 have substantially the same potential, an arrangement state (for example, a molecule tilt angle) of the molecules of the display medium layer 144 (for example, the liquid crystal molecules of the liquid crystal layer) is not greatly affected. In this way, a phenomenon of crosstalk caused by the pixel voltage transferred by the data line to the another sub pixel may be effectively avoided. In addition, an overlap area between the data line and the pixel electrode may be relatively small (for example, only the fourth section 130 D of the second data line 104 B overlaps with the fourth alignment domain 134 D of the pixel electrode 110 A, and the third section 130 C of the second data line 104 B does not overlap with the pixel electrode 110 A). Therefore, a coupling capacitance (Cpd) between the pixel electrode and the data line may be relatively small, so that a phenomenon of crosstalk due to that a bias voltage of the pixel electrode is affected by voltage coupling of the data line can also be avoided. In this way, a problem of bright lines and dark lines caused on a display picture can be effectively resolved. Light shielding may be performed, by using the common electrode (for example, the second common electrode 120 B), on an edge part of the pixel electrode not covered by the data line, and the setting of a black matrix on the data line (for example, the second data line 104 B) may be saved, thereby improving the aperture ratio of the pixel structure. Further, an overlap part of color resistors (for example, the color resistor 112 A and 112 B) may be covered by the data line (for example, the second data line 104 B) and/or the common electrode (for example, the second common electrode 120 B) used as light shielding elements/a light shielding element, so as to avoid light leakage at the overlap part of the color resistors (for example, the color resistors 112 A and 112 B). In addition, a configuration design in which the data line partially overlaps with the common electrode can improve the aperture ratio and light penetration rate of the display panel.

The present disclosure is not limited thereto. In another embodiment, the data line and the common electrode may alternatively be configured in another manner to partially overlap with the pixel electrode, so as to effectively avoid the phenomenon of crosstalk caused by the pixel voltage transferred by the data line to the another pixel, effectively avoid the problem of bright lines and dark lines, and maintain effects of the aperture ratio and the light penetration rate of the pixel.

For example, FIG. 7 is a schematic diagram of a pixel structure of a single sub pixel according to another embodiment. Differences in configurations between data lines 204 A and 204 B, common electrodes 220 A and 220 B, and a pixel electrode 110 A and those in FIG. 4 are described below. Directions of zigzag patterns of the first data line 204 A and the second data line 204 B in FIG. 7 are reverse to directions of the zigzag patterns of the first data line 104 A and the first data line 104 B in FIG. 4 . In other words, an extension direction of a second connection segment 232 A of the first data line 204 A in FIG. 7 mutually intersects with an extension direction of the second connection segment 132 A of the first data line 104 A in FIG. 4 . An extension direction of a fourth connection segment 232 B of the second data line 204 B in FIG. 7 mutually intersects with an extension direction of the fourth connection segment 132 B of the second data line 104 B in FIG. 4 . In addition, directions of zigzag patterns of a first common electrode 220 A and a second common electrode 220 B of a common electrode 222 in FIG. 7 are reverse to directions of the zigzag patterns of the first common electrode 120 A and the second common electrode 120 B in FIG. 4 . In other words, an extension direction of a first connection segment 228 A of the first common electrode 220 A of the common electrode 222 in FIG. 7 mutually intersects with an extension direction of the first connection segment 128 A of the first common electrode 120 A of the common electrode 122 in FIG. 4 . An extension direction of a third connection segment 228 B the second common electrode 220 B in FIG. 7 mutually intersects with an extension direction of the third connection segment 128 B of the second common electrode 120 B of the common electrode 122 in FIG. 4 .

Referring to FIG. 7 , the first connection segment 228 A of the first common electrode 220 A overlaps and intersects with the second connection segment 232 A of the first data line 204 A in a perpendicular projection direction of a substrate (a third direction D 3 ), so that a first section 230 A of the first data line 204 A is located on a second side 236 A- 2 of a first segment 226 A of the first common electrode 220 A. For example, the first section 230 A of the first data line 204 A may overlap with the second side 236 A- 2 of the first segment 226 A of the first common electrode 220 A in the perpendicular projection direction of the substrate (the third direction D 3 ) and not overlap with a first side 236 A- 1 of the first segment 226 A of the first common electrode 220 A. A second section 230 B of the first data line 204 A is located on a first side 236 B- 1 of a second segment 226 B of the first common electrode 220 A. For example, the second section 230 B of the first data line 204 may overlap with the first side 236 B- 1 of the second segment 226 B of the first common electrode 220 A in the perpendicular projection direction of the substrate (the third direction D 3 ) and not overlap with a second side 236 B- 2 of the second segment 226 B of the first common electrode 220 A. In addition, an overlap and intersection configuration between the third connection segment 228 B of the second common electrode 220 B and the fourth connection segment 232 B of the second data line 204 B makes a third section 230 C of the second data line 204 B be located on a third side 236 C- 1 of a third segment 226 C of the second common electrode 220 B. For example, the third section 230 C of the second data line 204 B overlaps with the third side 236 C- 1 of the third segment 226 C of the second common electrode 220 B in the perpendicular projection direction of the substrate (the third direction D 3 ) and does not overlap with a fourth side 236 C- 2 of the third segment 226 C of the second common electrode 220 B. A fourth section 230 D of the second data line 204 B is located on a fourth side 236 D- 2 of a fourth segment 226 D of the second common electrode 220 B. In other words, the fourth section 230 D of the second data line 204 B may overlap with the fourth side 236 D- 2 of the fourth segment 226 D of the second common electrode 220 B in the perpendicular projection direction of the substrate (the third direction D 3 ) and not overlap with a third side 236 D- 1 of the fourth segment 226 D of the second common electrode 220 B.

Referring to FIG. 7 , FIG. 8 , and FIG. 9 , an intersection position of the first connection segment of the first common electrode and the second connection segment of the first data line and an intersection position of the third connection segment of the second common electrode and the fourth connection segment of the second data line approximately divide sides 124 A and 124 B of the pixel electrode 110 A into an upper part and a lower part.

As shown in FIG. 7 , the upper part of the side 124 A of the pixel electrode 110 A may partially overlap with the first segment 226 A of the first common electrode 220 A in the third direction D 3 and not overlap with the first section 230 A of the first data line 204 A. The lower part of the side 124 A of the pixel electrode 110 A partially overlaps with the second section 230 B of the first data line 204 A in the third direction D 3 and does not overlap with the second segment 226 B of the first common electrode 220 A. The upper part of the side 124 B of the pixel electrode 110 A may partially overlap with the third section 230 C of the second data line 204 B in the third direction D 3 and not overlap with the third segment 226 C of the second common electrode 220 B. The lower part of the side 124 B of the pixel electrode 110 A partially overlaps with the fourth segment 226 D of the second common electrode 220 B in the third direction D 3 and does not overlap with the fourth section 230 D of the second data line 204 B.

FIG. 8 is a schematic diagram of a pixel structure of a single sub pixel according to another embodiment. FIG. 8 shows another implementation of the data lines, the common electrodes, and the pixel electrodes in FIG. 4 and FIG. 7 . In this embodiment, as shown in FIG. 8 , an upper part of a side 124 A of a pixel electrode 110 A partially overlaps with a first section 130 A of a first data line 204 A in a third direction D 3 and does not overlap with a first segment 126 A of a first common electrode 120 A. A lower part of the side 124 A of the pixel electrode 110 A partially overlaps with a second segment 126 A of the first common electrode 120 A in the third direction D 3 and does not overlap with a second section 130 B of a first data line 104 A. An upper part of a side 124 B of the pixel electrode 110 A may partially overlap with a third section 230 C of a second data line 204 B in the third direction D 3 and not overlap with a third segment 226 C of a second common electrode 220 B. A lower part of the side 124 B of the pixel electrode 110 A may partially overlap with a fourth segment 226 D of the second common electrode 220 B in the third direction D 3 and not overlap with a fourth section 230 D of the second data line 204 B.

FIG. 9 is a schematic diagram of a pixel structure of a single sub pixel according to another embodiment. In this embodiment, as shown in FIG. 9 , an upper part of a side 124 A of a pixel electrode 110 A may partially overlap with a first segment 226 A of a first common electrode 220 A in a third direction D 3 and not overlap with a first section 230 A of a first data line 204 A. A lower part of the side 124 A of the pixel electrode 110 A may partially overlap with a second section 230 B of the first data line 204 A in the third direction D 3 and not overlap with a second segment 22 B of the first common electrode 220 A. An upper part of a side 124 B of the pixel electrode 110 A may partially overlap with a third segment 126 C of a second common electrode 220 B in the third direction D 3 and not overlap with a third section 130 C of a second data line 104 B. A lower part of the side 124 B of the pixel electrode 110 A may partially overlap with a fourth section 130 D of the second data line 104 B in the third direction D 3 and not overlap with a fourth segment 126 D of the second common electrode 220 B.

Overlap and intersection positions between the common electrodes and the data lines on the two sides of the pixel electrode (for example, connection segments of the common electrodes and the data lines) are not limited to substantially same positions (or heights) on the corresponding sub pixel. In another embodiment, any quantity of overlap and intersection parts between the common electrodes and the data lines may be arbitrarily disposed at other proper positions at the two sides of the pixel electrode. In another embodiment, the common electrode and the data line of the pixel structure may be disposed on one side of the sub pixel arbitrarily or in a combined manner according to the concept of this embodiment of the present disclosure, and the pixel structure is not limited to the disclosed configuration manner.

For example, referring to FIG. 10 , a difference between a pixel structure in FIG. 10 and the pixel structure shown in FIG. 1 is that the pixel structure in this embodiment is configured in an interlace manner. For example, a source electrode 114 of a sub pixel 102 A extends from a right side of a first data line 104 A, and a source electrode 114 of a sub pixel 102 C sequentially arranged in a first direction D 1 extends from a left side of a second data line 104 B. A source electrode 114 of a sub pixel 102 B extends from a right side of the second data line 104 B, and a source electrode 114 of a sub pixel 102 D sequentially arranged in the first direction D 1 extends from a left side of a third data line 104 C. Configurations of other elements are obtained by analogy.

FIG. 11 is a schematic diagram of a pixel structure of a single sub pixel according to a compared embodiment. A difference with the embodiment in FIG. 4 is that a common electrode 722 in this compared embodiment does not have the first common electrode 120 A and the second common electrode 120 B in FIG. 4 , and a first data line 704 A and a second data line 704 B do not have a zigzag pattern. There is substantially a same aperture ratio in the embodiment in FIG. 4 and this compared embodiment in FIG. 11 , but there is a lower coupling resistance (Cpd) between the pixel electrode and the data line in the embodiment in FIG. 4 compared with this compared embodiment, as shown in Table 1.

In conclusion, although the present disclosure is disclosed above with the embodiments, the embodiments are not intended to limit the present disclosure. A person of ordinary skill in the art to which the present disclosure belongs may make various modifications and polishing without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.