Chip mounting system and method for mounting chips

The present disclosure relates to a mounting system and a mounting method, and more particularly to a chip mounting system and a method for mounting chips.

In recent years, LEDs (light-emitting diodes) have been widely used due to good light-emitting quality and high light-emitting efficiency. LEDs have been developed to be capable of emitting red, green, and blue light, and LEDs have been increasingly used in various applications such as a full-color LED display, so that color performance of the full-color LED display can be increased. Typically, the red, green, and blue lights respectively generated by the red, green, and blue LEDs blend to form colored light with high brightness and contrast, so as to display information for viewers.

One aspect of the present disclosure relates to a chip mounting system and a method for mounting chips.

One of the embodiments of the present disclosure provides a chip mounting system that includes a first carrier device, a second carrier device, and a chip capturing device. The first carrier device includes a plurality of first carrier platforms for respectively carrying a plurality of semiconductor structures. Each semiconductor structure includes a base layer and a plurality of light emitting groups disposed on the base layer in parallel, and each light emitting group includes a plurality of light emitting chips disposed on the base layer. The second carrier device includes a second carrier platform for carrying a circuit substrate. The chip capturing device is used for moving the light emitting chip from the base layer to the circuit substrate.

Another one of the embodiments of the present disclosure provides a chip mounting system that includes a first carrier device, a second carrier device, and a chip capturing device. The first carrier device includes a plurality of first carrier platforms for respectively carrying a plurality of semiconductor structures. Each semiconductor structure includes a base layer and a plurality of light emitting chips disposed on the base layer. The second carrier device includes a second carrier platform for carrying a circuit substrate. The chip capturing device is used for moving the light emitting chip from the base layer to the circuit substrate.

Yet another one of the embodiments of the present disclosure provides a method for mounting chips, including: providing a first carrier device that includes a plurality of first carrier platforms for respectively carrying a plurality of semiconductor structures, wherein each semiconductor structure includes a base layer and a plurality of light emitting groups disposed on the base layer in parallel, and each light emitting group includes a plurality of light emitting chips disposed on the base layer; and then moving the light emitting chip from the base layer to the circuit substrate by a chip capturing device.

More particularly, the first carrier device and the chip capturing device are disposed on the same production line, and the semiconductor structures are divided into a first semiconductor structure, a second semiconductor structure and a third semiconductor structure.

More particularly, each light emitting group of the first semiconductor structure is a red light emitting group, each light emitting chip of the first semiconductor structure is a red light emitting chip, and the sequence of the red light emitting groups of the first semiconductor structure is based upon the arithmetical series with a common difference of 1 being sequentially defined as the 1 st , 2 nd , 3 rd , . . . n th .

More particularly, each light emitting group of the second semiconductor structure is a green light emitting group, each light emitting chip of the second semiconductor structure is a green light emitting chip, and the sequence of the green light emitting groups of the second semiconductor structure is based upon the arithmetical series with a common difference of 1 being sequentially defined as the 1 st , 2 nd , 3 rd , . . . n th .

More particularly, each light emitting group of the third semiconductor structure is a blue light emitting group, each light emitting chip of the third semiconductor structure is a blue light emitting chip, and the sequence of the blue light emitting groups of the third semiconductor structure is based upon the arithmetical series with a common difference of 1 being sequentially defined as the 1 st , 2 nd , 3 rd , . . . n th .

More particularly, the red light emitting chip of the first semiconductor structure is transmitted from the base layer to the circuit substrate, the green light emitting chip of the second semiconductor structure is transmitted from the base layer to the circuit substrate, and the blue light emitting chip of the third semiconductor structure is transmitted from the base layer to the circuit substrate.

Therefore, the red light emitting group, the green light-emitting group, and the blue light-emitting group of the same sequence are disposed adjacent to each other and electrically connected to the circuit substrate due to the feature of “the chip capturing device being used for moving the light emitting chip from the base layer to the circuit substrate” or “moving the light emitting chip from the base layer to the circuit substrate by a chip capturing device”, so that the red light-emitting chip, the green light-emitting chip, and the blue light-emitting chip of the same sequence are arranged adjacent to each other to form a pixel.

To further understand the techniques, means and effects of the present disclosure, the following detailed descriptions and appended drawings are hereby referred to, such that, and through which, the purposes, features and aspects of the present disclosure can be thoroughly and concretely appreciated. However, the appended drawings are provided solely for reference and illustration, without any intention to limit the present disclosure.

The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

FIG. 1 shows a function block of a chip mounting system according to the present disclosure;

FIG. 2 shows a top schematic view of a first carrier device including a plurality of first carrier platforms for respectively carrying a plurality of semiconductor structures according to the present disclosure;

FIG. 3 shows a top schematic view of the 1 st , 4 th and 7 th red light emitting groups of the first semiconductor structure removed from the base layer by the chip capturing device according to the present disclosure;

FIG. 4 shows a top schematic view of the 1 st , 4 th and 7 th red light emitting groups of the first semiconductor structure transmitted to circuit substrate by the chip capturing device according to the present disclosure;

FIG. 5 shows a top schematic view of the 2 nd , 5 th and 8 th red light emitting groups of the first semiconductor structure removed from the base layer by the chip capturing device according to the present disclosure;

FIG. 6 shows a top schematic view of the 2 nd , 5 th and 8 th red light emitting groups of the first semiconductor structure transmitted to circuit substrate by the chip capturing device according to the present disclosure;

FIG. 7 shows a top schematic view of the 3 rd , 6 th and 9 th red light emitting groups of the first semiconductor structure removed from the base layer by the chip capturing device according to the present disclosure;

FIG. 8 shows a top schematic view of the 3 rd , 6 th and 9 th red light emitting groups of the first semiconductor structure transmitted to circuit substrate by the chip capturing device according to the present disclosure;

FIG. 9 shows a flowchart of a method for mounting chips according to the present disclosure;

FIG. 10 shows a schematic view of a chip capturing device performing a position detecting step according to the first embodiment of the present disclosure;

FIG. 11 shows a schematic view of the chip capturing device performing a position detecting step and a chip separating step according to the first embodiment of the present disclosure;

FIG. 12 shows a function block of the chip capturing device according to the first embodiment of the present disclosure;

FIG. 13 shows a schematic view of the chip capturing device performing a position detecting step and a chip separating step according to the second embodiment of the present disclosure;

FIG. 14 shows a schematic view of the chip capturing device performing a position detecting step and a chip separating step according to the third embodiment of the present disclosure; and

FIG. 15 shows a schematic view of the chip capturing device performing a position detecting step and a chip separating step according to the fourth embodiment of the present disclosure.

Embodiments of a chip mounting system and a method for mounting chips according to the present disclosure are described herein. Other advantages and objectives of the present disclosure can be easily understood by one skilled in the art from the disclosure. The present disclosure can be applied in different embodiments. Various modifications and variations can be made to various details in the description for different applications without departing from the scope of the present disclosure. The drawings of the present disclosure are provided only for simple illustrations, but are not drawn to scale and do not reflect the actual relative dimensions. The following embodiments are provided to describe in detail the concept of the present disclosure, and are not intended to limit the scope thereof in any way.

Referring to FIG. 1 to FIG. 8 , the present disclosure provides a chip mounting system that includes a first carrier device D 1 (or a first bearing device), a second carrier device D 2 (or a second bearing device) and a chip capturing device D 3 . The first carrier device D 1 , the second carrier device D 2 , and the chip capturing device D 3 are disposed on the same production line.

Firstly, referring to FIG. 1 and FIG. 2 , the first carrier device D 1 includes a plurality of first carrier platforms D 10 for respectively carrying a plurality of semiconductor structures S. More particularly, referring to FIG. 2 and FIG. 10 , each semiconductor structure S includes a base layer S 10 and a plurality of light emitting groups disposed on the base layer S 10 in parallel, and each light emitting group includes a plurality of light emitting chips S 11 disposed on the base layer S 10 . In addition, the semiconductor structures S can be divided into a first semiconductor structure S 1 , a second semiconductor structure S 2 and a third semiconductor structure S 3 .

For example, as shown in FIG. 2 , each light emitting group of the first semiconductor structure S 1 may be a red light emitting group R 1 , and each light emitting chip of the first semiconductor structure S 1 may be a red light emitting chip R 10 . In addition, the red light emitting groups R 1 of the first semiconductor structure S 1 can be based upon the arithmetical series with a common difference of 1 being sequentially defined as the 1 st , 2 nd , 3 rd , . . . n th . That is to say, the red light emitting groups R 1 are sequentially arranged from left to right in FIG. 2 , so that the red light emitting groups R 1 are sequentially defined as the 1 st red light emitting group R 1 , the 2 nd red light emitting group R 1 , the 3 rd red light emitting group R 1 , . . . the n th red light emitting group R 1 .

For example, as shown in FIG. 2 , each light emitting group of the second semiconductor structure S 2 may be a green light emitting group G 1 , and each light emitting chip of the second semiconductor structure S 2 may be a green light emitting chip G 10 . In addition, the green light emitting groups G 1 of the second semiconductor structure S 2 can be based upon the arithmetical series with a common difference of 1 being sequentially defined as the 1 st , 2 nd , 3 rd , . . . n th . That is to say, the green light emitting groups G 1 are sequentially arranged from left to right in FIG. 2 , so that the green light emitting groups G 1 are sequentially defined as the 1 st green light emitting group G 1 , the 2 nd green light emitting group G 1 , the 3 rd green light emitting group G 1 , . . . the n th green light emitting group G 1 .

For example, as shown in FIG. 2 , each light emitting group of the third semiconductor structure S 3 may be a blue light emitting group B 1 , and each light emitting chip of the third semiconductor structure S 3 may be a blue light emitting chip B 10 . In addition, the blue light emitting groups B 1 of the third semiconductor structure S 3 can be based upon the arithmetical series with a common difference of 1 being sequentially defined as the 1 st , 2 nd , 3 rd , . . . n th . That is to say, the blue light emitting groups B 1 are sequentially arranged from left to right in FIG. 2 , so that the blue light emitting groups B 1 are sequentially defined as the 1 st blue light emitting group B 1 , the 2 nd blue light emitting group B 1 , the 3 rd blue light emitting group B 1 , . . . the n th blue light emitting group B 1 .

Moreover, referring to FIG. 1 , FIG. 4 , and FIG. 10 , the second carrier device D 2 includes a second carrier platform D 20 for carrying a circuit substrate C, and the chip capturing device D 3 is used for moving the light emitting chip S 11 from the base layer S 10 to the circuit substrate C. For example, the chip capturing device D 3 includes a chip capturing module that may be any type of suction device (such as a vacuum suction nozzle or a vacuum sucker) or any type of clamping device, but it is not meant to limit the scope of the present disclosure.

For example, referring to FIG. 3 , FIG. 4 , and FIG. 10 , the red light emitting chip R 10 of the first semiconductor structure S 1 can be transmitted from the base layer S 10 to the circuit substrate C. In addition, referring to FIG. 5 , FIG. 6 , and FIG. 10 , the green light emitting chip G 10 of the second semiconductor structure S 2 can be transmitted from the base layer S 10 to the circuit substrate C. Moreover, referring to FIG. 7 , FIG. 8 , and FIG. 10 , the blue light emitting chip B 10 of the third semiconductor structure S 3 can be transmitted from the base layer S 10 to the circuit substrate C.

As described above, referring to FIG. 3 and FIG. 4 , the 1 st , 4 th and 7 th red light emitting groups R 1 of the first semiconductor structure S 1 can be transmitted from the base layer S 10 to the circuit substrate C by the chip capturing device D 3 . In addition, referring to FIG. 5 and FIG. 6 , the 2 nd , 5 th and 8 th green light emitting groups G 1 of the second semiconductor structure S 2 can be transmitted from the base layer S 10 to the circuit substrate C by the chip capturing device D 3 . Moreover, referring to FIG. 7 and FIG. 8 , the 3 rd , 6 th and 9 th blue light emitting groups B 1 of the third semiconductor structure S 3 can be transmitted from the base layer S 10 to the circuit substrate C by the chip capturing device D 3 .

Therefore, as shown in FIG. 8 , the red light emitting group R 1 , the green light-emitting group G 1 , and the blue light-emitting group B 1 of the same sequence are disposed adjacent to each other and electrically connected to the circuit substrate C, so that the red light-emitting chip R 10 , the green light-emitting chip G 10 , and the blue light-emitting chip B 10 of the same sequence are arranged adjacent to each other to form a pixel W. That is to say, the 1 st red light emitting group R 1 , the 1 st green light-emitting group G 1 , and the 1 st blue light-emitting group B 1 can be disposed adjacent to each other and electrically connected to the circuit substrate C, so that the red light-emitting chip R 10 , the green light-emitting chip G 10 , and the blue light-emitting chip B 10 can be arranged adjacent to each other to form a pixel W.

Therefore, the red light emitting group R 1 , the green light-emitting group G 1 , and the blue light-emitting group B 1 of the same sequence can be disposed adjacent to each other and electrically connected to the circuit substrate C due to the feature of “the chip capturing device D 3 being used for moving the light emitting chip S 11 from the base layer S 10 to the circuit substrate C”, so that the red light-emitting chip R 10 , the green light-emitting chip G 10 , and the blue light-emitting chip B 10 of the same sequence can be arranged adjacent to each other to form a pixel W.

Referring to FIG. 1 to FIG. 10 , the present disclosure further provides a method for mounting chips, including: firstly, providing a first carrier device D 1 that includes a plurality of first carrier platforms D 10 for respectively carrying a plurality of semiconductor structures S without expansion, each semiconductor structure S including a base layer S 10 and a plurality of light emitting groups disposed on the base layer S 10 in parallel, and each light emitting group including a plurality of light emitting chips S 11 disposed on the base layer S 10 (step S 100 ); and then moving the light emitting chip S 11 from the base layer S 10 to the circuit substrate C by a chip capturing device D 3 (step S 102 ).

Therefore, the red light emitting group R 1 , the green light-emitting group G 1 , and the blue light-emitting group B 1 of the same sequence can be disposed adjacent to each other and electrically connected to the circuit substrate C due to the feature of “moving the light emitting chip S 11 from the base layer S 10 to the circuit substrate C by a chip capturing device D 3 ”, so that the red light-emitting chip R 10 , the green light-emitting chip G 10 , and the blue light-emitting chip B 10 of the same sequence can be arranged adjacent to each other to form a pixel W (step S 104 ).

First Embodiment

Referring to FIG. 10 to FIG. 12 , the first embodiment of the present disclosure provides a chip capturing device D 3 including a position detecting module 1 and a chip separating module 2 . The chip capturing device D 3 can be applied to a semiconductor structure S that includes a base layer S 10 and a plurality of light emitting chips S 11 disposed on the base layer S 10 . For example, the base layer S 10 may be a sapphire base layer, a silicon base layer, or a base layer of any material. In addition, the light emitting chips S 11 can be connected with each other before cutting the light emitting chips S 11 , or the light emitting chips S 11 can be separated from each other after cutting the light emitting chips S 11 (as shown in the first embodiment). The light emitting chip S 11 may be a GaN LED chip or any type of semiconductor LED chip, and each light emitting chip S 11 has at least two pads (not shown) disposed on a top side thereof. However, the base layer S 10 and the light emitting chips S 11 used in the first embodiment are not meant to limit the scope of the present disclosure.

Referring to FIG. 10 and FIG. 11 , the position detecting module 1 includes an emitting element 11 and a receiving element 12 , and the chip separating module 2 is adjacent to or corresponds to the position detecting module 1 . More particularly, the position detecting module 1 can provide a position signal of a contact interface S 100 (or a contact surface) between the base layer S 10 and the light emitting chip S 11 by matching the emitting element 11 and the receiving element 12 (that is to say, the position detecting module 1 can be used to perform or execute a position detecting step). Therefore, referring to FIG. 10 and FIG. 11 , a projection light source P generated by the chip separating module 2 is projected onto the contact interface S 100 between the base layer S 10 and the light emitting chip S 11 according to the position signal so as to easily separate the light emitting chip S 11 from the base layer S 10 (that is to say, the chip separating module 2 can be used to perform a position separating step). Hence, after the projection light source P is projected onto the semiconductor structure S, the light emitting chip S 11 can be easily separated from the base layer S 10 due to the illumination of the projection light source P.

For example, referring to FIG. 10 and FIG. 11 , the position detecting module 1 may be one of an optical position sensor and a sound position sensor. More particularly, the emitting element 11 may be a signal emitting element 110 (such as a signal emitter) for generating a detection signal L (such as an optical wave signal or a sound wave signal), and the receiving element 12 may be a signal receiving element 120 (such as a signal receiver) for receiving the detection signal L. In addition, the detection signal L generated by the signal emitting element 110 can be reflected by the semiconductor structure S and can be projected onto the signal receiving element 120 so as to provide the position signal of the contact interface S 100 between the base layer S 10 and the light emitting chip S 11 . Hence, referring to FIG. 10 and FIG. 11 , the projection light source P generated by the chip separating module 2 can be projected onto the contact interface S 100 between the base layer S 10 and the light emitting chip S 11 according to the position signal that has been received by the signal receiving element 120 , so that the light emitting chip S 11 can be easily separated from the base layer S 10 due to the illumination of the projection light source P.

In conclusion, the position detecting module 1 can be used to provide a position signal of a contact interface S 100 between the base layer S 10 and the light emitting chip S 11 by matching or pairing the emitting element 11 and the receiving element 12 in advance, and then a projection light source P generated by the chip separating module 2 can be precisely projected onto the contact interface S 100 between the base layer S 10 and the light emitting chip S 11 according to the position signal. Hence, the light emitting chip S 11 can be easily separated from the base layer S 10 due to the illumination of the projection light source P.

It should be noted that the chip capturing device D 3 of the present disclosure further includes a control module 3 electrically connected to the position detecting module 1 and the chip separating module 2 as shown in FIG. 1 and FIG. 3 . In addition, referring to FIG. 10 to FIG. 11 , the position detecting module 1 and the chip separating module 2 can be disposed beside or on the same side of the semiconductor structure S.

Second Embodiment

Referring to FIG. 13 , the second embodiment of the present disclosure provides a chip capturing device D 3 including a position detecting module 1 and a chip separating module 2 . Comparing FIG. 13 with FIG. 11 , the difference between the second embodiment and the first embodiment is as follows: in the second embodiment, the position detecting module 1 and the chip separating module 2 can be respectively disposed beside two different sides of the semiconductor structure S. For example, the position detecting module 1 can be disposed above the semiconductor structure S, and the chip separating module 2 can be disposed under the semiconductor structure S.

It should be noted that the light emitting chip S 11 can also be respectively detected and separated at the same position. That is to say, the position detecting module 1 and the chip separating module 2 can be respectively disposed beside or at two different sides of the semiconductor structure S, so that the light emitting chip S 11 can be respectively detected and separated at the same position as shown in FIG. 13 .

Third Embodiment

Referring to FIG. 14 , the third embodiment of the present disclosure provides a chip capturing device D 3 . Comparing FIG. 14 with FIG. 11 , the difference between the third embodiment and the first embodiment is as follows: the chip capturing device D 3 of the third embodiment includes an emitting element 11 for generating a projection light source P, a receiving element 12 adjacent to the emitting element 11 , and a control module 3 electrically connected to the emitting element 11 and the receiving element 12 .

More particularly, the projection light source P generated by the emitting element 11 can be reflected by the semiconductor structure S and then projected onto the receiving element 12 so as to provide a position signal of a contact interface S 100 between the base layer S 10 and the light emitting chip S 11 . Therefore, according to the position signal, the projection light source P generated by the emitting chip 11 can be precisely projected onto the contact interface S 100 between the base layer S 10 and the light emitting chip S 11 so as to separate the light emitting chip S 11 from the base layer S 10 easily.

More particularly, the chip capturing device D 3 further includes a first prism 1 adjacent to the emitting element 11 and the receiving element 12 , a second prism 5 adjacent to the first prism 4 , and a signal amplifier 6 adjacent to the first prism 4 . In addition, the projection light source P generated by the emitting element 11 can sequentially pass the first prism 4 and the second prism 5 and then be projected onto the semiconductor structure S. The projection light source P can be reflected by the semiconductor structure S to form a reflection light source R, and the reflection light source R can sequentially pass through the second prism 5 and the first prism 4 and then be projected onto the receiving element 12 . That is to say, the projection light source P generated by the emitting element 11 can be reflected by the semiconductor structure S and then projected onto the receiving element 12 . Therefore, according to the position signal, the projection light source P generated by the emitting element 11 can sequentially pass the first prism 4 and the signal amplifier 6 and then be precisely projected onto the contact interface S 100 between the base layer S 10 and the light emitting chip S 11 , so that the light emitting chip S 11 can be easily separated from the base layer S 10 due to the illumination of the projection light source P.

Fourth Embodiment

Referring to FIG. 15 , the fourth embodiment of the present disclosure provides a chip capturing device D 3 including a position detecting module 1 and a chip separating module 2 . Comparing FIG. 15 with FIG. 11 , the difference between the fourth embodiment and the first embodiment is as follows: in the fourth embodiment, the chip capturing device D 3 includes a position detecting module 1 , a chip separating module 2 , and a control module 3 , and the position detecting module 1 may be a contact position sensor.

More particularly, the position detecting module 1 can contact the semiconductor structure S so as to provide a position signal of a contact interface S 100 between the base layer S 10 and the light emitting chip S 11 . For example, when the base layer S 10 causes warpage, the position detecting module 1 can be used to contact the base layer S 10 of the semiconductor structure S so as to know a position of a contact interface S 100 between the base layer S 10 and the light emitting chip S 11 . In addition, the chip separating module 2 is adjacent to and corresponds to the position detecting module 1 , and the control module 3 is electrically connected to the position detecting module 1 and the chip separating module 2 .

Therefore, a projection light source P generated by the chip separating module 2 can be projected onto the contact interface S 100 between the base layer S 10 and the light emitting chip S 11 according to the position signal so as to easily separate the light emitting chip S 11 from the base layer S 10 .

It should be noted that the position detecting module 1 and the chip separating module 2 can be disposed beside or on the same side of the semiconductor structure S 1 (as shown in FIG. 15 ), or the position detecting module 1 and the chip separating module 2 can be respectively disposed beside or at two different sides of the semiconductor structure S 1 , according to different requirements.

Therefore, the red light emitting group R 1 , the green light-emitting group G 1 , and the blue light-emitting group B 1 of the same sequence are disposed adjacent to each other and electrically connected to the circuit substrate C due to the feature of “the chip capturing device D 3 being used for moving the light emitting chip S 11 from the base layer S 10 to the circuit substrate C” or “moving the light emitting chip S 11 from the base layer S 10 to the circuit substrate C by a chip capturing device D 3 ”, so that the red light-emitting chip R 10 , the green light-emitting chip G 10 , and the blue light-emitting chip B 10 of the same sequence are arranged adjacent to each other to form a pixel W.

The aforementioned descriptions merely represent the preferred embodiments of the present disclosure, without any intention to limit the scope of the present disclosure which is fully described only within the following claims. Various equivalent changes, alterations or modifications based on the claims of the present disclosure are all, consequently, viewed as being embraced by the scope of the present disclosure.