Power control circuit and method thereof

The present application is based on, and claims priority from, Taiwan application serial NO. 106111404, filed on Apr. 5, 2017, the disclosure of which is hereby incorporated by reference herein in its entirety.

The present disclosure relates to a power control circuit and a power control method; in particular, to a power control circuit and a power control method that can always provide a stable supply voltage even though the battery voltage of a portable electronic device varies or the control signal which is sent from a baseband circuit of the portable electronic device changes.

A portable electronic device usually has a power control circuit. This power control circuit is responsible for providing a supply voltage to a power amplifier that is configured to amplify and transmit signals, wherein this supply voltage is corresponding to a control signal which is sent from a baseband circuit of the portable electronic device. Based on different operation requirements of the portable electronic device, the control signal which is sent from the baseband circuit of the portable electronic device may sometimes be large and sometimes be small. However, the battery voltage of the portable electronic device will gradually decrease during the operation of the portable electronic device. If the control signal which is sent from the baseband circuit of the portable electronic device is large, the battery voltage of the portable electronic device may be insufficient to allow the power control circuit to provide a supply voltage which can correspond to the control signal. As a result, the power control circuit may not work normally.

The present disclosure provides a power control circuit that is used to provide a supply voltage from its output end. This power control circuit includes a voltage regulating circuit and a signal selecting circuit. The voltage regulating circuit is coupled to a power supply voltage and the output end of the power control circuit. The voltage regulating circuit receives a first control signal, and outputs the supply voltage to the output end of the power control circuit according to the first control signal. The signal selecting circuit has a first input end, a second input end a third input end and a output end. The first input end of the signal selecting circuit receives a first input signal, the second input end of the signal selecting circuit receives a second input signal, and the third input end of the signal selecting circuit receives a second control signal. The first input signal is related to the power supply voltage. One of the first input signal and the second input signal is chosen as the first control signal according to the second control signal, and this first control signal is outputted from the output end of the signal selecting circuit.

The present disclosure also provides a power control method. This power control method can be applied to a power control circuit. This power control circuit outputs a supply voltage from its output end and includes a voltage regulating circuit and a signal selecting circuit, wherein the voltage regulating circuit is coupled to a power supply voltage and the output end of the power control circuit. The power control method mainly includes: through the voltage regulating circuit, receiving a first control signal and outputting the supply voltage to the output end of the power control circuit according to the first control signal; through the signal selecting circuit, receiving a first input signal, a second input signal and a second control signal, wherein the first input signal is related to the power supply voltage; and through the signal selecting circuit, choosing one of the first input signal and the second input signal as the first control signal according to the second control signal and outputting the first control signal.

For further understanding of the present disclosure, reference is made to the following detailed description illustrating the embodiments of the present disclosure. The description is only for illustrating the present disclosure, not for limiting the scope of the claim.

Embodiments are illustrated by way of example and not by way of limitation in the figures of the accompanying drawings, in which like references indicate similar elements and in which:

FIG. 1 shows a block diagram of a power control circuit according to one embodiment of the present disclosure;

FIG. 2 shows a block diagram of a power control circuit according to another embodiment of the present disclosure;

FIG. 3 shows a circuit diagram of a power control circuit according to one embodiment of the present disclosure;

FIG. 4A shows a flow chart of a power control method according to one embodiment of the present disclosure;

FIG. 4B shows a flow chart of a power control method according to another embodiment of the present disclosure;

FIG. 4C shows a flow chart illustrating how to generate the second control signal in a power control method according to FIG. 4B ;

FIG. 4D shows a flow chart illustrating how to choose one of the first input signal and the second input signal as the first control signal according to the second control signal in a power control method according to FIG. 4B ; and

FIG. 5 shows a curve diagram showing the power control result of a traditional power control circuit and the power control result of the power control circuit provided by the present disclosure.

The aforementioned illustrations and following detailed descriptions are exemplary for the purpose of further explaining the scope of the present disclosure. Other objectives and advantages related to the present disclosure will be illustrated in the subsequent descriptions and appended drawings. In these drawings, like references indicate similar elements.

There are several embodiments provided for illustrating the power control circuit and the power control method in the present disclosure, but it is not limited thereto.

One Embodiment of the Power Control Circuit

Referring to FIG. 1 , a block diagram of a power control circuit according to one embodiment of the present disclosure is shown. The power control circuit in the present disclosure is for providing a supply voltage. For example, the power control circuit can be configured in a portable electronic device, such as a mobile phone, to provide a supply voltage VCC according to a control signal which is sent from a baseband circuit of the portable electronic device to a power amplifier that is responsible for amplifying and transmitting signals.

As shown in FIG. 1 , the power control circuit in this embodiment at least includes a voltage regulating circuit 10 and a signal selecting circuit 20 . The voltage regulating circuit 10 is coupled to a power supply voltage, such as the battery voltage VBAT of a portable electronic device, and to an output end of the power control circuit. The signal selecting circuit 20 has a first input end, a second input end, a third input end and an output end.

The working principle of the power control circuit in this embodiment is revealed in the following descriptions. For ease of illustration, in the following descriptions, the power control circuit is applied to a mobile phone but it is not limited thereto.

In this embodiment, the voltage regulating circuit 10 outputs a supply voltage VCC to the output end of the power control circuit mainly according to a first control signal VCNT. This first control signal VCNT is sent from the signal selecting circuit 20 . For example, the signal selecting circuit 20 can be a transmission circuit.

The first input end of the signal selecting circuit 20 is configured to receive a first input signal Vramp MAX , and the second input end of the signal selecting circuit 20 is configured to receive a second input signal Vramp. The signal selecting circuit 20 chooses one of the first input signal Vramp MAX and the second input signal Vramp as the first control signal VCNT. The second input signal Vramp is sent from the baseband circuit of the mobile phone. According to different operation requirements of the mobile phone, the second input signal may be large and may also be small. Generally, the signal selecting circuit 20 chooses the second input signal Vramp as the first control signal VCNT and outputs the first control signal VCNT, such that the voltage regulating circuit 10 provides a supply voltage VCC according to the first control signal VCNT to the power amplifier PA which is responsible for amplifying and transmitting signals. However, during the operation of the mobile device, the battery voltage VBAT will gradually decrease. In this case, if the second input signal Vramp which is sent from the baseband circuit of the mobile phone is larger than the battery voltage VBAT, the battery voltage VBAT may be insufficient to make the voltage regulating circuit 10 able to provide the supply voltage VCC corresponding to the large second input signal Vramp. As a result, the power control circuit cannot work normally.

To avoid that, the power control circuit in this embodiment further includes a control circuit 30 . The control circuit 30 has a first input end, a second input end, a third input end, a first output end and a second output end. In FIG. 1 , the first input end of the control circuit 30 is coupled to the battery voltage VBAT, the second input end of the control circuit 30 receives a predetermined voltage VDSB, and the third input end of the control circuit 30 receives the second input signal Vramp. The control circuit 30 calculates the first input signal Vramp MAX according to the battery voltage VBAT and the predetermined voltage VDSB. This first input signal Vramp MAX is outputted from the first output end of the control circuit 30 to the signal selecting circuit 20 . After that, a second control signal VC is outputted from the second output end of the control circuit 30 according to the first input signal Vramp MAX and the second input signal Vramp. The signal selecting circuit 20 is controlled by the second control signal VC to choose one of the first input signal Vramp MAX and the second input signal Vramp as the first control signal VCNT and to output this first control signal VCNT.

In the following descriptions, how the control circuit 30 calculates the first input signal Vramp MAX according to the battery voltage VBAT and the predetermined voltage VDSB and how the control circuit 30 outputs the second control signal VC for controlling the signal selecting circuit 20 to choose one of the first input signal Vramp MAX and the second input signal Vramp as the first control signal VCNT are illustrated.

Referring to FIG. 2 , a block diagram of a power control circuit according to another embodiment of the present disclosure is shown.

As shown in FIG. 2 , the voltage regulating circuit 10 mainly includes a first transistor M 1 , a first operational amplifier OP 1 and the voltage converting circuit 16 , and the control circuit 30 mainly includes a calculation unit 32 and a comparison unit 34 . In the voltage regulating circuit 10 , a first end of the first transistor M 1 is coupled to the battery voltage VBAT, and a second end of the first transistor M 1 is coupled to the output end of the power control circuit. A non-inverting input end of the first operational amplifier OP 1 is coupled to the output end of the signal selecting circuit 20 , and an output end of the first operational amplifier OP 1 is coupled to a third end of the first transistor M 1 . Additionally, the voltage converting circuit 16 is coupled between an inverting input end of the first operational amplifier OP 1 and the output end of the power control circuit. In the control circuit 30 , the comparison unit 34 is coupled between the calculation unit 32 and the signal selecting circuit 20 .

For ease of illustration, in FIG. 2 , the first end of the first transistor M 1 is marked by {circumflex over (1)}, the second end of the first transistor M 1 is marked by {circumflex over (2)}, and the third end of the first transistor M 1 is marked by {circumflex over (3)}.

Further description, the calculation unit 32 calculates the first input signal Vramp MAX according to the battery voltage VBAT and the predetermined voltage VDSB, and thus the first input signal Vramp MAX is related to the battery voltage VBAT. To calculate the first input signal Vramp MAX , the difference of the battery voltage VBAT and the predetermined voltage VDSB is divided by the converting factor of the voltage converting circuit 16 , and then the quotient is the first input signal Vramp MAX . In other words, the calculation unit 32 calculates the first input signal Vramp MAX based on the following Equation 1.

V ramp MAX =( V BAT− VDSB ) /H ( S )  (Equation 1)

In the Equation 1, “Vramp MAX ” indicates the voltage of the first input signal Vramp MAX , “VDSB” indicates a predetermined voltage, and “H(S)” indicates the converting factor of the voltage converting circuit 16 .

According to the voltage regulating circuit 10 in FIG. 2 and the Equation (1), the predetermined voltage VDSB should be the turn-on voltage of the first transistor M 1 . The maximum of the output voltage of the voltage regulating circuit 10 can be obtained after subtracting the turn-on voltage of the first transistor M 1 from the battery voltage VBAT.

Also, according to FIG. 2 , the supply voltage VCC provided by the voltage regulating circuit 10 can be obtained by multiplying the first control signal VCNT received by the non-inverting input end of the first operational amplifier OP 1 with the converting factor of the voltage converting circuit 16 , which is H(S). In other words, the supply voltage VCC provided by the voltage regulating circuit 10 can be represented by the following Equation 2.

VCC= V CNT* H ( S )  (Equation 2)

In the Equation 2, “VCC” indicates the supply voltage VCC provided by the voltage regulating circuit 10 , “VCNT” indicates the voltage of the first control signal VCNT outputted from the signal selecting circuit 20 , and “H(S)” indicates the converting factor of the voltage converting circuit 16 .

From the above, the maximum of the supply voltage VCC provided by the voltage regulating circuit 10 can be obtained after subtracting the turn-on voltage of the first transistor M 1 from the battery voltage VBAT o according to FIG. 2 . In addition, according to the Equation 1 and the Equation 2, the maximum of the first control signal VCNT received by the non-inverting input end of the first operational amplifier OP 1 is the first input signal Vramp MAX obtained based on the Equation 1.

In this manner, according to the variable battery voltage VBAT, the calculation unit 32 in the control circuit 30 can calculate the maximum of the first control signal VCNT received by the non-inverting input end of the first operational amplifier OP 1 , which is the first input signal Vramp MAX .

After that, the comparison unit 34 in the control circuit 30 compares the first input signal Vramp MAX and the second input signal Vramp. As mentioned, the signal selecting circuit 20 will choose one of the first input signal Vramp MAX and the second input signal Vramp as the first control signal VCNT. Thus, the reason why the comparison unit 34 compares the first input signal Vramp MAX and the second input signal Vramp is that, it is necessary to determine whether the second input signal Vramp which is sent from the baseband circuit of the mobile phone is larger than the maximum value of the first control signal VCNT received by the non-inverting input end of the first operational amplifier OP 1 , which is the first input signal Vramp MAX .

When the first input signal Vramp MAX determines that the second input signal Vramp which is sent from the baseband circuit of the mobile phone is smaller than the first input signal Vramp MAX , it indicates that the battery voltage VBAT is currently sufficient for the voltage regulating circuit 10 to provide a supply voltage VCC corresponding to the second input signal Vramp. In this case, the signal selecting circuit 20 is controlled by the second control signal VC, which is from the comparison unit 34 , to output the second input signal Vramp as the first control signal VCNT. As a result, the voltage regulating circuit 10 provides a supply voltage VCC corresponding to the second input signal Vramp. This supply voltage VCC equals to the product of the first control signal VCNT, which is the second input signal Vramp, and the converting factor of the voltage converting circuit 16 .

When the first input signal Vramp MAX determines that the second input signal Vramp which is sent from the baseband circuit of the mobile phone is larger than or equal to the first input signal Vramp MAX , it indicates that the battery voltage VBAT is currently insufficient for the voltage regulating circuit 10 to provide a supply voltage VCC corresponding to the second input signal Vramp. In this case, the signal selecting circuit 20 is controlled by the second control signal VC, which is from the comparison unit 34 , to output the first input signal Vramp MAX as the first control signal VCNT. As a result, the voltage regulating circuit 10 provides a supply voltage VCC corresponding to the first input signal Vramp MAX . This supply voltage VCC equals to the product of the first control signal VCNT, which is the first input signal Vramp MAX , and the converting factor of the voltage converting circuit 16 .

Therefore, when the second input signal Vramp which is sent from the baseband circuit of the mobile phone is larger than or equal to the first input signal Vramp MAX , the signal selecting circuit 20 will be controlled by the second control signal VC coming from the comparison unit 34 to output the first input signal Vramp MAX as the first control signal VCNT. According to the above descriptions, the first input signal Vramp MAX can be adjusted according to the varying battery voltage VBAT. Thus, even when the second input signal Vramp which is sent from the baseband circuit of the mobile phone is larger, it is less likely for the power control circuit in this embodiment to work abnormally because of the insufficient battery voltage VBAT.

There are examples provided to illustrate the circuit diagram and the working principle of the voltage regulating circuit 10 , the signal selecting circuit 20 and the control circuit 30 of the power control circuit in this embodiment; however, the implementations of the voltage regulating circuit 10 , the signal selecting circuit 20 and the control circuit 30 of the power control circuit in this embodiment are not thus restricted. Referring to FIG. 3 , a circuit diagram of a power control circuit according to one embodiment of the present disclosure is shown.

As shown in FIG. 3 , in the voltage regulating circuit 10 , the first transistor M 1 is a field effect transistor. For example, the first transistor M 1 can be a PMOS transistor, the first end of the first transistor M 1 is a source, the second end of the first transistor M 1 is a drain, and the third end of the first transistor M 1 is a gate. The voltage converting circuit 16 includes a first resistor R 1 and a second resistor R 2 . One end of the first resistor R 1 is coupled to the inverting input end of the first operational amplifier OP 1 , and the other end of the first resistor R 1 is coupled to the second end of the first transistor M 1 . One end of the second resistor R 2 is coupled to the inverting input end of the first operational amplifier OP 1 , and the other end of the second resistor R 2 is coupled to a reference voltage, such as a grounding voltage. In FIG. 3 , the circuit configuration consisted of the first operational amplifier OP 1 , the first resistor R 1 and the second resistor R 2 can be considered a non-inverting closed-loop amplifier. Thus, the voltage converting circuit 16 can have various converting factors by adjusting the resistances of the first resistor R 1 and the second resistor R 2 . For example, if the resistance of the first resistor R 1 is designed to be equal to the resistance of the second resistor R 2 , then the converting factor of the voltage converting circuit 16 is 2.

The calculation unit 32 in the control circuit 30 includes a second operational amplifier OP 2 . According to FIG. 3 , a non-inverting input end of the second operational amplifier OP 2 is coupled to the battery voltage VBAT through a third resistor R 3 and is also coupled to a reference voltage, such as a grounding voltage, through a fourth resistor R 4 . In addition, an inverting input end of the second operational amplifier OP 2 is coupled to the predetermined voltage VDSB through another third resistor R 3 and is also coupled to an output end of the second operational amplifier OP 2 through another fourth resistor R 4 . Moreover, the first input signal Vramp MAX is outputted from the output end of the second operational amplifier OP 2 .

The comparison unit 34 in the control circuit 30 includes a comparator COM. According to FIG. 3 , a first input end of the comparator COM, such as a non-inverting input end, is coupled to the output end of the second operational amplifier OP 2 , and a second input end of the comparator COM, such as an inverting input end, is coupled to the second input signal Vramp. The comparator COM compares the first input signal Vramp MAX and the second input signal Vramp, accordingly generates a second control signal VC, and transmits this second control signal VC to the signal selecting circuit 20 .

The signal selecting circuit 20 includes a second transistor M 2 and a third transistor M 3 . The second end of the second transistor M 2 and the second end of the third transistor M 3 are coupled together to receive the second input signal Vramp, and the first end of the second transistor M 2 and the first end of the third transistor M 3 are coupled together and further coupled to the non-inverting input end of the first operational amplifier OP 1 . In addition, the signal selecting circuit 20 further includes a fourth transistor M 4 and a fifth transistor M 5 . The second end of the fourth transistor M 4 and the second end of the fifth transistor M 5 are coupled together to receive the first input signal Vramp MAX , and the first end of the fourth transistor M 4 and the first end of the fifth transistor M 5 are coupled together and further coupled to the non-inverting input end of the first operational amplifier OP 1 . Moreover, the third end of the second transistor M 2 and the third end of the fifth transistor M 5 are coupled together to receive the second control signal VCNT, and the third end of the third transistor M 3 and the third end of the fourth transistor M 4 are coupled together to receive the second control signal VC that has been inverted by an inverter INV.

In this embodiment, the second transistor M 2 and the fourth transistor M 4 can be first-type field effect transistors, such as NMOS transistors, and the third transistor M 3 and the fifth transistor M 5 can be second-type field effect transistors, such as PMOS transistors. The first ends of the second transistor M 2 , the third transistor M 3 , the fourth transistor M 4 and the fifth transistor M 5 are drains, the second ends of the second transistor M 2 , the third transistor M 3 , the fourth transistor M 4 and the fifth transistor M 5 are sources, and the third ends of the second transistor M 2 , the third transistor M 3 , the fourth transistor M 4 and the fifth transistor M 5 are gates. For ease of illustration, in FIG. 3 , the first ends of the first transistor M 1 , the second transistor M 2 , the third transistor M 3 , the fourth transistor M 4 and the fifth transistor M 5 are marked by {circumflex over (1)}, the second ends of the first transistor M 1 , the second transistor M 2 , the third transistor {circumflex over (2)}, the fourth transistor M 4 and the fifth transistor M 5 are marked by 0, and the third ends of the first transistor M 1 , the second transistor M 2 , the third transistor M 3 , the fourth transistor M 4 and the fifth transistor M 5 are marked by {circumflex over (3)}.

According to the above, the circuit configuration consisted of the second transistor M 2 , the third transistor M 3 , the fourth transistor M 4 and the fifth transistor M 5 can be considered two CMOS transmission gates. As mentioned, after the comparator COM compares the first input signal Vramp MAX and the second input signal Vramp, it will generate a second control signal VC and transmit this second control signal VC to the signal selecting circuit 20 . For example, when the second input signal Vramp is larger than or equal to the first input signal Vramp MAX , the second control signal VC coming from the comparator COM is at low level and the inverted second control signal VC is at high level. As a result, the second transistor M 2 and the third transistor M 3 are turned off and the fourth transistor M 4 and the fifth transistor M 5 are turned on, such that the first input signal Vramp MAX is transmitted to the non-inverting input end of the first operational amplifier OP 1 through the fourth transistor M 4 and the fifth transistor M 5 . Briefly, the first input signal Vramp MAX is chosen as the first control signal VCNT.

On the other hand, when the second input signal Vramp is smaller than the first input signal Vramp MAX , the second control signal VC from the comparator COM is at high level and the inverted second control signal VC is at low level. As a result, the second transistor M 2 and the third transistor M 3 are turned on and the fourth transistor M 4 and the fifth transistor M 5 are turned off, such that the second input signal Vramp is transmitted to the non-inverting input end of the first operational amplifier OP 1 through the second transistor M 2 and the third transistor M 3 . Briefly, the second input signal Vramp is chosen as the first control signal VCNT.

Alternatively, when the second input signal Vramp is larger than or equal to the first input signal Vramp MAX , the second control signal VC can be designed to be at high level, and when the second input signal Vramp is smaller than the first input signal Vramp MAX , the second control signal VC can be designed to be at low level. In this case, the third transistor M 3 and the fifth transistor M 5 should be first-type field effect transistors, such as NMOS transistors, and the second transistor M 2 and the fourth transistor M 4 should be second-type field effect transistors, such as PMOS transistors.

In this embodiment, no matter which input signal is chosen as the first control signal VCNT, the first input signal Vramp MAX or the second input signal Vramp, and then is transmitted to the first operational amplifier OP 1 driven by an enable signal TX_EN, the first control signal VCNT can be converted to an appropriate supply voltage VCC through the first operational amplifier OP 1 , the first resistor R 1 and the second resistor R 2 to the output end of the power control circuit.

FIG. 5 shows a curve diagram showing the power control result of a traditional power control circuit and the power control result of the power control circuit provided by the present disclosure. In FIG. 5 , the dotted line is a power control curve of a traditional power control circuit and the solid line is a power control curve of the power control circuit provided by each above mentioned embodiment.

As known, the power control curve determines the relationship between the supply voltage provided by the power control circuit and the input signal received by the power control circuit. As mentioned, the power control circuit provided by the present disclosure calculates the first input signal Vramp MAX which is the maximum value of the input signal that this power control circuit can support according to the varying battery voltage VBAT. Then, when the second input signal Vramp which is sent from the baseband circuit of the mobile phone is larger than or equal to the first input signal Vramp MAX , the power control circuit provided by the present disclosure chooses the first input signal Vramp MAX as the input signal. Thus, it can be found in FIG. 5 that, compared with the power control curve of the traditional power control circuit, the power control curve of the power control circuit provided by the present disclosure has a better linearity. In other words, the power control curve of the power control circuit provided by the present disclosure is more predictable.

In the present disclosure, when the input signal of the power control circuit is the maximum value of the input signal that the power control circuit can support, which is the first input signal Vramp MAX , the power control circuit outputs the maximum supply voltage that can be supported by the current battery voltage VBAT as expected, which is marked as VCC MAX in FIG. 5 . Thus, the power control curve of the power control circuit provided by the present disclosure, which is the solid line, has a better linearity. However, for the traditional power control circuit, a feedback circuit is additionally configured at the output end of the power control circuit for determining whether the voltage required by the baseband circuit of the mobile phone can be supported by the current battery voltage VBAT. Thus, when the input signal is large and even approaching the maximum value of the input signal that the current battery voltage VBAT can support, it is hard for the traditional power control circuit to directly and immediately output the maximum supply voltage VCC MAX . Thus, the power control curve of the traditional power control circuit, which is the dotted line, has a low linearity. In other words, the power control curve of the traditional power control circuit in FIG. 5 is low linearity and hard to predict.

One Embodiment of the Power Control Method

The power control method in this embodiment can be applied to the power control circuit of each above embodiment.

Referring to FIG. 4A , a flow chart of a power control method according to one embodiment of the present disclosure is shown. The power control method mainly includes the following steps. In step S 410 , the voltage regulating circuit receives a first control signal, and outputs a supply voltage to an output end of the power control circuit according to the first control signal. In step S 420 , the signal selecting circuit receives a first input signal, a second input signal and a second control signal. In step S 430 , the signal selecting circuit chooses one of the first input signal and the second input signal as the first control signal according to the second control signal, and outputs the first control signal.

In addition, referring to FIG. 4B , a flow chart of a power control method according to another embodiment of the present disclosure is shown.

Before step S 410 , the first control signal is obtained mainly by the following steps. In step S 407 , the control circuit receives a predetermined voltage and the second input signal. In step S 408 , the control circuit calculates the first input signal according to the predetermined voltage and the power supply voltage, such as the battery voltage of a portable electronic device or a mobile phone, and outputs the first input signal. In step S 409 , the control circuit outputs the second control signal according to the first input signal and the second input signal for controlling the signal selecting circuit to choose one of the first input signal and the second input signal as the first control signal.

FIG. 4C shows a flow chart illustrating how to generate the second control signal in a power control method according to FIG. 4B . As shown in FIG. 4C , the second control signal mentioned in step S 409 is obtained mainly by the following steps. In step S 409 a , the calculation unit calculates the first input signal according to the battery voltage and the predetermined voltage. It should be noted that the first input signal equals to the quotient which is the difference of the battery voltage and the predetermined voltage divided by a converting factor of the voltage converting circuit, and that the predetermined voltage is a turn-on voltage of the first transistor. In step S 409 b , the comparison unit compares the first input signal and the second input signal, accordingly generates the second control signal, and transmits this second control signal to the signal selecting circuit.

FIG. 4D shows a flow chart illustrating how to choose one of the first input signal and the second input signal as the first control signal according to the second control signal in a power control method according to FIG. 4B . As shown in FIG. 4D , step S 430 is implemented mainly by the following steps. In step S 430 a , the comparison unit determines whether the second input signal is larger than or equal to the first input signal. In step S 430 b , when the second input signal is larger than or equal to the first input signal, the first input signal is chosen as the first control signal. This first control signal is converted to a supply voltage through the first operational amplifier and the voltage converting circuit, and then this supply voltage is transmitted to the output end of the power control circuit. In step S 430 c , when the second input signal is smaller than the first input signal, the second input signal is chosen as the first control signal. This first control signal is converted to a supply voltage through the first operational amplifier and the voltage converting circuit, and then this supply voltage is transmitted to the output end of the power control circuit.

To sum up, the power control circuit provided by the present disclosure tries to provide a stable supply voltage no matter the control signal which is sent from the baseband circuit of a portable electronic device varies. The advantage of the power control circuit provided by the present disclosure is that, when the control signal which is sent from the baseband circuit of a portable electronic device is larger than or equal to a maximum voltage calculated according to the varying battery voltage of the mobile device, the power control circuit provided by the present disclosure always outputs this maximum voltage as the supply voltage. In this manner, even when the control signal which is sent from the baseband circuit of a portable electronic device may be large, it is less likely for the power control circuit provided by the present disclosure to work abnormally because of the insufficient battery voltage of the portable electronic device.

The descriptions illustrated supra set forth simply the preferred embodiments of the present disclosure; however, the characteristics of the present disclosure are by no means restricted thereto. All changes, alterations, or modifications conveniently considered by those skilled in the art are deemed to be encompassed within the scope of the present disclosure delineated by the following claims.