Circuit board and method for making the same

The subject matter herein generally relates to a circuit board, and a method for making the circuit board.

Circuit board includes a copper conductive circuit layer, and a plating film attached to the copper conductive circuit layer. The plating film includes a nickel layer attached to the copper conductive circuit layer, and a gold layer attached to the nickel layer. The plating film can have fractured surface. Sometimes the fractured surface exposes the copper conductive circuit layer, the nickel layer, and the gold layer. When the fractured surface is exposed in a damp H 2 S gas atmosphere, the copper will react with the H 2 S as follows: H 2 S H + +HS − , Cu+O 2 →Cu 2+ O, Cu 2+ O+H 2 S→Cu 2 S↓+H 2 O, Cu 2+ O+O 2 →CuO, CuO+H 2 S→CuS↓+H 2 O, thus the copper conductive circuit layer will be corroded. Galvanic cell effect can occur at the interface of gold and nickel, and an interface of nickel and copper, to cause the nickel layer and the copper conductive circuit layer to corrode, thus the gold layer will fall off. Thus a new circuit board in which the nickel layer and the copper conductive circuit layer cannot be corroded is preferred.

Implementations of the present disclosure will now be described, by way of example only, with reference to the attached figures.

FIG. 1 is a flowchart of a method for making a circuit board in accordance with an exemplary embodiment.

FIG. 2 is a diagrammatic view of a copper clad laminate of the circuit board of FIG. 1 .

FIG. 3 is a diagrammatic view of a first intermediate product for the circuit board of FIG. 1 .

FIG. 4 is a diagrammatic view of the first intermediate product of the circuit board of FIG. 3 with a dry film.

FIG. 5 is a diagrammatic view of the dry film of FIG. 4 being exposed in light.

FIG. 6 is a diagrammatic view of the first intermediate product of FIG. 3 with a dry film pattern layer.

FIG. 7 is a diagrammatic view of a plating film attached to an exposing area of the second surface of FIG. 6 .

FIG. 8 is a diagrammatic view of a second intermediate product for the circuit board of FIG. 1 .

FIG. 9 is a diagrammatic view of the second intermediate product of FIG. 8 with a through hole.

FIG. 10 is a diagrammatic view of adhesive sheet attached to the second intermediate product of FIG. 9 .

FIG. 11 is a diagrammatic view of the adhesive sheet and the second intermediate product of FIG. 10 being pressed together.

FIG. 12 is a diagrammatic view of a circuit board in accordance with an exemplary embodiment.

It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale, and the proportions of certain parts may be exaggerated to illustrate details and features of the present disclosure better. The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings, in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.”

The term “comprising” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.

FIG. 1 illustrates a flowchart of a method for making a circuit board 100 (shown in FIG. 12 ) in accordance with an exemplary embodiment. The exemplary method is provided by way of example, as there are a variety of ways to carry out the method. Each block shown in the figure represents one or more processes, methods, or subroutines, carried out in the exemplary method. Furthermore, the illustrated order of blocks is by example only and the order of the blocks can change. Additional blocks may be added or fewer blocks may be utilized, without departing from this disclosure. The exemplary method may begin at block 101 .

At block 101 , referring to FIG. 2 , a copper clad laminate 201 is provided. The copper clad laminate 201 includes a substrate 10 , and at least one copper layer 20 attached to the substrate 10 . The substrate 10 includes at least one first surface 11 . Each copper layer 20 is attached to a first surface 11 .

In at least one exemplary embodiment, the substrate 10 is a polyimide substrate.

At block 102 , referring to FIG. 3 , the copper layer 20 is made into a conductive circuit layer 21 , thus a first intermediate product 202 is achieved.

The first intermediate product 202 includes the substrate 10 and at least one conductive circuit layer 21 attached to the substrate 10 . A portion of the first surface 11 is exposed through the conductive circuit layer 21 . The conductive circuit layer 21 includes a second surface 211 away from the substrate 10 .

In at least one exemplary embodiment, a method for making the copper layer 20 into a conductive circuit layer 21 is by etching or laser cutting.

At block 103 , referring to FIG. 6 , a dry film pattern layer 203 is formed on the first intermediate product 202 . The dry film pattern layer 203 covers the exposed portion of the first surface 11 and a portion of the second surface 211 .

The portion of the second surface 211 covered by the dry film pattern layer 203 is a covering area 2111 . The other portion of the second surface 211 which has not been covered by the dry film pattern layer 203 is an exposing area 2112 .

In at least one exemplary embodiment, the dry film pattern layer 203 is formed by the following steps:

Referring to FIG. 4 , a dry film 204 is attached to the first intermediate product 202 . The dry film 204 covers the exposed portion of the first surface 11 and the second surface 211 of the conductive circuit layer 21 .

Referring to FIG. 5 , a light screen 205 is provided. The light screen 205 defines at least one light hole 2051 . The light screen 205 is placed at a side of the dry film 204 away from the first intermediate product 202 , and the light hole 2051 is aligned with the area of the dry film 204 which needs to be exposed to the light. Light is irradiated from a side of the light screen 205 away from the dry film 204 , and a portion of the light passes through the light hole 2051 to strike the area of the dry film 204 needing to be exposed to the light.

Referring to FIG. 6 , the other area of the dry film 204 which has not been exposed to the light is removed, thus a dry film pattern layer 203 attached to the first intermediate product 202 is achieved.

At block 104 , referring to FIG. 7 , at least two plating films 30 are formed on the exposing area 2112 of the second surface 211 .

In at least one exemplary embodiment, the plating film 30 includes a nickel layer 31 attached to the exposing area 2112 of the second surface 211 , and a gold layer 32 attached to a surface of the nickel layer 31 away from the second surface 211 .

At block 105 , referring to FIG. 8 , the dry film pattern layer 203 is removed, thus a second intermediate product 206 is achieved.

The second intermediate product 206 includes the substrate 10 , at least one conductive circuit layer 21 attached to the substrate 10 , and at least two plating films 30 attached to the second surface 211 of the conductive circuit layer 21 . The conductive circuit layer 21 has an exposing surface 210 which is not attached with the substrate 10 and the plating film 30 .

The plating film 30 includes a third surface 301 away from the conductive circuit layer 21 , and at least one side surface 302 . The side surface 302 connects the third surface 301 and the second surface 211 of the conductive circuit layer 21 .

At block 106 , referring to FIG. 9 , at least one through hole 40 is defined on the second intermediate product 206 . Each through hole 40 is located between two adjacent plating films 30 , in other words, an opening of each through hole 40 is located between two adjacent plating films 30 . The through hole 40 passes through the substrate 10 and the at least one conductive circuit layer 21 .

The through hole 40 includes a side wall 41 .

In at least one exemplary embodiment, a method for defining the through hole 40 is by etching or laser cutting.

At block 107 , referring to FIG. 10 , at least one adhesive sheet 207 is provided, and attached to a side of the second intermediate product 206 . The adhesive sheet 207 includes at least one opening 2071 . Each opening 2071 is aligned with the third surface 301 of a plating film 30 . The other portion of the adhesive sheet 207 is aligned with the exposed portion of the first surface 11 , with an area of the surface of the conductive circuit layer 21 away from the substrate 10 not attached with the plating film 30 , and with the through hole 40 .

At block 108 , referring to FIG. 11 , the at least one adhesive sheet 207 and the second intermediate product 206 are pressed together, to have the at least one adhesive sheet 207 firmly attached to the second intermediate product 206 . The at least one adhesive sheet 207 is thus changed to a covering film 50 , and thereby a third intermediate product 208 is achieved. The covering film 50 covers the portion of the first surface 11 exposed through the conductive circuit layer 21 , the exposing surface 210 of the conductive circuit layer 21 , and the side surface 302 of the plating film 30 . The covering film 50 fully fills the through hole 40 . The third surface 301 includes a center area 3011 , and an edge area 3012 placed around the center area 3011 and connected with the side surface 302 .

In at least one exemplary embodiment, a size of the opening 2071 is equal to or smaller than the size of the center area 3011 of the third surface 301 , thus the edge area 3012 of the third surface 301 can be covered by the covering film 50 . The covering film 50 can firmly wrap the plating film 30 and the conductive circuit layer 21 . The edge area 3012 of the third surface 301 covered by the covering film 50 can also increase the combinational strength between the covering film 50 , the plating film 30 , and the conductive circuit layer 21 , to prevent easy detachment of the covering film 50 .

In at least one exemplary embodiment, a length of the edge area 3012 in a direction from the edge of the third surface 301 toward the center of the third surface 301 is bigger than 0 and less than or equal to 0.23 mm.

At block 109 , referring to FIG. 12 , the third intermediate product 208 is die-cut to remove a portion of the unattached substrate 10 (i.e. not attached with the conductive circuit layer 21 ), the covering film 50 attached to the portion of the unattached substrate 10 (i.e. not attached with the conductive circuit layer 21 ), and a portion of the covering film 50 infilling the through hole 40 . A portion of the covering film 50 attached to the side wall 41 of the through 40 is left to remain. Thus a circuit board 100 is achieved.

In at least one exemplary embodiment, a thickness of the covering film 50 attached to the side wall 41 is equal to or bigger than 0.05 mm.

FIG. 12 illustrates a circuit board 100 used in an electronic device, such as a computer, a phone, a smart watch, or an electronic reader. In at least one exemplary embodiment, the circuit board 100 is a printed circuit board. The circuit board 100 includes a substrate 10 , at least one conductive circuit layer 21 attached to the substrate 10 , and at least one plating film 30 attached to a surface of the conductive circuit layer 21 away from the substrate 10 .

The conductive circuit layer 21 has an exposing surface 210 which is not attached with the substrate 10 and the plating film 30 .

The plating film 30 includes a third surface 301 away from the conductive circuit layer 21 , and at least one side surface 302 connecting the third surface 301 and the conductive circuit layer 21 .

In at least one exemplary embodiment, the plating film 30 includes a nickel layer 31 attached to a surface of the conductive circuit layer 21 away from the substrate 10 , and a gold layer 32 attached to a surface of the nickel layer 31 away from the conductive circuit layer 21 .

The circuit board 100 defines at least one through hole 40 . The through hole 40 passes through the substrate 10 , through the conductive circuit layer 21 , and through the plating film 30 . The through hole 40 has a side wall 41 .

The circuit board 100 further includes a covering film 50 . The covering film 50 covers the exposing surface 210 of the conductive circuit layer 21 , the side surface 302 of the plating film 30 , and the side wall 41 of the through hole 40 . Thus the conductive circuit layer 21 and the side surface 302 of the plating film 30 are covered by the covering film 50 . The conductive circuit layer 21 and the plating film 30 are thus isolated from any atmosphere, and cannot be corroded.

In at least one exemplary embodiment, a thickness of the covering film 50 attached to the side wall 41 is equal to or bigger than 0.05 mm.

The substrate 10 includes at least one first surface 11 . The conductive circuit layer 21 is attached to the first surface 11 . A portion of the first surface 11 is exposed through the conductive circuit layer 21 . The portion of the first surface 11 exposed through the conductive circuit layer 21 is covered by the covering film 50 .

The third surface 301 includes a center area 3011 , and an edge area 3012 placed around the center area 3011 and connected with the side surface 302 . The covering film 50 further covers the edge area 3012 of the third surface 301 .

In at least one exemplary embodiment, a length of the edge area 3012 in a direction from the edge of the third surface 301 toward the center of the third surface 301 is bigger than 0 and less than or equal to 0.23 mm.

It is to be understood, even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only; changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the plain meaning of the terms in which the appended claims are expressed.