Unidirectional ring mitigation in a voltage converter
Granted 3 Aug 2021 · 5 office actions
Assignee: Texas Instruments
Law firm: Law firm · Log in to unlock
Attorney: Attorney · Log in to unlock
Inventors: Sujan K. Manohar, Jeffrey Morroni, Michael Lueders, Yogesh Ramadass +1 · Examiner: Emily P Pham · AU 2837 · TC 2800
Life of the application
22 dated eventsAbstract
A system includes a high side transistor switch coupled to a first voltage node and a low side transistor switch coupled to the high side transistor switch at a switch node. The system further includes a unidirectional decoupling capacitor circuit including a capacitive component. The unidirectional decoupling capacitor circuit is coupled between the first voltage node and a common potential. Responsive to a voltage on the first voltage node being more than a threshold greater than an input voltage to the first voltage node, the unidirectional decoupling capacitor circuit is configured to sink current from the first voltage node to the capacitive component. The capacitive component can therefore be charged, with the charge used to subsequently power a load.
Description
7 parts›RELATED APPLICATIONS
This application claims priority to U.S. Provisional Application No. 62/483,538, filed Apr. 10, 2017, titled “Unidirectional Decoupling Capacitor Circuit for DC-DC Power Converters,” which is incorporated herein by reference.
›BACKGROUND
With the proliferation of portable devices such as smart phones, tablets, notebook computers, etc., integrated power management circuits in such devices control the various voltages used by the devices. A direct current (DC)-to-DC converter, for example converts one DC voltage level to another DC voltage level. Some devices have a need for more than one DC voltage and thus DC-to-DC converters that can produce multiple different DC voltages may be beneficial. Some voltage converters are switching voltage converters in which a transistor switches on and off to produce a regulated output voltage. Voltage ringing may occur during a transistor's transition from an off state to an on state, or vice versa, due to parasitic supply loop inductance between the active circuit of an integrated circuit (IC) and an external decoupling capacitor. That is, turning a transistor on or off may cause a voltage on a node within the voltage converter to ring. Voltage ringing poses reliability challenges to the system.
›SUMMARY
In some embodiments, a system includes a high side transistor switch coupled to a first voltage node and a low side transistor switch coupled to the high side transistor switch at a switch node. The system further includes a unidirectional decoupling capacitor circuit including a capacitive component. The unidirectional decoupling capacitor circuit is coupled between the first voltage node and a common potential. Responsive to a voltage on the first voltage node being more than a threshold greater than an input voltage to the first voltage node, the unidirectional decoupling capacitor circuit is configured to sink current from the first voltage node to the capacitive component. The capacitive component can therefore be charged, with the charge used to subsequently power a load.
In another embodiment, a voltage converter includes a high side transistor switch coupled to a first voltage node, a low side transistor switch coupled to the high side transistor switch at a switch node, an output inductor connected to the switch node, and an output capacitor connected between the output inductor and a common potential. The voltage converter further includes a series combination of a diode and a capacitive component connected between the first voltage node and the common potential.
In yet another embodiment, a system includes a high side transistor switch coupled to a first voltage node, a low side transistor switch coupled to the high side transistor switch at a switch node, and a unidirectional decoupling circuit including a charge storage component. The unidirectional decoupling circuit is coupled between the first voltage node and a common potential. Responsive to a voltage on the first voltage node being more than a threshold greater than an input voltage to the first voltage node, the unidirectional decoupling circuit is configured to sink current from the first voltage node to charge the charge storage component.
›BRIEF DESCRIPTION OF THE DRAWINGS
For a detailed description of various examples, reference will now be made to the accompanying drawings in which:
FIG. 1 shows an example of a voltage converter including a unidirectional decoupling capacitor circuit;
FIG. 2 shows an illustrative waveform of a voltage within the voltage converter; and
FIG. 3 shows an example of an implementation of a diode in the unidirectional decoupling capacitor circuit.
›DETAILED DESCRIPTION · 1 of 3
Electrical systems may include voltage converters that convert an input voltage of one voltage level to a different voltage level. Some voltage converters include a high side transistor switch coupled to a low side transistor switch. Energy stored in parasitic inductance caused by wire bonds to the voltage converter, circuit board traces, etc. may cause ringing when the high side transistor switch is switched on or off. Such ringing may cause voltage/current stress on the transistor switch which may cause a power transistor to be sized appropriately to dissipate an anticipated amount of ringing energy, or may require higher voltage rated switches which may occupy more area than lower voltage rated switches. A larger transistor switch, however, occupies more area, costs more and is less efficient than a smaller transistor. An alternative or additional approach to address the ringing problem may be to drive the high and low side transistors more slowly, that is, causing the transistor switches to change between on and off states more slowly. While adequate to reduce ringing, slowing down the transition times for the transistor switches unfortunately extends the period of time during which the transistor switch has a non-zero voltage across its drain and source terminals while also flowing a current through the transistor (sometimes referred to as the “IV overlap” or transitional losses). Power is dissipated by the transistor during IV overlap, which reduces the overall efficiency of the converter.
In accordance with various embodiments, a voltage converter includes a high side transistor switch coupled to a first voltage node, and a low side transistor switch coupled to the high side transistor switch at a switch node. The converter also includes a unidirectional decoupling capacitor circuit that includes a charge storage device. In some embodiments, the charge storage device is a capacitive component (e.g., a capacitor). The unidirectional decoupling capacitor circuit is coupled between the first voltage node and a common potential (e.g., ground). Responsive to a voltage on the first voltage node being more than a threshold greater than an input voltage to the power converter circuit (e.g., when the voltage on the first voltage node begins to ring), the unidirectional decoupling capacitor circuit is configured to sink current from the first voltage node to the capacitive component. The capacitive component begins to charge thereby reducing the magnitude of the ringing voltage on the first voltage node. The unidirectional decoupling capacitor circuit may include a diode that prevents the capacitive component from discharging through the high side switch. Instead, the charge on the capacitive component can be used to provide power to another load within the system that needs to be powered.
FIG. 1 shows an example of an electrical system 100 that includes a buck voltage converter 110 , which generates an output voltage Vout based on an input voltage Vin. In some embodiments (such as for buck converters), Vout is a voltage (e.g., 1.2V) that is lower in magnitude than Vin (e.g., 5V). In other cases, the voltage converter may be a buck-boost converter in which Vout is greater than Vin. The voltage converter 110 may be coupled to a load 160 and Vout is used to power the load. In some cases, the electrical system 100 is a battery-operated device such as a smart phone, a tablet computer, etc. and the load comprises one or more circuits within the device such as a processor, memory, a display, etc. In various embodiments, the input and output voltages Vin and Vout comprise DC voltages.
The illustrative buck voltage converter 110 comprises a high side transistor switch S 0 , a low side transistor switch S 1 , an inductor L 1 , a load capacitor CL, a controller 114 , and a unidirectional decoupling capacitor circuit 125 . Each transistor switch S 0 and S 1 comprises a metal oxide semiconductor field effect transistor (MOSFET), although other types of transistors can be used as well. The high and low side transistor switches S 0 and S 1 are coupled together at a node designated in the example of FIG. 1 as the switch node (VSW). Inductor L 1 couples to the switch node VSW and to load capacitor CL. The node 118 connecting the inductor L 1 to the load capacitor CL provides the output voltage Vout to the load 160 .
The controller 114 may comprise a pulse width modulation (PWM) controller which, through control signals 115 and 116 , controls the high and low side transistor switches S 0 and S 1 , respectively. The controller 114 is configured to turn on one but not both of the transistor switches S 0 and S 1 at any point in time, and at times the controller 114 causes both transistors to be off. When high side transistor switch S 0 is on (and S 1 is off), the voltage on VSW is high (i.e., Vin). Conversely, when low side transistor switch S 1 is on (and S 0 is off), the voltage on VSW is low. Thus, the voltage on VSW toggles between high and low as the transistor switches S 0 and S 1 are toggled on and off by the controller 114 . The inductor L 1 causes the output voltage Vout on node 118 to be approximately the average voltage on VSW. The input voltage Vin is provided to the voltage converter. By controlling the duty cycle of the transistor switches by the controller 114 , the output voltage Vout can be tightly controlled relative to the input voltage Vin.
At least some of the components shown in the example of FIG. 1 are provided on a common semiconductor die. In the example circuit of FIG. 1 , the unidirectional decoupling capacitor circuit 125 , high side transistor switch S 0 , and low side transistor switch S 1 are fabricated on a common semiconductor die 120 . The controller 114 may not be on the die 120 in some embodiments, but can be fabricated on die 120 in other embodiments. The unidirectional decoupling capacitor circuit 125 is integrated into the same die (i.e., chip) that contains the high and low side transistor switches. In other embodiments, the decoupling capacitor circuit 125 is not integrated into the same die as the high and low side transistor switches, but is provided within the same IC package as the die containing the high and low side transistor switches. The semiconductor die 120 may be mounted to a printed circuit board and electrically connected to pads on the printed circuit board by way of, for example, wire bonds. Such bonds and associated traces on the printed circuit board have parasitic supply loop inductance that is represented in the circuit schematic of FIG. 1 as L 0 . The node between the parasitic inductor L 0 and the high side transistor switch S 0 is designated as the input auxiliary node (VIN_AUX).
›DETAILED DESCRIPTION · 2 of 3
In the example of FIG. 1 , the unidirectional decoupling capacitor circuit 125 is connected between the VIN_AUX node and a common potential (e.g., ground). The illustrative unidirectional decoupling capacitor circuit 125 comprises a diode D 0 and a capacitor C 1 . The diode D 0 and capacitor C 1 are connected in series. Capacitor C 1 may be on the die 120 as shown, or on a separate die or circuit board. As shown in FIG. 1 , the anode of diode D 0 may be connected to node VIN_AUX and the cathode to one plate of capacitor C 1 with the capacitor's other plate connected to the common potential. Alternatively, the diode D 0 and capacitor C 1 can be connected in series in the opposite order, that is, capacitor C 1 connected to VIN_AUX with the anode of the diode D 0 connected to the capacitor and the diode's cathode connected to the common potential.
The capacitor C 1 also may be implemented as a MOSFET with its drain shorted to its source and one capacitor plate comprising the gate and the opposing capacitor plate comprising the drain-source structure. Alternatively, the capacitor C 1 may be implemented as other types of pair of parallel plates besides a MOSFET. As noted above, capacitor C 1 can be a discrete capacitor integrated within the IC package, or may be formed on the same die 120 as the switches S 0 and S 1 . In general, the capacitor C 1 is any suitable type of capacitive component, and diode D 0 is any suitable type of diode component that permits current to flow only in one direction.
The operation of the voltage converter 110 of the example of FIG. 1 is as follows. The controller 114 controls the on and off states of the high and low side transistor switches S 0 and S 1 . When the high side transistor switch S 0 is off and the low side transistor switch S 1 is on, the switch node VSW is equal or approximately equal to 0 (e.g., the common potential). The controller 114 then turns off S 1 . At that point in time, both transistor switches S 0 and S 1 are off thereby creating a “dead time” which avoids simultaneous conduction of both the high and low side transistor switches S 0 and S 1 from Vin to the common potential (e.g., ground). During the dead time, the voltage on the switch node VSW may drop by approximately 0.7V due to the body diode internal to transistor switch S 1 turning on to supply current to the load 160 .
When transistor switch S 0 is not in the process of being turned on or off, and thus is either fully on or fully off, the current through the parasitic supply loop inductor L 0 is constant and thus not changing (di/dt=0). With the current through the parasitic inductor L 0 being constant, the voltage drop across the parasitic inductor L 0 is 0, which means the voltage on the VIN_AUX node is equal to Vin.
The controller 114 asserts control signal 115 to turn on the high side transistor switch S 0 , while S 1 remains off. When high transistor switch S 0 begins to turn on, the current through the inductor begins to increase which causes a voltage drop to be generated across the inductor. The voltage drop is given by L*di/dt and may approximately equal Vin. FIG. 2 shows a portion of a waveform illustrating the VIN_AUX voltage. At 200 , the high side transistor switch S 0 is off and the voltage on the VIN_AUX node is equal to Vin. Once the high side transistor switch S 0 begins to turn on, the voltage on VIN_AUX drops to approximately 0 V as shown at 202 . At this point, the voltage on both VIN_AUX and the switch node VSW are approximately the same. The high side transistor switch S 0 continues to turn on and does so with zero voltage switching (ZVS) meaning that the switch S 0 turns on with the voltage drop across its drain to source terminals being equal to or approximately 0V. Thus, the parasitic supply loop inductor L 0 advantageously permits zero voltage switching for the high side transistor switch S 0 .
The diode D 0 of the unidirectional decoupling capacitor circuit 125 conducts when its anode is at least approximately 0.6V greater than its cathode. When the voltage on the VIN_AUX node dips to approximately 0 V at 202 in FIG. 2 , the anode of diode D 0 also drops thereby preventing diode D 0 from turning on and causing capacitor C 1 to be electrically disconnected from S 0 and from the VIN_AUX node. This operating state further facilitates zero voltage switching for S 0 . Otherwise, if the capacitor C 1 had been electrically connected to S 0 and without the reverse bias state of the diode, the voltage on the VIN_AUX node would have been equal to the capacitor voltage.
However, when the voltage on VIN_AUX begins to ring, the voltage on VIN_AUX (and thus on D 0 's anode) may increase to a level that is more than 0.6V greater than the diode's cathode. An example of that point is shown at 210 in FIG. 2 . When the diode D 0 turns on due to the ringing, current from the VIN_AUX node flows through the diode D 0 to the capacitor C 1 and begins to charge the capacitor, and does so until the voltage on the VIN_AUX node drops too low for the diode D 0 to remain on. As such, charge from the VIN_AUX node is used to charge the capacitor C 1 , which reduces the magnitude of the ringing voltage itself on the VIN_AUX node. Further, with the ringing voltage on the VIN_AUX node being reduced due to the use of the unidirectional decoupling capacitor circuit 125 , the magnitude of the ringing voltage on the switch node VSW also is beneficially reduced.
When S 0 is subsequently turned off by the controller 114 , energy stored in parasitic inductor L 0 causes overshoot at 215 at the drain of the high side transistor switch S 0 . Diode D 0 then forward biases to store this energy in capacitor C 1 thereby curtailing the magnitude of the overshoot. The controller 114 then turns on low side transistor switch S 1 after the dead time, and the process repeats.
The charge stored in the capacitor C 1 should be removed to permit additional charge to be stored in the capacitor each cycle. The energy stored in the capacitor can be used to power an additional load (e.g., load 170 in FIG. 1 ). The load 170 powered in full or in part by the capacitor C 1 may comprise gate drives, control circuits, or other power management circuits such as low drop-out voltage regulators, etc. Load 170 may be an external load altogether from the module containing the voltage converter 110 .
›DETAILED DESCRIPTION · 3 of 3
FIG. 3 shows an example of an implementation of diode D 0 as a structure 250 . Structure 250 in this example is a MOSFET configured as a diode. A MOSFET configured as a diode enables diode D 0 to be realized in the IC and thereby eliminate any extra equivalent series inductance (ESL). D 0 can be realized using a similar voltage rated MOSFET as S 0 and sized appropriately to handle peak currents.
Certain terms are used throughout the following description and claims to refer to particular system components. Different companies may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to . . . .” Also, the term “couple” or “couples” is intended to mean either an indirect or direct wired or wireless connection. Thus, if a first device couples to a second device, that connection may be through a direct connection or through an indirect connection via other devices and connections. The above discussion is meant to be illustrative of the principles and various embodiments of the present invention. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications.
Claims as granted
19 claimsLog in to read the claims of this application.
Log in to unlockClassifications
4 codes- H02M3/155
- H02M3/06
- H02M3/158
- H02M1/14
Claim changes
SoonSee which claims were amended, added or cancelled during examination, with every added and removed word marked.
The published claims of this application are not paired with the granted ones in what we hold.
File wrapper
See the full prosecution history — every USPTO and applicant action on this file, in order.
Log in to unlockDocuments
Log in to open the documents of this file: the application as filed, every office action and response, the notice of allowance.
Log in to unlockChain of title
See the full assignment history — every owner this patent has passed through, with recordation dates and reel/frame numbers.
Log in to unlock