Operating method for a fingerprint sensing device and fingerprint sensing system

This non-provisional application claims the benefit under 35 U.S.C. § 119(e) to U.S. Provisional Application No. 62/368,172 filed on Jul. 29, 2016 and under 35 U.S.C. § 119(a) to Patent Application No. 105134353 filed in Taiwan on Oct. 24, 2016, all of which are hereby expressly incorporated by reference into the present application.

1. Field of the Invention

The present invention relates to a sensing device and, more particularly, to an operating method for a fingerprint sensing device and a fingerprint sensing system.

2. Description of the Related Art

U.S. Patent Publication No. 2015/0015537A1 (hereinafter reference application) discloses a fingerprint sensing system and a method therefor. With reference to FIGS. 3 and 5 of the reference application, a power supply circuit outputs a first power signal V H and a second power signal V L to a fingerprint sensing device. There is a difference value V CC between the first power signal V H and the second power signal V L (i.e. V CC =V H −V L ), and the difference value V CC is a constant value.

An objective of the present invention is to provide an operating method for a fingerprint sensing device and a fingerprint sensing system for increasing signal amplitude sensed by the fingerprint sensing device and reducing noise interference.

To achieve the foregoing objective, the fingerprint sensing device comprises multiple sensors, a high-voltage input terminal and a low-voltage input terminal, wherein the fingerprint sensing device obtains power through the high-voltage input terminal and the low-voltage input terminal to sense the multiple sensors, the method of the present invention comprises:

in a scan phase of the fingerprint sensing device, providing a first voltage to the high-voltage input terminal and providing a second voltage to the low-voltage input terminal to cause a first voltage difference between the high-voltage input terminal and the low-voltage input terminal, wherein the first voltage is greater than the second voltage; and

in a read phase of the fingerprint sensing device, providing a third voltage to the high-voltage input terminal and providing a fourth voltage to the low-voltage input terminal to cause a second voltage difference between the high-voltage input terminal and the low-voltage input terminal, wherein the third voltage is greater than the fourth voltage;

wherein the first voltage difference is greater than the second voltage difference.

The fingerprint sensing system of the present invention comprises:

a fingerprint sensing device comprising multiple sensors, a high-voltage input terminal and a low-voltage input terminal, wherein the fingerprint sensing device obtains power through the high-voltage input terminal and the low-voltage input terminal to sense the multiple sensors; and

a power supply circuit coupled to the high-voltage input terminal and the low-voltage input terminal of the fingerprint sensing device, and supplying a first voltage, a second voltage, a third voltage and a fourth voltage, wherein the first voltage is greater than the second voltage, and the third voltage is greater than the fourth voltage;

wherein in a scan phase of the fingerprint sensing device, the power supply circuit provides the first voltage to the high-voltage input terminal and provides the second voltage to the low-voltage input terminal to cause a first voltage difference between the high-voltage input terminal and the low-voltage input terminal;

in a read phase of the fingerprint sensing device, the power supply circuit provides the third voltage to the high-voltage input terminal and provides the fourth voltage to the low-voltage input terminal to cause a second voltage difference between the high-voltage input terminal and the low-voltage input terminal; and

the first voltage difference is greater than the second voltage difference.

According to the present invention, fingerprint sensing signals with higher signal amplitude can be acquired during the scan phase, and noise interference can be reduced during the read phase.

Other objectives, advantages and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.

FIG. 1 is a block diagram of a fingerprint sensing system in accordance with the present invention;

FIG. 2 is a waveform of a first embodiment of a first power signal and a second power signal in accordance with the present invention;

FIG. 3 is a functional block diagram of a first embodiment of the fingerprint sensing system in accordance with the present invention;

FIG. 4 is a timing sequence diagram of the fingerprint sensing system in FIG. 3 ;

FIG. 5 is a functional block diagram of a second embodiment of the fingerprint sensing system in accordance with the present invention;

FIG. 6 is a waveform of a second embodiment of a first power signal and a second power signal in accordance with the present invention;

FIG. 7 is a functional block diagram of a third embodiment of the fingerprint sensing system in accordance with the present invention;

FIG. 8 is a timing sequence diagram of the fingerprint sensing system in FIG. 7 ;

FIG. 9 is a waveform of a third embodiment of a first power signal and a second power signal in accordance with the present invention;

FIG. 10 is a functional block diagram of a fourth embodiment of the fingerprint sensing system in accordance with the present invention;

FIG. 11 is a functional block diagram of a fifth embodiment of the fingerprint sensing system in accordance with the present invention;

FIG. 12 is a timing sequence diagram of the fingerprint sensing systems in FIGS. 10 and 11 ;

FIG. 13 is a functional block diagram of a sixth embodiment of the fingerprint sensing system in accordance with the present invention;

FIG. 14 is a functional block diagram of a seventh embodiment of the fingerprint sensing system in accordance with the present invention; and

FIG. 15 is a timing sequence diagram of the fingerprint sensing systems in FIGS. 13 and 14 .

With reference to FIG. 1 , an embodiment of a fingerprint sensing system in accordance with the present invention comprises a fingerprint sensing device 10 and a power supply circuit 20 . The fingerprint sensing device 10 comprises multiple sensors 11 , a high-voltage input terminal SVDD and a low-voltage input terminal SGND. The fingerprint sensing device 10 obtains power through the high-voltage input terminal SVDD and the low-voltage input terminal SGND to sense the multiple sensors 11 . In one embodiment, each sensor 11 may be an independent electrode and the multiple sensors 11 are arranged in the form of a matrix. The power supply circuit 20 is coupled to the high-voltage input terminal SVDD and the low-voltage input terminal SGND to power the fingerprint sensing device 10 for sensing a fingerprint by the multiple sensors 11 . The power supply circuit 20 supplies a first power signal P 1 to the high-voltage input terminal SVDD of the fingerprint sensing device 10 , and a second power signal P 2 to the low-voltage input terminal SGND of the fingerprint sensing device 10 . Voltage variations of the high-voltage input terminal SVDD and the low-voltage input terminal SGND are respectively shown by the first power signal P 1 and the second power signal P 2 . The fingerprint sensing device 10 further comprises a sensing circuit (not shown) coupled to the multiple sensors 11 to sense the multiple sensors 11 . The operations of the fingerprint sensing device 10 include a scan phase and a read phase, wherein the scan phase and the read phase are performed alternately. During the scan phase, the multiple sensors 11 are driven and sensed to generate multiple fingerprint sensing signals. During the read phase, the fingerprint sensing signals are read out. In one embodiment, the fingerprint sensing signals may be read and an analog-to-digital conversion for the fingerprint sensing signals is performed during the read phase.

With reference to FIG. 2 , a first embodiment of an operating method for a fingerprint sensing system in accordance with the present invention is shown. P 1 −P 2 represents a voltage difference between the first power signal P 1 and the second power signal P 2 , i.e. the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND. During the scan phase of the fingerprint sensing device 10 , the power supply circuit 20 supplies a first voltage V 1 to the high-voltage input terminal SVDD and a second voltage V 2 to the low-voltage input terminal SGND. The first voltage V 1 is greater than the second voltage V 2 . In this time, the first power signal P 1 has a first voltage V 1 and the second power signal P 2 has a second voltage V 2 . There is a first voltage difference Vdx 1 (Vdx 1 =V 1 −V 2 ) between the high-voltage input terminal SVDD and the low-voltage input terminal SGND.

During the read phase of the fingerprint sensing device 10 , the power supply circuit 20 supplies a third voltage V 3 to the high-voltage input terminal SVDD and a fourth voltage V 4 to the low-voltage input terminal SGND. The third voltage V 3 is greater than the fourth voltage V 4 . In this time, the first power signal P 1 has a third voltage V 3 and the second power signal P 2 has a fourth voltage V 4 . There is a second voltage difference Vdx 2 (Vdx 2 =V 3 −V 4 ) between the high-voltage input terminal SVDD and the low-voltage input terminal SGND. The first voltage difference Vdx 1 is greater than the second voltage difference Vdx 2 . According to the foregoing description, the fingerprint sensing device 10 scans the multiple sensors 11 when the first voltage difference Vdx 1 is between the high-voltage input terminal SVDD and the low-voltage input terminal SGND. When reading the fingerprint sensing signals from the multiple sensors 11 , the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is lowered to the second voltage difference Vdx 2 . Thus, during the operation of the fingerprint sensing device 10 , the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is not a constant value. As such, operation of the present invention is different from that of the US patent publication no. 2015/0015537A1.

For example, the first voltage V 1 to the fourth voltage V 4 may be as follows:

the first voltage V 1= A*VDD

the second voltage V 2=( A− 1)* VDD

the third voltage V 3= B*VDD

the fourth voltage V 4=VGND

where A is a positive number or a positive integer greater than 1, in an embodiment is equal to 2; B is less than 1 (e.g. 0.8); VGND is a ground voltage externally supplied to the power supply circuit 20 and may be for example, zero; and VDD is an operating voltage externally supplied to the power supply circuit 20 . In this example, the first voltage difference Vdx 1 during the scan phase is equal to V 1 −V 2 =VDD, and the second voltage difference Vdx 2 during the read phase is equal to V 3 −V 4 =B*VDD.

In further, following embodiments and figures are provided to explain how the power supply circuit 20 supplies the first power signal P 1 and the second power signal P 2 to the fingerprint sensing device 10 .

With reference to FIG. 3 , the power supply circuit 20 comprises a voltage boosting circuit 21 and a voltage regulator 22 . The voltage boosting circuit 21 comprises a first voltage terminal E 1 for providing the first voltage V 1 and a second voltage terminal E 2 for providing the second voltage V 2 . The first voltage V 1 is greater than the second voltage V 2 . The voltage regulator 22 comprises a third voltage terminal E 3 for providing the third voltage V 3 and a fourth voltage terminal E 4 for providing the fourth voltage V 4 . The third voltage V 3 is greater than the fourth voltage V 4 . The power supply circuit 20 further comprises multiple switches. A first switch S 1 is coupled between the first voltage terminal E 1 and the high-voltage input terminal SVDD of the fingerprint sensing device 10 . A second switch S 2 is coupled between the second voltage terminal E 2 and the low-voltage input terminal SGND of the fingerprint sensing device 10 . A third switch S 3 is coupled between the third voltage terminal E 3 and the high-voltage input terminal SVDD of the fingerprint sensing device 10 . A fourth switch S 4 is coupled between the fourth voltage terminal E 4 and the low-voltage input terminal SGND of the fingerprint sensing device 10 . The voltage boosting circuit 21 and the voltage regulator 22 supply the first power signal P 1 to the high-voltage input terminal SVDD of the fingerprint sensing device 10 through the first switch S 1 and the third switch S 3 . The voltage boosting circuit 21 and the voltage regulator 22 supply the second power signal P 2 to the low-voltage input terminal SGND of the fingerprint sensing device 10 through the second switch S 2 and the fourth switch S 4 .

With reference to FIG. 4 , a timing sequence diagram for the embodiment in FIG. 3 is shown. “S 1 , S 2 ” represents a waveform of control signals for the first switch S 1 and the second switch S 2 . “S 3 , S 4 ” represents a waveform of control signals for the third switch S 3 and the fourth switch S 4 . For each one of the control signals of the multiple switches S 1 ˜S 4 , a high voltage level indicates a closed (ON) state of the switch, and a low voltage level indicates an open (OFF) state of the switch.

During the scan phase of the fingerprint sensing device 10 , the first switch S 1 and the second switch S 2 are closed (ON), and the third switch S 3 and the fourth switch S 4 are open (OFF). The voltage of the first power signal P 1 is the first voltage V 1 , the voltage of the second power signal P 2 is the second voltage V 2 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the first voltage difference Vdx 1 . During the read phase of the fingerprint sensing device 10 , the first switch S 1 and the second switch S 2 are open, and the third switch S 3 and the fourth switch S 4 are closed. The voltage of the first power signal P 1 is the third voltage V 3 , the voltage of the second power signal P 2 is the fourth voltage V 4 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the second voltage difference Vdx 2 .

During the scan phase, providing the first voltage V 1 and the second voltage V 2 with higher voltage level to the high-voltage input terminal SVDD and the low-voltage input terminal SGND is beneficial to obtain higher fingerprint sensing signals when the sensors 11 are sensed. The higher the fingerprint sensing signals are, the easier the fingerprint sensing signals corresponding to ridges or valleys of fingerprints can be correctly identified. During the read phase, the voltage regulator 22 provides the third voltage V 3 and the fourth voltage V 4 with low noise and high stability, which is beneficial to reduce noise interference while reading the fingerprint sensing signals. Because the second voltage difference Vdx 2 during the read phase is lower than the first voltage difference Vdx 1 during the scan phase, the power can be saved. In one embodiment, the third voltage V 3 , the fourth voltage V 4 and the second voltage difference Vdx 2 may be minimum values required by analog circuits in the fingerprint sensing device 10 during the read phase.

In an embodiment, ground terminals of all elements of the power supply circuit 20 may be connected together and have the same ground voltage VGND. If the fourth voltage terminal E 4 in FIG. 3 is a ground terminal, the fourth voltage terminal E 4 may be provided by the voltage boosting circuit 21 as shown in FIG. 5 , or other voltage terminal with the ground voltage VGND. Circuit operation of the embodiment in FIG. 5 can be referred to the timing sequence diagram in FIG. 4 and is not elaborated here.

The read phase of the fingerprint sensing device 10 can be divided into a first read period Tr 1 and a second read period Tr 2 , wherein the first read period Tr 1 is earlier than the second read period Tr 2 . FIG. 6 shows the second embodiment of an operating method in accordance with the present invention. Compared to FIG. 2 , the high-voltage input terminal SVDD has a different state during the second read period Tr 2 of the read phase in FIG. 6 . As shown by the first power signal P 1 and the second power signal P 2 in FIG. 6 , during the first read period Tr 1 , the third voltage V 3 is provided to the high-voltage input terminal SVDD, and the fourth voltage V 4 is supplied to the low-voltage input terminal SGND by the power supply circuit 20 . Therefore, the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the first read period Tr 1 is the second voltage difference Vdx 2 .

During the second read period Tr 2 of the read phase, the power supply circuit 20 supplies the fifth voltage V 5 to the high-voltage input terminal SVDD and still supplies the fourth voltage V 4 to the low-voltage input terminal SGND. The fifth voltage V 5 is less than the third voltage V 3 . The voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is a third voltage difference Vdx 3 . The third voltage difference Vdx 3 is a difference value obtained by subtracting the fourth voltage V 4 from the fifth voltage V 5 (Vdx 3 =V 5 −V 4 ). The third voltage difference Vdx 3 is less than the second voltage difference Vdx 2 . Other operation may be referred to the description associated with FIG. 2 and is not elaborated here.

As an example, the first voltage V 1 to the fifth voltage V 5 according to the embodiment of FIG. 6 may be as follows:

the first voltage V 1= A*VDD

the second voltage V 2=( A −1)* VDD

the third voltage V 3= B*VDD

the fourth voltage V 4=VGND

the fifth voltage V 5= M*VDD

where A is a positive number or a positive integer greater than 1, in an embodiment is equal to 2; 1>B>M; VGND is a ground voltage externally supplied to the power supply circuit 20 and may be for example, zero; and VDD is an operating voltage externally supplied to the power supply circuit 20 . In this example, the first voltage difference Vdx 1 between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the scan phase is equal to V 1 −V 2 =VDD. The second voltage difference Vdx 2 during the first read period Tr 1 is equal to V 3 −V 4 =B*VDD. The third voltage difference Vdx 3 during the second read period Tr 2 is equal to V 5 −V 4 =M*VDD. Vdx 1 (VDD)>Vdx 2 (B*VDD)>Vdx 3 (M*VDD).

According to the embodiment in FIG. 6 , the first power signal P 1 during the read phase is first dropped to the third voltage V 3 , and then further dropped from the third voltage V 3 to the fifth voltage V 5 . In one embodiment, the analog circuits in the fingerprint sensing device 10 processes the fingerprint sensing signal during the first read period Tr 1 . The third voltage V 3 and the second voltage difference Vx 2 may be the minimum voltages required by the analog circuit during the first read period Tr 1 . After the operation of analog circuit is completed during the first read period Tr 1 , the voltage of the high-voltage input terminal SVDD is dropped to the fifth voltage V 5 during the second read period Tr 2 for enhancing power-saving effect.

The embodiment shown in FIG. 7 is used to implement the operation as shown in FIG. 6 . Compared to FIG. 3 , the embodiment of FIG. 7 further comprises a fifth voltage terminal E 5 and a fifth switch S 5 . In FIG. 7 , the voltage regulator 22 further comprises a fifth voltage terminal E 5 for providing the fifth voltage V 5 . The fifth voltage V 5 is greater than the fourth voltage V 4 and is less than the third voltage V 3 . The fifth switch S 5 is coupled between the fifth voltage terminal E 5 and the high-voltage input terminal SVDD of the fingerprint sensing device 10 . Other details and variations of this embodiment may be referred to the descriptions of FIGS. 3 and 5 and are not elaborated here.

FIG. 8 is a timing sequence diagram for the embodiment in FIG. 7 . During the scan phase of the fingerprint sensing device 10 , the first switch S 1 and the second switch S 2 are closed and the third switch S 3 to the fifth switch S 5 are open. In this time, the voltage of the first power signal is the first voltage V 1 , the voltage of the second power signal P 2 is the second voltage V 2 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the first voltage difference Vdx 1 . During the first read period Tr 1 , the first switch S 1 , the second switch S 2 and the fifth switch S 5 are open and the third switch S 3 and the fourth switch S 4 are closed. In this time, the voltage of the first power signal P 1 is the third voltage V 3 , the voltage of the second power signal P 2 is the fourth voltage V 4 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the second voltage difference Vdx 2 . The second voltage difference Vdx 2 is less than the first voltage difference Vdx 1 . During the second read period Tr 2 of the read phase, the first switch S 1 , the second switch S 2 and the third switch S 3 are open and the fourth switch S 4 and the fifth switch S 5 are closed. In this time, the voltage of the first power signal P 1 is the fifth voltage V 5 , the voltage of the second power signal P 2 is the fourth voltage V 4 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the third voltage difference Vdx 3 . The third voltage difference Vdx 3 is less than the second voltage difference Vdx 2 .

The scan phase of the fingerprint sensing device 10 can be divided into a first scan period Ts 1 and a second scan period Ts 2 , wherein the first scan period Ts 1 is earlier than the second scan period Ts 2 . FIG. 9 shows a third embodiment of the operating method in accordance with the present invention. Compared to FIG. 2 , the embodiment of FIG. 9 has a different state of the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the first scan period Ts 1 of the scan phase. As shown by the first power signal P 1 and the second power signal P 2 in FIG. 9 , during the second scan period Ts 2 of the scan phase, the first voltage V 1 is provided to the high-voltage input terminal SVDD and the second voltage V 2 is provided to the low-voltage input terminal SGND. The voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the second scan period Ts 2 is the first voltage difference Vdx 1 . During the first scan period Ts 1 , the power supply circuit 20 supplies a sixth voltage V 6 to the high-voltage input terminal SVDD and the fourth voltage V 4 to the low-voltage input terminal SGND. The sixth voltage V 6 is less than the first voltage V 1 and is greater than the third voltage V 3 . The voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the first scan period Ts 1 is a fourth voltage difference Vdx 4 . The fourth voltage difference Vdx 4 is a difference value obtained by subtracting the fourth voltage V 4 from the sixth voltage V 6 (Vdx 4 =V 6 −V 4 ). The fourth voltage difference Vdx 4 is less than the first voltage difference Vdx 1 and is greater than the second voltage difference Vdx 2 . Other operation may be referred to the description associated with FIG. 2 and is not elaborated here.

As an example according to the FIG. 9 , the first voltage V 1 to the fourth voltage V 4 and the sixth voltage V 6 are as follows:

the first voltage V 1= A*VDD

the second voltage V 2=( A −1)* VDD

the third voltage V 3= B*VDD

the fourth voltage V 4=VGND

the sixth voltage V 6= N*VDD

where A is a positive number or a positive integer greater than 1, in an embodiment is equal to 2; N>B and N may be a positive number or positive integer greater than, less than or equal to 1, and proper selection of N and VGND can maintain the fourth voltage difference Vdx 4 to be less than the first voltage difference Vdx 1 ; VGND is a ground voltage externally supplied to the power supply circuit 20 and may be for example, zero; and VDD is an operating voltage externally supplied to the power supply circuit 20 .

If the VGND is zero, the fourth voltage difference Vdx 4 between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the first scan period Ts 1 is equal to V 6 −V 4 =N*VDD, and the first voltage difference Vdx 1 during the second scan period Ts 2 is equal to V 1 −V 2 =VDD. The second voltage difference Vdx 2 during the read phase is equal to V 3 −V 4 =B*VDD. Vdx 1 (VDD)>Vdx 4 (N*VDD)>Vdx 2 (B*VDD).

The embodiments shown in FIGS. 10 and 11 may be used to implement operation shown in FIG. 9 . Compared to the embodiment of FIG. 3 , FIGS. 10 and 11 further comprises a sixth voltage terminal E 6 and a sixth switch S 6 . The sixth voltage terminal E 6 is used to provide the sixth voltage V 6 . The sixth voltage V 6 is less than the first voltage V 1 and is greater than the third voltage V 3 . The sixth switch S 6 is coupled between the sixth voltage terminal E 6 and the high-voltage input terminal SVDD of the fingerprint sensing device 10 . In FIG. 10 the sixth voltage V 6 is greater than or equal to the operating voltage VDD, and the sixth voltage terminal E 6 is provided by the voltage boosting circuit 21 . In other words, the voltage boosting circuit 21 supplies the sixth voltage V 6 . In FIG. 11 the sixth voltage V 6 is less than or equal to the operating voltage VDD, and the sixth voltage terminal E 6 is provided by the voltage regulator 22 . In other words, the voltage regulator 22 supplies the sixth voltage V 6 . If the sixth voltage V 6 is an external operating voltage VDD supplied to the power supply circuit 20 , the sixth voltage terminal E 6 may be provided by other circuit element inside the power supply circuit 20 , or provided by other voltage terminal having the operating voltage VDD. Other details and variations may be referred to the description in FIGS. 3 and 5 and are not elaborated here.

With reference to FIG. 12 , a timing sequence diagram for the embodiments of FIGS. 10 and 11 is shown. During the first scan period Ts 1 , the first switch S 1 , the second switch S 2 and the third switch S 3 are open and the fourth switch S 4 and the sixth switch S 6 are closed. In this time, the voltage of the first power signal P 1 is the sixth voltage V 6 , the voltage of the second power signal P 2 is the fourth voltage V 4 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the fourth voltage difference Vdx 4 . During the second scan period Ts 2 , the first switch S 1 and the second switch S 2 are closed and the third switch S 3 , the fourth switch S 4 and the sixth switch S 6 are open. In this time, the voltage of the first power signal P 1 is the first voltage V 1 , the voltage of the second power signal P 2 is the second voltage V 2 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the first voltage difference Vdx 1 . The fourth voltage difference Vdx 4 is less than the first voltage difference Vdx 1 . During the read phase, the first switch S 1 , the second switch S 2 and the sixth switch S 6 are open, and the third switch S 3 and the fourth switch S 4 are closed. In this time, the voltage of the first power signal P 1 is the third voltage V 3 , the voltage of the second power signal P 2 is the fourth voltage V 4 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the second voltage difference Vdx 2 . The second voltage difference Vdx 2 is less than the fourth voltage difference Vdx 4 .

In comparison to FIGS. 10 and 11 , the first voltage terminal E 1 is omitted and a capacitor C is added in the embodiments of FIGS. 13 and 14 . In the embodiments of FIGS. 13 and 14 , the capacitor C is coupled between the high-voltage input terminal SVDD and the low-voltage input terminal SGND. The voltage boosting circuit 21 or the voltage regulator 22 does not provide the first voltage V 1 . The power supply circuit 20 provides a high voltage to the high-voltage input terminal SVDD of the fingerprint sensing device 10 through the combination of the second voltage V 2 and the capacitor C during the scan phase. Other details and variations may be referred to the description in FIGS. 10 and 11 and are not elaborated here.

With reference to FIG. 15 , a timing sequence diagram for the embodiments in FIGS. 13 and 14 is shown. During the first scan period Ts 1 of the scan phase of the fingerprint sensing device 10 , the second switch S 2 and the third switch S 3 are open, and the fourth switch S 4 and the sixth switch S 6 are closed. In this time, the voltage of the first power signal P 1 is the sixth voltage V 6 , the voltage of the second power signal P 2 is the fourth voltage V 4 , the fourth voltage difference Vdx 4 between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is equal to Vdx 4 =V 6 −V 4 , and the capacitor C is charged. During the second scan period Ts 2 of the scan phase, the second switch S 2 is closed, and the third switch S 3 , the fourth switch S 4 and the sixth switch S 6 are open. In this time, the voltage of the first power signal is V 2 +V 6 −V 4 , the voltage of the second power signal P 2 is the second voltage V 2 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the fourth voltage difference Vdx 4 . During the read phase, the first switch S 1 , the second switch S 2 and the sixth switch S 6 are open, and the third switch S 3 and the fourth switch S 4 are closed. In this time, the voltage of the first power signal P 1 is the third voltage V 3 , the voltage of the second power signal P 2 is the fourth voltage V 4 , and the voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND is the second voltage difference Vdx 2 . The second voltage difference Vdx 2 is less than the fourth voltage difference Vdx 4 .

In an embodiment according to FIG. 15 , the second voltage V 2 to the fourth voltage V 4 and the sixth voltage V 6 are as follows:

the second voltage V 2=( A −1)* VDD

the third voltage V 3= B*VDD

the fourth voltage V 4=VGND

the sixth voltage V 6= VDD

where A is a positive number or a positive integer greater than 1 or greater than or equal to 2; B is less than 1; VGND is a ground voltage externally supplied to the power supply circuit 20 and may be for example, zero; and VDD is an operating voltage externally supplied to the power supply circuit 20 . In this embodiment, the fourth voltage difference Vdx 4 between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the scan phase is equal to V 6 −V 4 =VDD, the second voltage difference Vdx 2 during the read phase is equal to V 3 −V 4 =B*VDD, and Vdx 4 (VDD)>Vdx 2 (B*VDD).

As shown in FIG. 15 , during the first scan period Ts 1 , the power supply circuit 20 in FIGS. 13 and 14 provides the sixth voltage V 6 to the high-voltage input terminal SVDD and provides the fourth voltage V 4 to the low-voltage input terminal SGND. The voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the first scan period Ts 1 is the fourth voltage difference Vdx 4 . During the second scan period Ts 2 , the power supply circuit 20 provides the second voltage V 2 to the low-voltage input terminal SGND. During the read phase, the power supply circuit 20 provides the third voltage V 3 to the high-voltage input terminal SVDD and the fourth voltage V 4 to the low-voltage input terminal SGND. The voltage difference between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the read phase is the second voltage difference Vdx 2 .

In comparison to FIGS. 10 and 11 , the voltage boosting circuit 21 in FIGS. 13 and 14 does not need to provide a first voltage V 1 , and the high-voltage input terminal SVDD of the fingerprint sensing device 10 can still obtain an input voltage higher than the second voltage V 2 during the scan phase. Therefore, requirement and complexity of designing or manufacturing the voltage boosting circuit 21 can be reduced. From another perspective of view, if the voltage boosting circuit 21 in FIG. 13 provides the first voltage V 1 but eliminates the second voltage V 2 , the high-voltage input terminal SVDD may receive a voltage higher than the first voltage V 1 , which means that higher voltage may be supplied to the multiple sensors 11 to obtain higher fingerprint sensing signal.

Providing the first voltage V 1 to the high-voltage input terminal SVDD in the foregoing embodiments may be implemented by the configuration show in FIGS. 13 and 14 . That is, the capacitor C is first charged during the first scan period Ts 1 , and then the second voltage V 2 is provided to the low-voltage input terminal SGND during the second scan period Ts 2 so that the high-voltage input terminal SVDD can receive the first voltage V 1 . The first voltage V 1 generated by the configuration show in FIG. 13 is equal to V 2 +V 6 −V 4 , and the first voltage difference Vdx 1 is equal to the fourth voltage difference Vdx 4 , i.e. both being V 6 −V 4 . In FIGS. 9 and 15 the fourth voltage difference Vdx 4 is not greater than the first voltage V 1 .

Lever-triggering may be used in the operation of the foregoing embodiments. Each switch in the foregoing embodiment may be opened or closed earlier or later. Scanning the sensors 11 is performed when the first voltage difference Vdx 1 is between the high-voltage input terminal SVDD and the low-voltage input terminal SGND. When the second voltage difference Vdx 2 is between the high-voltage input terminal SVDD and the low-voltage input terminal SGND, analog circuits read and process the fingerprint sensing signals of the sensors 11 . In certain embodiments, the voltage boosting circuit 21 is used to provide a voltage greater than or equal to the VDD and the voltage regulator 22 is used to provide a voltage less than or equal to the VDD.

The combination of foregoing embodiments is feasible. For example, the embodiments in FIGS. 6 to 8 may be combined with the embodiments in FIGS. 9 to 15 , such that the fourth voltage difference Vdx 4 and the first voltage difference Vdx 1 are between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the scan phase, and the second voltage difference Vdx 2 and the third voltage difference Vdx 3 are between the high-voltage input terminal SVDD and the low-voltage input terminal SGND during the read phase.

In one embodiment, the voltage of the high-voltage input terminal SVDD may be used as an operating voltage of the fingerprint sensing device 10 , and the voltage of the low-voltage input terminal SGND may be used as a ground voltage of the fingerprint sensing device 10 .

Even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and function of the invention, the disclosure is illustrative only. Changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.